CH673733A5 - - Google Patents
Download PDFInfo
- Publication number
- CH673733A5 CH673733A5 CH341487A CH341487A CH673733A5 CH 673733 A5 CH673733 A5 CH 673733A5 CH 341487 A CH341487 A CH 341487A CH 341487 A CH341487 A CH 341487A CH 673733 A5 CH673733 A5 CH 673733A5
- Authority
- CH
- Switzerland
- Prior art keywords
- pulse
- pulses
- clock pulse
- clock
- sequence
- Prior art date
Links
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 claims description 52
- 238000004904 shortening Methods 0.000 claims description 3
- 206010000210 abortion Diseases 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Manipulation Of Pulses (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19863633024 DE3633024C2 (de) | 1986-09-29 | 1986-09-29 | Schaltungsanordnung für die Phasensynchronisierung zweier Taktimpulsfolgen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH673733A5 true CH673733A5 (fr) | 1990-03-30 |
Family
ID=6310580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH341487A CH673733A5 (fr) | 1986-09-29 | 1987-09-04 |
Country Status (2)
| Country | Link |
|---|---|
| CH (1) | CH673733A5 (fr) |
| DE (1) | DE3633024C2 (fr) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4961207A (en) * | 1989-08-02 | 1990-10-02 | The Perkin-Elmer Corporation | Synchronization of digital signals with alternating current |
| DE19629869C2 (de) * | 1995-08-01 | 2003-02-13 | Schlumberger Technologies Inc | Verfahren und Vorrichtung zum Ausfluchten der relativen Phase von asychronen Taktsignalen |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2246590A1 (de) * | 1972-09-22 | 1974-03-28 | Philips Patentverwaltung | Schaltungsanordnung zum synchronisieren von eingangsimpulsen mit einem taktpuls |
| DE2728930C2 (de) * | 1977-06-27 | 1984-05-17 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zur Synchronisierung von Taktgebern |
-
1986
- 1986-09-29 DE DE19863633024 patent/DE3633024C2/de not_active Expired - Fee Related
-
1987
- 1987-09-04 CH CH341487A patent/CH673733A5/de not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| DE3633024C2 (de) | 1995-07-20 |
| DE3633024A1 (de) | 1988-04-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE60008688T2 (de) | Frequenzdetektor und Phasenregelkreisschaltung mit einem solchen Detektor | |
| DE69106159T2 (de) | Phasenregelschaltung und dadurch entstandener Frequenzvervielfacher. | |
| DE3785966T2 (de) | Digitale, phasenverriegelte Taktwiedergewinnungsschleife. | |
| DE69434280T2 (de) | Taktgenerator und Phasenkomparator zur Verwendung in einem derartigen Taktgenerator | |
| DE2925583A1 (de) | Phasenkopplungsschleifen-motorantriebssystem | |
| DE2541163A1 (de) | Phasen- und/oder frequenzkomparator | |
| DE2645638C2 (de) | Phasendetektor in einer phasenstarren Schleife | |
| DE2542954C2 (de) | Frequenzgenerator mit einem Phasenregelkreis | |
| DE69610944T2 (de) | Schneller programmierbarer Frequenzteiler | |
| DE3022746A1 (de) | Digitale phasenkomparatorschaltung | |
| DE69300291T2 (de) | Frequenzregelschleife. | |
| DE3212453C2 (fr) | ||
| DE3906094C2 (de) | Digitale Phasen/Frequenz-Detektorschaltung | |
| DE2119091A1 (de) | Spannungsgesteuerter Taktgenerator | |
| DE3315372C2 (fr) | ||
| EP0042961B1 (fr) | Procédé et agencement pour la génération d'impulsions à relation temporelle prédéterminée dans des intervalles d'impulsions prédéterminées avec une haute résolution de temps | |
| DE69419150T2 (de) | Digital gesteuerter oszillator und digitale pll-schaltung | |
| CH673733A5 (fr) | ||
| DE2448533A1 (de) | Schaltungsanordnung fuer einen phasendiskriminator mit unbegrenztem fangbereich | |
| EP0237699B1 (fr) | Méthode et montage de circuit pour la synchronisation d'un oscillateur commandé en tension appartenant à un central téléphonique | |
| EP1126645B1 (fr) | Réseau de communication à protocole de communication commandé en temps | |
| DE2710270B2 (de) | Schaltungsanordnung zur Erzeugung von mit eintreffenden Datenimpulsen synchronisierten Taktimpulsen | |
| DE69107637T2 (de) | Signal-Detektorschaltung zum Detektieren eines in einer bezeichneter Frequenz spezifizierten Signals. | |
| DE3520301A1 (de) | Phasenvergleichsverfahren | |
| DE3121970C2 (de) | Digitaler Phasendiskriminator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |