CN100364052C - 晶格调谐半导体衬底的形成 - Google Patents

晶格调谐半导体衬底的形成 Download PDF

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Publication number
CN100364052C
CN100364052C CNB038209543A CN03820954A CN100364052C CN 100364052 C CN100364052 C CN 100364052C CN B038209543 A CNB038209543 A CN B038209543A CN 03820954 A CN03820954 A CN 03820954A CN 100364052 C CN100364052 C CN 100364052C
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sige layer
layer
insulating mechanism
sige
parallel
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Expired - Fee Related
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Chinese (zh)
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CN1714427A (zh
Inventor
亚当·丹尼尔·开普维尔
蒂莫西·约翰·格拉斯彼
埃文·休伯特·克雷斯威尔·帕克
特伦斯·霍尔
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AdvanceSis Ltd
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University of Warwick
AdvanceSis Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/276Lateral overgrowth
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/271Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2905Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3204Materials thereof being Group IVA semiconducting materials
    • H10P14/3211Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/933Germanium or silicon or Ge-Si on III-V

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  • Recrystallisation Techniques (AREA)
CNB038209543A 2002-09-03 2003-08-12 晶格调谐半导体衬底的形成 Expired - Fee Related CN100364052C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0220438.6A GB0220438D0 (en) 2002-09-03 2002-09-03 Formation of lattice-turning semiconductor substrates
GB0220438.6 2002-09-03

Publications (2)

Publication Number Publication Date
CN1714427A CN1714427A (zh) 2005-12-28
CN100364052C true CN100364052C (zh) 2008-01-23

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CNB038209543A Expired - Fee Related CN100364052C (zh) 2002-09-03 2003-08-12 晶格调谐半导体衬底的形成

Country Status (8)

Country Link
US (1) US7179727B2 (2)
EP (1) EP1540715A1 (2)
JP (1) JP2005537672A (2)
KR (1) KR20050038037A (2)
CN (1) CN100364052C (2)
AU (1) AU2003251376A1 (2)
GB (1) GB0220438D0 (2)
WO (1) WO2004023536A1 (2)

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WO2006011107A1 (en) * 2004-07-22 2006-02-02 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device and semiconductor device obtained with such a method
GB2418531A (en) * 2004-09-22 2006-03-29 Univ Warwick Formation of lattice-tuning semiconductor substrates
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
CN101268547B (zh) 2005-07-26 2014-07-09 琥珀波系统公司 包含交替有源区材料的结构及其形成方法
US7638842B2 (en) 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
US7476606B2 (en) * 2006-03-28 2009-01-13 Northrop Grumman Corporation Eutectic bonding of ultrathin semiconductors
US8173551B2 (en) 2006-09-07 2012-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. Defect reduction using aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
WO2008051503A2 (en) 2006-10-19 2008-05-02 Amberwave Systems Corporation Light-emitter-based devices with lattice-mismatched semiconductor structures
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
WO2008124154A2 (en) 2007-04-09 2008-10-16 Amberwave Systems Corporation Photovoltaics on silicon
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
DE112008002387B4 (de) 2007-09-07 2022-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. Struktur einer Mehrfachübergangs-Solarzelle, Verfahren zur Bildung einer photonischenVorrichtung, Photovoltaische Mehrfachübergangs-Zelle und Photovoltaische Mehrfachübergangs-Zellenvorrichtung,
CN103367115A (zh) * 2007-12-28 2013-10-23 住友化学株式会社 半导体基板、半导体基板的制造方法及电子器件
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
CN102160145B (zh) 2008-09-19 2013-08-21 台湾积体电路制造股份有限公司 通过外延层过成长的元件形成
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
KR20110081804A (ko) * 2008-10-02 2011-07-14 스미또모 가가꾸 가부시키가이샤 반도체 디바이스용 기판, 반도체 디바이스 장치, 설계 시스템, 제조 방법 및 설계 방법
JP5705207B2 (ja) 2009-04-02 2015-04-22 台湾積體電路製造股▲ふん▼有限公司Taiwan Semiconductor Manufacturing Company,Ltd. 結晶物質の非極性面から形成される装置とその製作方法
KR20120022872A (ko) * 2009-05-22 2012-03-12 스미또모 가가꾸 가부시키가이샤 반도체 기판, 전자 디바이스, 반도체 기판의 제조 방법 및 전자 디바이스의 제조 방법
JP6706414B2 (ja) * 2015-11-27 2020-06-10 国立研究開発法人情報通信研究機構 Ge単結晶薄膜の製造方法及び光デバイス

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GB2215514A (en) * 1988-03-04 1989-09-20 Plessey Co Plc Terminating dislocations in semiconductor epitaxial layers
US5108947A (en) * 1989-01-31 1992-04-28 Agfa-Gevaert N.V. Integration of gaas on si substrates
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5238869A (en) * 1988-07-25 1993-08-24 Texas Instruments Incorporated Method of forming an epitaxial layer on a heterointerface
US5272105A (en) * 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure
US5410167A (en) * 1992-07-10 1995-04-25 Fujitsu Limited Semiconductor device with reduced side gate effect
US5442205A (en) * 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
US6039803A (en) * 1996-06-28 2000-03-21 Massachusetts Institute Of Technology Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon
EP1052684A1 (en) * 1999-05-10 2000-11-15 Toyoda Gosei Co., Ltd. A method for manufacturing group III nitride compound semiconductor and a light-emitting device using group III nitride compound semiconductor
WO2001001465A1 (en) * 1999-06-25 2001-01-04 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
CN1336684A (zh) * 2000-08-01 2002-02-20 三菱麻铁里亚尔株式会社 半导体衬底、场效应晶体管、锗化硅层形成方法及其制造方法
CN1364309A (zh) * 2000-03-27 2002-08-14 松下电器产业株式会社 半导体晶片及其制造方法

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JPH04315419A (ja) * 1991-04-12 1992-11-06 Nec Corp 元素半導体基板上の絶縁膜/化合物半導体積層構造
JPH06260427A (ja) * 1993-03-05 1994-09-16 Nec Corp 半導体膜の選択成長方法
WO1999014804A1 (en) 1997-09-16 1999-03-25 Massachusetts Institute Of Technology CO-PLANAR Si AND Ge COMPOSITE SUBSTRATE AND METHOD OF PRODUCING SAME
DE19802977A1 (de) 1998-01-27 1999-07-29 Forschungszentrum Juelich Gmbh Verfahren zur Herstellung einer einkristallinen Schicht auf einem nicht gitterangepaßten Substrat, sowie eine oder mehrere solcher Schichten enthaltendes Bauelement
JP4345244B2 (ja) * 2001-05-31 2009-10-14 株式会社Sumco SiGe層の形成方法及びこれを用いた歪みSi層の形成方法と電界効果型トランジスタの製造方法
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Patent Citations (12)

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Publication number Priority date Publication date Assignee Title
US5272105A (en) * 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure
GB2215514A (en) * 1988-03-04 1989-09-20 Plessey Co Plc Terminating dislocations in semiconductor epitaxial layers
US5238869A (en) * 1988-07-25 1993-08-24 Texas Instruments Incorporated Method of forming an epitaxial layer on a heterointerface
US5108947A (en) * 1989-01-31 1992-04-28 Agfa-Gevaert N.V. Integration of gaas on si substrates
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
US5442205A (en) * 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
US5410167A (en) * 1992-07-10 1995-04-25 Fujitsu Limited Semiconductor device with reduced side gate effect
US6039803A (en) * 1996-06-28 2000-03-21 Massachusetts Institute Of Technology Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon
EP1052684A1 (en) * 1999-05-10 2000-11-15 Toyoda Gosei Co., Ltd. A method for manufacturing group III nitride compound semiconductor and a light-emitting device using group III nitride compound semiconductor
WO2001001465A1 (en) * 1999-06-25 2001-01-04 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
CN1364309A (zh) * 2000-03-27 2002-08-14 松下电器产业株式会社 半导体晶片及其制造方法
CN1336684A (zh) * 2000-08-01 2002-02-20 三菱麻铁里亚尔株式会社 半导体衬底、场效应晶体管、锗化硅层形成方法及其制造方法

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Publication number Publication date
US7179727B2 (en) 2007-02-20
WO2004023536A1 (en) 2004-03-18
JP2005537672A (ja) 2005-12-08
CN1714427A (zh) 2005-12-28
KR20050038037A (ko) 2005-04-25
US20050245055A1 (en) 2005-11-03
AU2003251376A1 (en) 2004-03-29
EP1540715A1 (en) 2005-06-15
GB0220438D0 (en) 2002-10-09

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