CN100367308C - IC label - Google Patents

Abstract

The present invention provides an IC tag which has a structure comprising a first adhesive layer laminated on a surface of a substrate sheet, an electronic circuit containing a circuit line having a bypass line and an IC chip connecting to the electronic circuit which are formed on a surface of the first adhesive layer, a second adhesive layer laminated for covering the electronic circuit and the IC chip, and a release agent layer formed partly at the position corresponding to a circuit section consisting of the electronic circuit and the IC chip and located at the interface between the substrate sheet and the first adhesive layer, wherein the angle formed by the tangent of the bypass line at the connection between the bypass line and the circuit line and the tangent of the circuit line at the connection is 10 degree or greater. When the IC tag attached to an article is peeled off, the built-in electronic circuit is surely broken.

Description

IC label

technical field

The present invention relates to an IC tag capable of destroying a built-in electronic circuit when the IC tag attached to an article falls off.

Background technique

Item management has recently been implemented by attaching an IC tag to items such as goods, storage items, and loads. For example, item management has been implemented by affixing IC tags recording information such as production conditions, stock status, cost information, and used information to goods, and further confirming the information by an interrogator as necessary.

However, when the adhesive strength of the adhesive for the IC tag is insufficient when it is attached to the IC tag on the article, the IC tag may be re-attached to another article due to any reason such as mistake and inadvertent mistake. Also, the IC tag may be intentionally re-attached to another item. In this case, article management cannot be performed correctly for a long period of time.

As a conventional IC tag, it is described that when the substrate pressed on the surface of the label is changed, the surface substrate in the layer is destroyed, thereby increasing the effect of preventing counterfeiting (JP 10-171962A).

However, there is a problem that when using a knife or the like, by cutting the interface between the article and the IC label adhesive layer attached to the article, peeling off the IC label, inserting a finger or the like into the cut portion and pinching the IC The label, the surface substrate can be easily peeled off from the electronic circuit without destroying the electronic circuit.

Contents of the invention

As a method of solving the above-mentioned problems, when the IC tag is re-attached to another article, it is necessary to destroy the function of the IC tag to correctly implement article management.

As a result of the present inventors' efforts to solve the above-mentioned problems, it was found that the above-mentioned problems are achieved by laminating the first adhesive laminate on a substrate sheet to form an electronic circuit comprising a circuit line including bypass lines, wherein the angle formed by the tangent of the bypass line at the connection between the bypass line and the circuit line and the tangent of the circuit line at the connection is greater than or equal to 45 degrees and less than 180 degrees, and on the surface of the first adhesive layer An IC chip connected to an electronic circuit, pressing a second adhesive layer for covering the electronic circuit and the IC chip, and partially forming a release agent layer at a position corresponding to a circuit area including the electronic circuit and The IC chip is located on the interface between the substrate sheet and the first adhesive layer. Furthermore, it has been found that the above-mentioned problems are achieved by laminating the first adhesive layer on the surface of a substrate sheet to form an electronic circuit comprising an elongated planar protrusion and a contact on the surface of the first adhesive layer connected to the electronic circuit. An IC chip, pressing a second adhesive layer for covering the electronic circuit and the IC chip, and partially forming a release agent layer at a position corresponding to a circuit area including the electronic circuit and the IC chip, the release agent A layer is located at the interface between the substrate sheet and the first adhesive layer. The present invention has thus been completed.

That is, the present invention provides an IC tag comprising a structure comprising a first adhesive layer pressed on the surface of a substrate sheet, an electronic circuit comprising a circuit line comprising a bypass line, wherein the bypass line and the The angle formed by the tangent of the bypass line at the connection between the circuit lines and the tangent of the circuit line at the connection is greater than or equal to 45 degrees and less than 180 degrees, and the connection to the electronic circuit on the surface of the first adhesive layer An IC chip, a second adhesive layer pressed thereon for covering the electronic circuit and the IC chip, and a release agent layer partially formed at a position corresponding to a circuit area including the electronic circuit and the IC chip , the release agent layer is located on the interface between the substrate sheet and the first adhesive layer.

The present invention also provides the IC tag as described above, wherein at least one bypass line is formed at a position in the circuit region where the spacer layer is formed.

The present invention also provides the IC tag as described above, wherein one plane protrudes to extend to the bypass line.

The present invention also provides an IC tag comprising a structure comprising a first adhesive layer pressed on the surface of a substrate sheet, an electronic circuit comprising an extended planar protrusion and an IC chip connected to An electronic circuit is formed on the surface of the first adhesive layer, a second adhesive layer pressed thereon for covering the electronic circuit and the IC chip, and a release agent layer partially formed at a position corresponding to a circuit region, the The circuit area includes electronic circuits and IC chips, and the release agent layer is located at the interface between the substrate sheet and the first adhesive layer.

The present invention also provides an IC tag comprising a structure comprising a first adhesive layer pressed on the surface of a substrate sheet, an electronic circuit comprising an extended planar protrusion and an IC chip connected to An electronic circuit is formed on the surface of the first adhesive layer, a second adhesive layer pressed thereon for covering the electronic circuit and the IC chip, and a spacer partially formed at both end positions corresponding to a circuit area layer, the circuit area includes the electronic circuit and the IC chip, and the release agent layer is located on the interface between the substrate sheet and the first adhesive layer.

The present invention also provides the IC tag as described above, wherein at least one bypass line is formed at a position in the circuit region where the spacer layer is formed.

The present invention also provides the IC tag as described above, wherein one plane protrusion has an area calculated according to the following formula:

S≥(2W) ²

Here S is the area of the flat protrusion, and W is the width of the circuit line adjacent to the flat protrusion.

The present invention also provides the IC tag as described above, wherein the release agent layer is formed to cover an area range of 20-90% surrounded by an outer circumference of the circuit region through the first adhesive layer.

The present invention also provides the IC label as described above, wherein a release liner is formed on the surface of the second adhesive layer.

When the IC tag pasted on an article falls off, the IC tag of the present invention must destroy a built-in electronic circuit.

Description of drawings

Fig. 1 shows an IC tag cross-sectional outline of an embodiment of the present invention;

Fig. 2 shows in an IC label of the present invention, the electronic circuit perspective plan view of an embodiment;

Fig. 3 shows a perspective plan view of an IC tag of another embodiment of the present invention;

Fig. 4 shows a state cross-sectional profile when the IC label of another embodiment of the present invention comes off;

Fig. 5 shows in an IC label of the present invention, a circuit line of an embodiment and a plan view of the shape of a bypass line;

Fig. 6 shows an electronic circuit perspective plan view of another embodiment in an IC tag of the present invention;

Fig. 7 shows a perspective sectional view of an IC tag of another embodiment of the present invention;

Fig. 8 shows an electronic circuit perspective plan view of another embodiment in an IC tag of the present invention;

Fig. 9 shows an electronic circuit perspective plan view of another embodiment in an IC tag of the present invention;

Figure 10 shows a perspective cross-sectional profile of a state when the IC label of an embodiment of the present invention comes off;

Fig. 11 shows in an IC label of the present invention, a plan view of the shape of an embodiment where a plane protrudes and extends to a circuit line;

In the drawings, 1 refers to a substrate sheet, 2 refers to the first adhesive layer, 3 refers to the electronic circuit, 4 refers to the circuit line, 5 refers to the second adhesive layer, 6 refers to the IC chip, 7 refers to the release agent layer, 8 Refers to the bypass line, 9 refers to the plane protrusion, 10 refers to the bonding wire, 11 refers to the isolation liner, 12 refers to the object, 13 refers to the circuit area, 14 refers to the connection between the bypass line and the circuit line, and 15 refers to the connection between the bypass line and the circuit line 16 refers to the tangent of the bypass line at the junction between the bypass line and the circuit line, and 17 refers to the incision.

Detailed ways

The IC tag of the present invention is explained based on the drawings. 1 and 7 show a cross-sectional outline of an IC tag according to an embodiment of the present invention.

The substrate sheet 1 is preferably a sheet comprising a thermoplastic resin.

As a sheet comprising a thermoplastic resin, there can be used a sheet comprising, for example, one or more of various synthetic resins such as polyolefin resins, polyethylene resins such as high-density polyethylene, medium-density polyethylene, low-density polyethylene, etc. , polypropylene, polymethyl-1-pentene/ethylene/cyclic olefin copolymer, and ethylene-vinyl acetate copolymer polypropylene resin; such as polyethylene terephthalate, polyethylene naphtha Oily esters, polyester resins of polybutylene terephthalate; polyvinyl chloride resins; polyvinyl alcohol resins; polycarbonate resins; polyamide resins; polyimide resins; fluorine resins; containing two or more of them Copolymers of multiple polymerized units; polymer blends containing two or more of their resins; polymer alloys containing one or more of their resins. In particular, a sheet including a polyester resin is preferably used. The substrate sheet 1 can be uniaxially or biaxially oriented. The substrate sheet 1 may comprise a single layer or two or more different layers or the same layer. Furthermore, the substrate sheet 1 is preferably waterproof. If the backing sheet is waterproof, damage such as breakage of the backing sheet will not result when the backing sheet is wetted with water.

The thickness of the substrate sheet 1 is not limited in any way. However, the thickness is generally in the range of 10-250 μm, and preferably in the range of 20-100 μm.

In order to increase the adhesive strength between the substrate sheet 1 and the first adhesive layer 2, the surface of the substrate sheet 1 may be subjected to surface treatment. Surface treatment includes, for example, corona discharge treatment, chemical treatment, resin coating, and the like.

The adhesive used in the first adhesive layer 2 includes various adhesives such as hot-melt adhesives, pressure-sensitive adhesives, and thermosetting adhesives. The types of adhesives include, for example, natural rubber adhesives, synthetic rubber adhesives, acrylic resin adhesives, polyester resin adhesives, polyvinyl ether resin adhesives, polyurethane resin adhesives, and silicone resins adhesive.

Examples of synthetic rubber binders include oil-extended styrene-butadiene rubber, polyisobutylene rubber, polyisobutylene-isoprene rubber, isoprene rubber, styrene-isoprene block copolymer, styrene-butadiene ethylene block copolymer, styrene-ethylene-butylene block copolymer, ethylene-ethylene-acetate thermoplastic synthetic rubber, etc. Examples of acrylic resin binders include homopolymers of monomers such as acrylic acid, methacrylate, ethacrylate, propyl acrylate, butyl acrylate, 2-ethylhexyl acrylate, methacrylate ester, ethyl methacrylate, butyl methacrylate, and acrylonitrile, or copolymers of two or more of their monomers. Polyester resin binders are copolymers of polyols and polybasic acids. Polyols include ethylene glycol, propylene glycol, and butylene glycol. Polyacids include terephthalic acid, adipic acid, and maleic acid. Examples of polyvinyl ether resin binders include polyvinyl ether and polyvinyl isobutyl ether. Examples of silicone resin binders include dimethylpolysiloxane. The binder may be used alone or in combination of two or more components.

Among these adhesives, polyester resin adhesives are preferable.

A tackifier, softener, antioxidant, filler, colorant such as dye and pigment, etc. may be mixed into the first adhesive layer 2 as required.

Tackifiers include rosin resins, terpene phenol resins, terpene resins, aromatic modified terpene resins, petroleum resins, coumarone resins, styrene resins, phenol resins and xylene resins. Softeners include processing oils, liquid rubber and plasticizers. Fillers include silica, talc, clay, calcium carbonate, etc.

The thickness of the first adhesive layer 2 is not limited, however, the thickness is generally in the range of 1-100 μm, and preferably in the range of 3-50 μm.

In the IC label of the present invention, the release agent layer 7 is partially formed on the position corresponding to the circuit area 13, which includes the electronic circuit 3 and the IC chip 6, and the release agent layer is located between the substrate sheet 1 and the first adhesive at the interface between layers 2.

The release agent layers 7 are formed in two or more numbers, and are respectively arranged at intervals from each other. The shape and size of the release agent layer 7, and the gap between each release agent layer 7 are not particularly limited. Various shapes, sizes and gaps can be used.

For example, as shown in Figure 2, Figure 8 and Figure 9, the release agent layer 7 can be formed to cover all surfaces corresponding to the two end positions of the circuit region 13, or as shown in Figure 3, the release agent layer 7 can be formed on Corresponds to the position of the middle area of the circuit area 13, but the area not covered by the isolating agent layer 7 needs to be reserved. And as shown in FIG. 6, the release agent layer 7 may be formed not to cover all surfaces corresponding to both end positions of the circuit region 13, and to leave an area not partially covered. Further, the spacer layer 7 may be formed at a position corresponding to the middle region of the circuit region 13 without forming the spacer layer at positions corresponding to both ends of the circuit region 13 .

As a result of this structure, the first adhesive layer 2 is directly pressed on the surface of the substrate thin layer 1 where the release agent layer 7 is not formed. And the first adhesive layer 2 is directly pressed on the position where the release agent layer 7 is formed on the release agent layer 7 . Therefore, when the IC tag comes off after the IC tag is attached to, for example, the article 12, the first adhesive layer 2 comes off at the position where the release agent layer 7 is formed on the interface between the first adhesive layer 2 and the release agent layer 7, And the IC tag is torn at the interface between the article 12 and the second adhesive layer 5, or at a position in the second adhesive layer 5 where the release agent layer 7 is not formed. Thereby, the electronic circuit 3 and the substrate sheet 1 come off at the position where the electronic circuit 3 is pasted with the first adhesive layer 2, and then the electronic circuit is cut.

The release agent layer 7 is formed to cover preferably 20-90%, more preferably 40-80% of the area surrounded by an outer periphery of the circuit area 13 through the first adhesive layer 2 .

The release agent layer 7 is preferably formed such that the release agent layer 7 protrudes around the outside of the circuit region 13 . The width of the protruded region of the release agent layer 7 is not limited in any way. However, the width is preferably in the range of not more than 1 mm.

The shape of the release agent layer 7 preferably includes a triangle, a quadrangle, a polygon such as a pentagon and a polygon with more than five corners, an ellipse and a circle (refer to FIG. 2 , FIG. 3 and FIG. 6 ). The two shapes of the release agent layer 7 may be the same or different. The two release agent layers 7 are preferably completely and individually separated, but can be joined over parts of the release agent layers 7 .

The release agent used for the release agent layer 7 includes, for example, silicone resins, long-chain alkyl group-containing resins, and fluorine resins.

The thickness of the release agent layer 7 is not limited in any way. However, the thickness is preferably in the range of 0.01-5 μm, and more preferably in the range of 0.03-1 μm.

In the IC tag of the present invention, the electronic circuit 3 is formed on one surface of the first adhesive layer 2 .

The electronic circuit 3 comprises circuit lines 4 of an electrically conductive material. Conductive materials include, for example, metal simple substances such as metal foils, vapor-deposited films and films produced by sputtering. As the metal element, gold, silver, nickel, copper, aluminum or the like can be used. In addition, as the conductive material, conductive paste, which is produced by dispersing particles of a metal such as gold, silver, nickel and copper in a binder, can be used.

The average particle diameter of the metal particles is preferably in the range of 1-15 μm, and more preferably in the range of 2-10 μm. Binders include, for example, polyester resins, polyurethane resins, epoxy resins and phenolic resins.

The layer thickness of the circuit wire 4 forming the electronic circuit is not limited in any way. However, the thickness of the metal foil is preferably in the range of 5-50 μm, the thickness of the vapor-deposited film or the metal film produced by sputtering is preferably in the range of 0.01-1 μm, and the thickness of the conductive paste is preferably in the range of 5-30 μm.

The width of the circuit line 4 is not particularly limited, but is preferably in the range of 0.01-10 mm, more preferably in the range of 0.1-3 mm.

The method for forming the electronic circuit 3 on the surface of the first adhesive layer 2 includes, for example, a method of forming the electronic circuit 3 by adhering a metal foil to the substrate sheet 1 by using an adhesive, etching the metal foil , and remove areas that are not electronic circuits. The etching treatment can be performed using the same treatment as general etching treatment. Forming the electronic circuit 3 onto the surface of the first adhesive layer 2 can also be performed by adhering a conductive paste in the shape of the electronic circuit 3 to the surface of the first adhesive layer 2 by, for example, printing and pressing.

The shape of the electronic circuit 3 includes, for example, the shapes shown by FIGS. 2 and 3 . In Fig. 2 and Fig. 3, the electronic circuit 3 is used as an antenna by arranging circuit wires 4 of a conductive material wire in ten circles, the circles having a certain space between each wire, from a rectangular substrate sheet 1 The outer circumference of is arranged in the direction inward. The electronic circuits 3 may be arranged in ten turns as shown in FIGS. 2 and 3 , or may be arranged in single to nine turns, or in eleven or more turns.

The circuit line 4 in the electronic circuit 3 contains a bypass line 8 . The circuit line 4 containing a bypass line 8 can be the innermost circuit line 4, the outermost circuit line 4, or any one of the intermediate circuit lines 4. The angle formed by the tangent 15 of the bypass line 8 at the connection 14 between the bypass line 8 and the circuit line 4 is depicted as angle θ in FIG. 5 by the tangent 16 of the circuit line 4 at the connection 14 . The angle θ is 10 degrees or more, preferably 45 degrees or more, more preferably 80 degrees or more. The upper limit of the angle θ is preferably less than 180 degrees.

As a result of this structure, as shown in FIG. 4, the first adhesive layer 2 peels off at a position on the interface between the first adhesive layer 2 and the release agent layer 7, where the bypass line 8 is partially At the position where the release agent layer 7 is formed, it is pasted on the first adhesive layer 2 and the second adhesive layer 5 . At the position where the release agent layer 7 is not formed, the IC tag is torn in the second adhesive layer 5 . Thus, the electronic circuit 3 is released together with the substrate sheet 1 at the position where the electronic circuit 3 is pasted with the first adhesive layer 2, and then the electronic circuit is cut.

The shape of the bypass line 8 is not limited in any way, and includes various shapes, such as oval and circular shapes without a part of the perimeter line, triangular shapes with one side missing from the perimeter line, and quadrilateral shapes with one side missing from the perimeter line, such as squares and rectangles. , rhombuses and trapezoids, polygons whose perimeters lack one side, such as pentagons and polygons with more than five angles.

When the bypass line 8 is formed on the innermost circuit line 4, the size of the bypass line 8 is generally smaller than the vacant area surrounded by the electronic circuit. And, when the bypass line 8 is formed on the outermost circuit line 4, the size of the bypass line 8 is usually smaller than that of the IC tag. The part from the circuit line 4 to the bypass line 8 away from the longest route of the circuit line 4 is preferably not less than 2 mm.

The thickness of the bypass line 8 is not limited and is the same as that of the electronic circuit. The preferred thickness range is the same as that of electronic circuits.

The width of the bypass line 8 is not limited, and is preferably 0.01-10 mm, more preferably 0.1-3 mm.

The number of bypass lines 8 is preferably 1-10, more preferably 1-5. When a plurality of numbers of bypass lines 8 are formed, the shapes and/or sizes of the plurality of numbers of bypass lines 8 may be the same or different from each other.

The circuit lines 4 preferably contain extended planar protrusions 9 .

The shape of the planar protrusion 9 preferably includes symmetrical polygons such as square, regular hexagon, regular octagon and regular decagon, and symmetrical shapes such as circle, and their approximate shapes.

The planar protrusion 9 preferably has an area calculated according to the following formula:

S≥(2W) ²

Here S is the area of the flat protrusion, and W is the width of the circuit line adjacent to the flat protrusion.

Further, the plane protrusion 9 preferably contains an area calculated according to the following formula:

S≥(4W) ²

Here S and W are the same as above.

The upper limit of the area of the planar protrusion 9 is preferably not greater than 10%, more preferably not greater than 5% and most preferably not greater than 3% of the free area surrounded by the electronic circuit.

The thickness of the planar protrusion 9 is not limited and is the same as that of the electronic circuit. The preferred thickness range is the same as that of the electronic circuit.

As shown in FIGS. 3 and 6, the planar protrusion 9 may extend directly to the bypass line 8 of the circuit line 4 in the electronic circuit 3, or may pass through a bond connecting the planar protrusion 9 and the bypass line 8 of the circuit line 4. Line 10 extends.

As a result of this structure, as shown in FIG. 4, when a cut 17 is provided into the interface between the article 12 and the second adhesive layer 5 of the IC label to which the article 12 is pasted, by using a cutter or the like, the IC label is Come off, insert a finger element etc. into the cut 17 and clamp one end of the IC tag, at the position where the release agent layer 7 is formed in the interface between the first adhesive layer 2 and the release agent layer 7, in the bypass line 8 Or the position where the plane protrudes 9 sticks the first adhesive layer 2 and the second adhesive layer 5, the first adhesive layer 2 comes off, and in the interface between the article 12 and the second adhesive layer 5, or At the position where the release agent layer 7 is not formed on the second adhesive layer 5, the IC label is torn off. Thereby, the electronic circuit 3 and the substrate sheet 1 come off at the position where the electronic circuit 3 is pasted with the first adhesive layer 2, and then the electronic circuit is cut.

As shown in FIGS. 8 and 9 , the planar protrusions 9 may extend directly to the circuit lines in the electronic circuit 3 , or may extend through the bonding wires 10 connecting the planar protrusions 9 and the circuit lines 4 .

As a result of this structure, when the antenna is not cut at the interface of the release agent layer, as shown in FIG. 10, the IC tag comes off at a position where a part of the plane protrudes from the sticking substrate sheet. Therefore, the antenna function is destroyed.

The planar protrusion 9 may extend to the innermost circuit line 4 or the outermost circuit line 4 of the electronic circuit. Furthermore, the planar protrusion 9 can extend to any one of the intermediate circuit lines 4 . When the flat protrusion 9 extends to the intermediate circuit line 4 , adjacent outer circuit lines are formed avoiding the flat protrusion 9 .

The number of plane protrusions 9 is preferably 1-10, more preferably 1-5.

The material of the bypass line 8 is the same as that of the circuit line 4 in the electronic circuit. The bypass line 8 is preferably integral with the circuit line 4 .

Considering the manufacturing process, the material of the planar protrusion 9 is preferably the same as that of the circuit wire 4 or the bonding wire 10 , and the planar protrusion 9 is more preferably integrated with the circuit wire 4 and the bonding wire 10 .

The material of the bonding wire 10 is more preferably the same as that of the circuit wire 4 or the planar protrusion 9 .

Methods for extending bypass wires 8 , planar protrusions 9 and/or bonding wires 10 to circuit wires 4 in electronic circuit 3 include various methods. For example, various methods include a method of forming electronic circuits and bypass lines 8, planar protrusions 9 and/or bonding wires 10 by etching a metal foil, a method of forming circuit lines 4 in electronic circuits 3 by printing or pressing Bypass the line 8 method. More preferred is a method of forming electronic circuits and bypass lines 8 , planar protrusions 9 and/or bonding lines 10 by etching a metal foil.

When the bypass lines 8 and the planar protrusions 9 are formed, they may be formed at positions where the release agent layer 7 is not formed. However, it is more preferable to form at least one bypass line 8 or planar protrusion 9 at the position where the spacer layer 7 is formed in the circuit region. When the planar protrusions 9 extend to the bypass lines 8, at least one bypass line 8 is preferably formed, which contains the planar protrusions 9 extending to the location where the release agent layer 7 is formed in the circuit area.

As another embodiment of the IC tag of the present invention, as shown in Fig. 9 and Fig. 10, the plane protrusion 9 can directly extend to the circuit line 4 in the electronic circuit 3, without forming the bypass line 8 or the bonding line 10 to the Circuit wire 4 in electronic circuit 3 . In this case, the planar protrusion 9 may be formed at a position where the release agent layer 7 is not formed. However, it is more preferable to form at least one planar protrusion 9 at the position where the spacer layer 7 is formed in the circuit region. The number of planar protrusions 9 is preferably 1-10, more preferably 1-5. When a plurality of numbers of planar protrusions 9 are formed, shapes and/or sizes of the plurality of numbers of planar protrusions 9 may be the same or different, respectively.

The IC chip connects the two ends of the electronic circuit. The IC chip 6 may be formed inside the electronic circuit 3 , outside the electronic circuit 3 , or on top of the electronic circuit 3 .

In order to connect the outermost and innermost ends of the electronic circuit 3 to the IC chip 6, the outermost or innermost ends of the electronic circuit 3 are preferably connected to the IC chip 6 by electronically The circuit 3 forms a wire (jumper circuit) in an inward or outward direction without short-circuiting to the ring electronic circuit 3 .

The method of forming the jumper circuit includes a method for forming a conductive circuit line 4, by printing insulating ink on a part of the line crossing the circular electronic circuit 3, from one end of the electronic circuit 3 by screen printing, etc., and then by screen printing, etc. The resulting printed insulating ink is printed with a conductive paste in-line. The conductive glue includes the aforementioned conductive glue. Insulating inks include photocurable inks such as UV curable inks.

The method for connecting the IC chip 6 to the terminal of the electronic circuit 3 includes a connecting method by forming an anisotropic conductive film on the surface of the terminal of the electronic circuit 3 and then connecting the anisotropic conductive film by flip chip bonding. The flip-chip bonding method is a simple conduction method between the end of the electronic circuit 3 and the IC chip 6, by forming a line bump formed on an electrode portion of the IC chip 6, and then forming a line bump formed on the IC chip 6. The block is pressed onto the anisotropic conductive film covering the end surface of the electronic circuit 3 so that the line bumps are embedded in the anisotropic conductive film.

In the IC label of the present invention, the second adhesive layer 5 is pressed to cover the electronic circuit 3, the IC chip 6 and the first adhesive layer 2 on which the electronic circuit 3 is not formed.

The adhesive used in the second adhesive layer 5 includes various adhesives such as hot-melt adhesives, pressure-sensitive adhesives, and thermosetting adhesives. The kind of the adhesive includes, for example, the same as the aforementioned adhesive used in the first adhesive layer 2 .

Adhesives can be used alone or in combination of two or more components. Among these adhesives, pressure-sensitive adhesives are preferable and acrylic pressure-sensitive adhesives are more preferable.

The surface of the second adhesive layer 5 is preferably flat.

The thickness of the second adhesive layer 5 is not limited in any way. However, the thickness of the portion covering the electronic circuit 3 and the IC chip 6 is different from that of the portion covering the first adhesive layer 2 . The maximum thickness is generally in the range of 10-100 μm, preferably in the range of 15-50 μm.

The surface of the second adhesive layer 5 may be covered with a release liner 11 .

As the release liner 11, any release liner can be used. For example, a release liner in contact with the second adhesive layer 5 in which the substrate surface is subjected to the release treatment may be used as required. As substrates, films including various resins such as polyethylene terephthalate, polybutylene terephthalate, polyethylene, polypropylene, and polyarylate, and various paper-based Materials such as polyethylene embossed paper, polypropylene embossed paper, clay-coated paper, resin-coated paper, and cellophane.

In this case, representative examples include a release agent layer structure comprising release agents such as silicone resins, long-chain alkyl group-containing resins, and fluorine resins.

The thickness of the release liner 11 is not limited in any way. However, the thickness can be appropriately determined.

The second adhesive layer 5 can be formed by directly applying pressure to the electronic circuit 3, the IC chip 6 and the surface of the first adhesive layer 2 where no electronic circuit 3 is formed. Further, when the second adhesive layer 5 is formed by applying an adhesive to the surface of the release agent layer of the release liner 11, the second adhesive layer 5 can be pasted to the electronic circuit 3, the IC chip 6 and the electronic circuit not formed therein. 3 surface of the first adhesive layer 2.

The method of forming the first adhesive layer 2, the second adhesive layer 5 and the release agent layer 7 is not limited in any way, and various methods can be used. These methods include, for example, air knife coaters, knife coaters, barrier coaters, gravure coaters, glue rolls, curtain coaters, die coaters, knife coaters, screen coaters Fabric machines, Meyer fence coaters and kiss coaters.

As shown in FIG. 10, when the IC tag of another embodiment of the present invention comes off after the IC tag is attached to the article 12, the IC tag comes off at the same position as shown in FIG. 4, except that the bypass line 8 does not exist. As a result, the electronic circuit 3 is cut open.

example

Hereinafter, the present invention will be explained more specifically by way of examples. In addition, the present invention is not limited to these examples.

(Example 1)

The release agent layer 7 is formed by covering the trapezoid with two trapezoids and by an outer part of the electronic circuit in a shape as shown in FIG. The area enclosed by the circumference is about 75% of the area enclosed by one outer circumference of the electronic circuit, the distance between the end of the trapezoid and the outside of the substrate sheet 1 is 1 mm in length), silicone resin is applied to polyethylene terephthalate On one surface of the ester film (including a width of 100 mm, a length of 50 mm and a thickness of 50 μm), a certain amount was applied to form a dried thickness of 0.05 μm, and then dried and cured at 130° C. for one minute. Then, a polyester type hot-melt adhesive (manufactured by TOYO BOSEKI CO., LTD., trademark "BAYRON 30SS") was applied to the release agent layer 7 and the surface of the substrate sheet 1 by a gravure coater to a certain extent. The amount is to form a dry thickness of 5 μm to be pressed onto the first adhesive layer. Further, on the surface of the first adhesive layer 2, a layer of electrolytic copper foil having a thickness of 35 µm was heated and pressed by a welding roll at 100°C. Then, on the surface of the electrolytic copper foil, using the screen printing method, the etching-resistant ink is printed into ten circles of the circuit line 4 (antenna), including a long side of 45mm, a short side of 15mm, and a line width of 0.15mm, in the bypass line 8 Also connected to the innermost circuit line 4 having a line width of 0.15 mm.

The printed electrolytic copper foil was subjected to etching treatment using a ferric chloride solution to remove portions other than the ring circuit line 4 and the bypass line 8 . Then, the resist ink is removed using an aqueous alkali solution to form an electronic circuit 3 including a bypass line 8 as shown in FIG. 2 .

Regarding the size of the bypass line 8 and the angle θ of the tangent, the bypass line 8 having a rectangular perimeter minus one long side shape has a length of 5 mm, a width of 7 mm and an angle θ of 90 degrees. The bypass line 8 has the shape of an equilateral triangle with one side missing, with a side length of 7 mm and an angle θ of 60 degrees. The semicircular bypass line 8 has a circular perimeter shape with a radius of 3 mm and an angle Θ of 85 degrees. The bypass line 8 having a trapezoidal perimeter without an upper base has a lower base length of 10 mm, an upper base length of 3 mm, a height of 5 mm and an angle θ of 145 degrees.

In order to conduct the end of the innermost circle of the electronic circuit 3 (antenna) and the end of the outermost circle of the electronic circuit 3, an ultraviolet curable ink is printed in a line shape to the gap between them by a screen printing method. UV light is then irradiated to cure the UV curable ink. Then, silver paste (the average particle diameter of the silver paste is 5 μm, and the binder is polyester resin) is printed in a line shape (with a length of 10 mm) on the surface of the cured line of the UV-curable ink, and dried to form a jumper circuit.

Then, a wire bump was formed on an electrode portion of an IC chip 6 (manufactured by PHILIPS CO., trademark "I/CODE") using a gold wire. The IC chip 6 was connected to both ends of the circuit through an anisotropic conductive film (manufactured by SONY CHEMICALCO., LTD, trademark "FP23322D") using the flip-chip method.

On the other hand, a release liner 11 containing the second adhesive layer 5 was prepared by release treatment by applying an acrylic pressure-sensitive adhesive (produced by LINTEC CORPORATION, trademark "PA-T1") to the release liner. On the surface, it is obtained by using a roller knife coater, all surfaces of one side of a cellophane having a thickness of 70 μm are treated with a silicone resin release and dried to form a second adhesive layer having a thickness of 20 μm5 .

Then, all the surfaces of the electronic circuit 3 and the IC chip 6 are formed by sticking the second adhesive layer 5 in the release liner 11 containing the second adhesive layer 5 to the substrate sheet 1, the second adhesive layer 5 The laminated layer 5 covers the first adhesive layer 2, the electronic circuit 3 and the IC chip 6 to prepare an IC label.

The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The entire surface-treated release liner in the IC tag was peeled off, and the IC tag was stuck to a polypropylene resin plate. After 24 hours, by using a cutter to provide a cut 17 in the second adhesive layer at a length from the end of the IC tag to the inside of 5 mm, the IC tag was peeled off from the polypropylene resin plate. The portion of the electronic circuit 3 covered with the release agent layer 7 remains on the polypropylene resin plate. Portions other than the release agent layer 7 were peeled off from the polypropylene resin plate together with the polyethylene terephthalate sheet of the substrate sheet 1 . With the shedding, the electronic circuit is cut open. The peeled IC tags are inspected by non-contact emission and reception inspection (dropping and cutting inspection). As a result, transmission and reception cannot be performed.

The 30 IC tags were tested for detachment and cutting. As a result, all 30 IC tags were cut.

(Example 2)

An IC tag was produced in the same manner as described in Example 1, except that flat protrusions 9 and a release agent layer 7 were formed as shown in FIG. 3 . The shape of the release agent layer 7 contains an angle of 45 degrees, arranged in regular triangles at both ends of the circuit area, the width of the unpressurized part is 3mm, covered with triangles at both ends of the circuit area and covered with diamonds in the electronic circuit area. Area, and the area surrounded by the outer circumference of the electronic circuit 3 and the IC chip 6, is about 70% of the area surrounded by the outer circumference of the electronic circuit, and the interval length between the triangle end and the outside of the substrate sheet 1 is 1 mm. The shape and size of the bypass line 8 are the same as those in Example 1. The shape of the planar protrusion 9 is a circle having a diameter of 2 mm and a thickness of 35 mm. The bonding wire 10 has a length of 0.5 mm, a width of 0.1 mm, and a thickness of 35 μm. The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The 30 IC tags were tested for detachment and cutting. As a result, all 30 IC tags were cut.

(Example 3)

The IC tag was prepared in the same manner as described in Example 1, except that the bypass line 8 was not formed, the planar protrusion 9 directly extended to the circuit line 4, and the planar protrusion 9 and the release agent layer 7 were formed as shown in FIG. 6 . The shape of the release agent layer 7 is a pentagon with an oblique angle of 45 degrees, the width of the unpressurized part is 3mm, and the area covered by two pentagons and surrounded by the outer circumference of the electronic circuit 3 is about 60% of the area enclosed by the outer circumference of the circuit, the length of the interval between the end of the pentagon and the outside of the substrate sheet 1 is 1 mm. The shape of the planar protrusions 9 is a circle each having a diameter of 2 mm and a square having a side length of 2 mm, and a thickness of 35 mm. The bonding wire 10 has a length of 0.5 mm, a width of 0.1 mm, and a thickness of 35 μm. The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The 30 IC tags were tested for detachment and cutting. As a result, all 30 IC tags were cut.

(Example 4)

The release agent layer 7 is formed by covering two trapezoids with an outer circumference of an electronic circuit in a shape as shown in FIG. Enclosed area, approximately 75% of the area enclosed by one outer circumference of the electronic circuit, the space between the ends of the trapezoid and the outside of the substrate sheet 1 has a length of 1 mm), applying silicone resin to polyethylene terephthalate On one surface of the film (including a width of 100 mm, a length of 50 mm and a thickness of 50 μm), a certain amount was applied to form a dried thickness of 0.05 μm, and then dried and cured at 130° C. for one minute. Then, a polyester type hot-melt adhesive (manufactured by TOYO BOSEKI CO., LTD., trademark "BAYRON 30SS") was applied to the release agent layer 7 and the surface of the substrate sheet 1 by a gravure coater to a certain extent. The amount is to form a dry thickness of 5 μm to be pressed onto the first adhesive layer. Further, on the surface of the first adhesive layer 2, a layer of electrolytic copper foil having a thickness of 35 µm was heated and pressed by a welding roll at 100°C. Then, on the surface of the electrolytic copper foil, using the screen printing method, the etching-resistant ink is printed into ten circles of circuit lines 4 (antennas), including a long side of 45mm, a short side of 15mm, and a line width of 0.15mm. The bonding wire 10 is also connected to the innermost circuit wire, as shown in FIG. 8 .

The printed electrolytic copper foil is etched using a ferric chloride solution to remove the parts that are not ring circuit lines, the plane protrusions 9 and the bonding wires 10 . Then, the resist ink is removed using an aqueous alkaline solution to form an electronic circuit 3 with planar protrusions 9 and bond wires 10 extending, as shown in FIG. 8 . The dimensions of the flat protrusions 9 are each a circle having a diameter of 1 mm and a thickness of 35 mm. The bonding wire 10 has a length of 0.5 mm, a width of 0.1 mm, and a thickness of 35 μm.

In order to conduct the end of the innermost circle of the electronic circuit 3 (antenna) and the end of the outermost circle of the electronic circuit 3, an ultraviolet curable ink is printed in a line shape to the gap between them by a screen printing method. UV light is then irradiated to cure the UV curable ink. Then, silver paste (the average particle diameter of the silver paste is 5 μm, and the binder is polyester resin) is printed in a line shape (with a length of 10 mm) on the surface of the cured line of the UV-curable ink, and dried to form a jumper circuit.

Then, a wire bump was formed on an electrode portion of an IC chip 6 (manufactured by PHILIPS CO., trademark "I/CODE") using a gold wire. The IC chip 6 was connected to both ends of the circuit through an anisotropic conductive film (manufactured by SONY CHEMICAL CO., LTD., trademark "FP23322D") using the flip-chip method.

On the other hand, a release liner 11 containing the second adhesive layer 5 was prepared by release treatment by applying an acrylic pressure-sensitive adhesive (produced by LINTEC CORPORATION, trademark "PA-T1") to the release liner. On the surface, it is obtained by using a roller knife coater, all surfaces of one side of a cellophane having a thickness of 70 μm are treated with a silicone resin release and dried to form a second adhesive layer having a thickness of 20 μm5 .

Then, all the surfaces of the electronic circuit 3 and the IC chip 6 are formed by sticking the second adhesive layer 5 in the isolation substrate 11 containing the second adhesive layer 5 to the substrate sheet 1, the second adhesive layer 5 The laminated layer 5 covers the first adhesive layer 2, the electronic circuit 3 and the IC chip 6 to prepare an IC label.

The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

All the surface-treated release liners in the IC tags were peeled off, and the IC tags were stuck to a polypropylene resin board. After 24 hours, by using a cutter to provide a cut 17 in the second adhesive layer at a length from the end of the IC tag to the inside of 5 mm, the IC tag was peeled off from the polypropylene resin plate. The portion of the electronic circuit 3 covered with the release agent layer 7 remains on the polypropylene resin plate. Portions other than the release agent layer 7 were peeled off from the polypropylene resin plate together with the polyethylene terephthalate sheet of the substrate sheet 1 . With the shedding, the electronic circuit is cut open. The peeled IC tags are inspected by non-contact emission and reception inspection (dropping and cutting inspection). As a result, transmission and reception cannot be performed.

The 10 IC tags were tested for detachment and cutting. As a result, all 10 IC tags were cut.

(Example 5)

The IC tag is prepared in the same manner as described in Example 1, except that the planar protrusion 9 and the release agent layer 7 (containing an area covered with two quadrilaterals and surrounded by an outer circumference of the electronic circuit, approximately by an outer circumference of the electronic circuit 75% of the enclosed area) is formed as shown in FIG. 9 . The size of the planar protrusion 9 is a square with a side length of 2 mm and a thickness of 35 mm. The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The 10 IC tags were tested for detachment and cutting in the same way as described in Example 1. As a result, all 10 IC tags were cut.

(Example 6)

An IC tag was produced in the same manner as described in Example 2, except that the planar protrusions 9 were formed in a shape as shown in FIG. 11 . The size of the planar protrusion 9 is a circle with a diameter of 2 mm and a thickness of 35 mm. The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The 10 IC tags were tested for detachment and cutting in the same way as described in Example 1. As a result, all 10 IC tags were cut.

(comparative example 1)

IC tags were prepared in the same manner as described in Example 1, except bypass line 8 was not formed. The resulting IC tags are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The 10 IC tags were tested for detachment and cutting in the same way as described in Example 1. As a result, 6 out of 10 IC tags could come off without damaging the electronic circuit. IC tags that fall off without destroying the electronic circuit are checked by non-contact emission and reception inspection. As a result, transmission and reception can be performed correctly.

The IC tag of the present invention can be used for management tags of articles such as goods, stored articles, and loaded goods.

Claims (15)

1. An IC tag comprising a structure comprising a first adhesive layer laminated on the surface of a substrate sheet, an electronic circuit comprising a circuit line comprising a bypass line, and an electronic circuit connected to the first adhesive layer The IC chip of the electronic circuit on the surface, a second adhesive layer for covering the electronic circuit and the IC chip on the laminate, and a release agent layer partially formed at a position corresponding to a circuit region, wherein the The angle formed by the tangent of the bypass line and the tangent of the circuit line at the connection between the bypass line and the circuit line is greater than or equal to 45 degrees and less than 180 degrees, and the circuit area includes the electronic circuit and the IC chip , the release agent layer is located on the interface between the substrate sheet and the first adhesive layer. 2. The IC tag according to claim 1, wherein at least one bypass line is formed at a position in the circuit region where the spacer layer is formed. 3. The IC tag according to claim 1 or 2, wherein a flat protrudes to extend to the bypass line. 4. The IC tag according to claim 1 or 2, wherein the release agent layer is formed to cover a range of 20-90% of an area surrounded by the outer circumference of the circuit region by the first adhesive layer. 5. The IC tag according to claim 1 or 2, wherein a release liner is formed on a surface of the second adhesive layer which is not stuck to the first adhesive layer. 6. An IC tag comprising a structure comprising a first adhesive layer laminated on the surface of a substrate sheet, comprising an extended planar protruding electronic circuit, and connected to an electronic circuit formed on the first adhesive layer The IC chip of the electronic circuit on the surface, the second adhesive layer pressed for covering the electronic circuit and the IC chip, and a release agent layer partially formed at a position corresponding to a circuit area comprising The electronic circuit and the IC chip, the release agent layer is located at the interface between the substrate sheet and the first adhesive layer. 7. The IC tag of claim 6, wherein at least one bypass line is formed at a position in the circuit region where the spacer layer is formed. 8. The IC tag as claimed in claim 6, wherein the plane protrusion has an area calculated according to the following formula: S≥(2W) ² Here S is the area protruding from the plane, and W is the width of the circuit line protruding from the adjacent plane. 9. The IC tag of claim 6, wherein the release agent layer is formed to cover a range of 20-90% of an area surrounded by the outer circumference of the circuit region by the first adhesive layer. 10. The IC tag according to claim 6, wherein a release liner is formed on a surface of the second adhesive layer which is not stuck to the first adhesive layer. 11. An IC tag comprising a structure comprising a first adhesive layer laminated on the surface of a substrate sheet, containing an extended planar protruding electronic circuit, and connected to an electronic circuit formed on the first adhesive layer The IC chip of the electronic circuit on the surface, the second adhesive layer for covering the electronic circuit and the IC chip on the laminate, and a spacer partially formed at positions corresponding to both end portions of a circuit area layer, the circuit region includes the electronic circuit and the IC chip, the release agent layer is located on the interface between the substrate sheet and the first adhesive layer. 12. The IC tag of claim 11, wherein at least one bypass line is formed at a position in the circuit region where the spacer layer is formed. 13. The IC tag as claimed in claim 11, wherein the plane protrusion has an area calculated according to the following formula: S≥(2W) ² Here S is the area protruding from the plane, and W is the width of the circuit line protruding from the adjacent plane. 14. The IC tag of claim 11, wherein the release agent layer is formed to cover a range of 20-90% of an area surrounded by the outer circumference of the circuit region by the first adhesive layer. 15. The IC tag according to claim 11, wherein a release liner is formed on a surface of the second adhesive layer which is not stuck to the first adhesive layer.

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