CN101091237A - Epitaxial wafer manufacturing method and epitaxial wafer - Google Patents

Abstract

An epitaxial wafer manufacturing method at least includes a process (D) of growing an epitaxial layer thicker than a final target epitaxial layer on an epitaxial wafer having an initial thickness; a process (G) of planarizing the grown epitaxial layer by planarizing polishing; and a process (H) of polishing the epitaxial layer after the planarizing polishing. Preferably, a wafer having a TTV, which indicates planarity, of 2[mu]m or less is used as the epitaxial wafer, and further, the method includes an process (E) of grinding the chamfered part of the wafer and the process (E) of polishing the ground chamfered part. Thus, a technology of manufacturing the epitaxial wafer having excellent thickness uniformity of the epitaxial layer at a high productivity and low cost is provided, even when the epitaxial wafer is provided with the thick epitaxial layer.

Description

Manufacturing method of epitaxial wafer and epitaxial wafer

technical field

The invention relates to an epitaxial wafer, in particular to a method for manufacturing an epitaxial wafer with a thicker epitaxial layer and less thickness deviation.

Background technique

In the manufacture of semiconductor devices, epitaxial wafers in which silicon single crystals are deposited on substrates such as silicon wafers are used. The epitaxial wafer can be manufactured according to the process shown in FIG. 6 , for example. First, an etched silicon wafer (CW) is prepared as a substrate for an epitaxial wafer. When using a wafer with a high doping concentration, a CVD oxide film is formed on the back side in order to prevent self-doping. Subsequently, the surface of the wafer (the surface on the side where the epitaxial layer is grown) is polished, and then washed. Subsequently, an epitaxial layer composed of a silicon single crystal is grown to a predetermined thickness on the polished surface of the substrate using an epitaxial growth apparatus. Thereby, an epitaxial wafer can be manufactured, and it can be shipped after inspection etc. further.

The device characteristics of transistors, power MOS, and insulated gate bipolar transistors (IGBTs) manufactured using epitaxial wafers are closely related to the thickness and resistivity of the epitaxial layer. In order to obtain excellent device characteristics, the epitaxial layer on the silicon wafer must have a certain and the same resistivity and grow to the same thickness as the predetermined thickness. The control of the thickness and resistivity of the epitaxial layer is important. However, in order to maintain the epitaxial layer with the same resistivity and film thickness as the predetermined value while maintaining the surface quality of the epitaxial wafer, productivity must be sacrificed in many cases.

For example, in the widely used batch type epitaxial reaction apparatus (vertical machine), in order to make the thickness of the epitaxial layer in the batch constant, it is required to strictly control the temperature distribution in the susceptor on which the substrate is placed, The reaction gas flow in the reactor is balanced. As a result, the growth rate is usually about 1/3 to 1/5 of the growth rate that can be used as growth rate conditions, and epitaxial growth is usually performed at a growth rate of 1 μm/min or less. Also, even if the productivity of the batch-type epitaxial reaction device can be increased to be higher than that of the monolithic reaction device, it is desired to control it stably so that the thickness of the epitaxial layer within a batch and between batches is within ±5 % below is not possible.

On the other hand, in the monolithic epitaxial reaction apparatus, although the variation in the thickness of the epitaxial layer can be controlled to be lower than in the batch type apparatus, the productivity deteriorates. Especially when the epitaxial layer is grown to a relatively thick thickness, the productivity is significantly reduced and the cost is greatly increased.

Therefore, for example, when growing a thicker epitaxial layer of more than 50 microns, the thickness deviation becomes larger, the productivity is reduced, and the cost is increased, especially in the manufacture of high withstand voltage power MOS or IGBT that must have a thicker epitaxial layer (for example, more than 100 microns). When using epitaxial wafers, cost reduction becomes a big problem.

In addition, when growing a thick epitaxial layer, silicon tends to grow with attached foreign substances as crystal nuclei, and grows into large granular bumps. In addition, epitaxial layers called "protrusions" are easily formed on the peripheral portion of the wafer. The part with a thicker layer will become an obstacle to fine pattern processing in the device manufacturing process.

There is a proposal disclosing a technique for improving the surface state by applying polishing after epitaxial growth to remove the above-mentioned bumps or protrusions, but because of the problem of deterioration of the film thickness distribution of the so-called epitaxial layer, almost none of them have been proposed. Practical.

Moreover, when a thicker epitaxial layer is grown at a high speed, the epitaxial layer grown on the oblique portion of the substrate will also form a bridge connection with the polysilicon grown on the base. During the cooling process of the bridge connection, the Problems with peeling, back chipping, cracks, nicks, cracks, etc. occur. Therefore, there is a proposal (see JP-A-8-279470) disclosing a method of suppressing the growth of polysilicon at bevels and the like by performing epitaxial growth at a slow growth rate of 1.2 μm/min or less. However, when growing thicker epitaxial layers at low speeds, the productivity will be further reduced and the cost will increase significantly.

Contents of the invention

In view of the above problems, the main object of the present invention is to provide a technique that can manufacture epitaxial wafers with excellent epitaxial layer thickness uniformity at high productivity and at low cost even with thick epitaxial layers.

According to the method for manufacturing an epitaxial wafer of the present invention, a method for manufacturing an epitaxial wafer can be provided, which is aimed at a method for manufacturing an epitaxial wafer, and is characterized in that it includes at least the following steps: On the surface of the epitaxial layer, the step of growing the epitaxial layer to be thicker than the thickness of the final target epitaxial layer; the step of planarizing the aforementioned grown epitaxial layer; and grinding the aforementioned planarly ground epitaxial layer The step of the epitaxial layer.

In this way, the epitaxial layer is grown in advance to be thicker than the thickness of the final target epitaxial layer, and then, when the epitaxial layer is processed into a target thickness by performing plane grinding and grinding, an epitaxial layer with a thickness and excellent film thickness uniformity can be produced. layered epitaxial wafers. In addition, according to this method, since the control of the film thickness when growing the epitaxial layer can be relaxed, and the speed of growth is, for example, 3 to 6 times that of the conventional one, the subsequent surface grinding of the epitaxial layer can be performed in a short time, etc. High productivity and low cost epitaxial wafers can be manufactured.

At this time, it is preferable to perform surface grinding and polishing of the epitaxial layer so that the overall thickness of the substrate after grinding the epitaxial layer becomes the initial thickness of the aforementioned epitaxial substrate and the final target thickness of the aforementioned epitaxial layer. Thickness after being together.

Based on the initial thickness of the substrate, the final target thickness of the epitaxial layer, etc., when the epitaxial layer is processed according to the respective predetermined surface grinding and grinding thicknesses, it is possible to manufacture the desired thickness with good accuracy and more efficiently. Wafers with epitaxial layers.

In this case, laser marking is preferably added to the substrate in order to identify the respective initial thicknesses of the substrates for epitaxy.

In this way, when the initial thickness of each substrate is known by adding laser marking to the substrate, even if there is a thickness difference between the substrates, the thickness of the epitaxial layer can be processed to a desired thickness.

Furthermore, preferably, the thickness of the entire substrate after planar grinding of the epitaxial layer is set to be the initial thickness of the aforementioned epitaxial substrate, the final target thickness of the aforementioned epitaxial layer, and the grinding after the aforementioned planar grinding. The thickness obtained by adding the removed thicknesses together is used to perform the plane grinding of the aforementioned epitaxial layer.

Because the thickness of the grown epitaxial layer is mainly adjusted by plane grinding, the epitaxial layer can be formed more reliably and efficiently when performing plane grinding after considering the thickness of the subsequent grinding as described above.

As the aforementioned substrate for epitaxy, it is preferable to use a substrate whose TTV (indicating flatness) is 2 micrometers or less.

When a substrate having such a high flatness is used, a product in which the epitaxial layer also has high flatness and excellent thickness uniformity can be formed.

Before growing the epitaxial layer on the substrate for epitaxy, it is preferable to further include a step of forming a CVD oxide film at least in the center portion in the thickness direction from the rear surface side of the substrate to the bevel portion.

When forming an oxide film on the back side of the substrate and the bevel portion, especially when using a substrate with a high doping concentration, in addition to preventing self-doping during epitaxial growth, it is also possible to easily remove the oxide film on the back side during epitaxial growth. growing crystals etc.

After forming the CVD oxide film, it is preferable to polish the surface of the epitaxial substrate on the side where the epitaxial layer is grown.

Even if the CVD oxide film is formed on the surface side of the substrate, by polishing the surface side to make a mirror surface, an epitaxial layer with excellent crystallinity can be grown.

After growing the epitaxial layer on the substrate for epitaxy, it is preferable to further include a step of grinding the bevel portion of the substrate and a step of polishing the ground bevel portion.

After the epitaxial growth, the shape of the bevel is adjusted by applying grinding to the bevel and removing the deposits in the bevel. Even if a thick epitaxial layer is grown, the subsequent generation of particles, etc. can be reliably prevented. .

Preferably, the final target thickness of the aforementioned epitaxial layer is set to be 50 micrometers or more. When the final target thickness of the epitaxial layer is 50 microns or more, especially when it is 100 microns or more, it is possible to reliably achieve high-speed growth of the epitaxial layer, uniform thickness of the film by surface grinding, and cost reduction by improving productivity .

In the step of growing the aforementioned epitaxial layer, preferably, the epitaxial layer is grown to be at least 10 microns thicker than the aforementioned final target thickness.

That is, when the epitaxial layer is grown to be 10 microns thicker than the aforementioned final target thickness, the thickness removed by surface grinding and polishing can be ensured reliably.

Preferably, the aforementioned epitaxial layer is grown at a growth rate of 2.2 μm/min or higher.

Through high-speed epitaxial growth, the productivity can be definitely improved. Even if the high-speed growth forms an epitaxial layer with low flatness, it can also be processed into an epitaxial layer with high flatness by subsequent surface grinding.

Preferably, the aforementioned epitaxial layer is grown using a batch-type epitaxial growth apparatus.

When using a batch type device, epitaxial layers can be grown on many substrates at one time, which can further improve productivity.

Preferably, the epitaxial layer is grown by disposing the epitaxial substrate in a placement groove of the base, and the placement groove is formed such that the bottom gradually deepens from the periphery to the center.

When the epitaxial layer is grown using such a susceptor, deposition is less likely to occur on the bevel portion of the substrate, and generation of particles or the susceptor attached to the substrate can be suppressed.

After growing the epitaxial layer on the substrate for epitaxy, it is preferable to expose the initial surface on the back side of the substrate by etching, and then planarize the epitaxial layer.

When the surface grinding of the epitaxial layer is performed using the exposed initial back surface as a reference plane, the flatness of the epitaxial layer can be reliably improved.

Preferably, the aforementioned etching is performed using a spin etcher.

In particular, when polycrystals are deposited on the rear surface of the substrate during growth of the epitaxial layer, the initial rear surface of the substrate can be exposed in a short time using a spin etcher.

It is preferable to use a silicon substrate as the aforementioned substrate for epitaxy.

Epitaxial wafers using a silicon substrate can be mass-produced, and are particularly effective for the present invention that can achieve uniform film thickness and cost reduction even if the epitaxial layer is thick.

It is preferable to use a substrate whose taper angle of the bevel portion is smaller than 22 degrees as the substrate for epitaxy.

By using a substrate with a small taper angle, it is possible to suppress epitaxial growth at the bevel portion and prevent sticking to the susceptor and the like.

Moreover, according to the present invention, an epitaxial wafer can be provided, which is an epitaxial wafer manufactured by the aforementioned method, characterized in that the thickness of the epitaxial layer of the epitaxial wafer is more than 50 microns, and the thickness of the epitaxial layer is The deviation is ±4% or less.

When manufacturing an epitaxial wafer according to the method of the present invention, as mentioned above, an epitaxial wafer with a thicker epitaxial layer and less variation in thickness can be obtained.

In addition, the present invention can provide an epitaxial wafer, which is an epitaxial wafer with an epitaxial layer formed on a substrate, wherein the flatness TTV (representing flatness) of the aforementioned substrate is 2 microns or less, and the epitaxial wafer formed on the substrate The thickness of the epitaxial layer is more than 50 microns, and the thickness deviation of the epitaxial layer is ±4% or less.

Especially when a substrate with high flatness is used to manufacture an epitaxial wafer according to the method of the present invention, as described above, the epitaxial layer is relatively thick, and its thickness deviation is small, the overall flatness and thickness uniformity are excellent, and the price is low. cheap epitaxial wafers.

In this case, the in-plane thickness deviation of the epitaxial wafer may be further adjusted to be ±2 μm or less.

Because the flatness of the initial substrate is relatively high, the in-plane thickness deviation of the epitaxial wafer obtained by the present invention is also relatively small, especially when manufacturing devices such as high withstand voltage power MOS can be greatly improved. Yield.

In the present invention, when manufacturing the epitaxial wafer, the epitaxial layer is grown at a high speed to be thicker than the final thickness, and then the epitaxial wafer is processed into a desired thickness by plane grinding and grinding. Thereby, an epitaxial wafer having a thick epitaxial layer excellent in film thickness uniformity can be manufactured with high productivity and at low cost.

For example, even when producing a relatively thick epitaxial wafer of about 100 micrometers, it is possible to form an epitaxial layer with a small variation in thickness of the epitaxial layer, no protrusions, and excellent flatness of protrusions in the peripheral portion. Therefore, when such an epitaxial wafer is used to manufacture a device that must be microfabricated, the yield of the device can be significantly improved.

Description of drawings

FIG. 1 is a flowchart of an example of manufacturing steps of an epitaxial wafer according to the present invention.

FIG. 2 is a schematic diagram of wafers in various steps of manufacturing an epitaxial wafer according to the present invention.

FIG. 3 is a graph showing variations in the thickness (epitaxy thickness) of the epitaxial layer in Examples and Comparative Examples. (A) Comparative example, (B) Example.

FIG. 4 is a cross-sectional shape of an outer peripheral portion of an epitaxial wafer according to an example and a comparative example. (A) Comparative example, (B) Example.

FIG. 5 is a graph showing the particle size (particle size > 0.2 μm) of the epitaxial wafers of the embodiment and the comparative example. (A) Comparative example, (B) Example.

FIG. 6 is a flowchart of an example of a conventional epitaxial wafer manufacturing procedure.

Fig. 7 is a schematic diagram of an example of a base that can be used in the present invention.

Fig. 8 is a graph illustrating a taper angle of a bevel portion of a wafer.

Detailed ways

Hereinafter, a preferred embodiment when an epitaxial wafer is produced using a silicon substrate (silicon wafer) as an epitaxial substrate will be specifically described with reference to the drawings.

FIG. 1 is a flowchart of an example of manufacturing steps of an epitaxial wafer according to the present invention. Moreover, FIG. 2 is a schematic diagram of wafers in each step of manufacturing an epitaxial wafer according to the present invention.

First, a silicon wafer (CW: chemically etched wafer) is prepared as a substrate (substrate for epitaxy) for growing an epitaxial layer ( FIG. 1(A) ).

As the silicon wafer, a silicon wafer generally used for manufacturing semiconductor devices can be used. For example, silicon single crystal slices grown by the Czochralski method are prepared through grinding, bevel processing, etching and other steps.

Also, because the flatness of the substrate has a significant impact on the flatness of the epitaxial layer grown thereon, and then on the flatness of the epitaxial wafer produced at last, the higher the flatness of the substrate, the better, and the specific flatness , is to use a TTV (flatness) of 2 microns or less, particularly preferably 1 micron or less.

Furthermore, in the present invention, in the subsequent step, after growing the epitaxial layer on the substrate, the epitaxial layer is processed to a desired thickness by plane grinding and grinding. Such plane grinding is preferably performed based on the initial thickness of the substrate. Therefore, the thickness of the silicon wafer serving as the substrate should be measured initially, and laser marking is preferably added to the substrate in order to identify each initial thickness. For example, laser marking is used to add an ID number to the back side of each wafer, and the data on the initial thickness of each substrate can be managed by the ID number.

Before growing an epitaxial layer on the surface of the prepared silicon wafer, a CVD (SiO ₂ ) oxide film was deposited at least on the center portion in the thickness direction from the back side of the substrate to the bevel portion ( FIG. 1(B) ).

As shown in FIG. 2(A), when the CVD oxide film 2 is formed on the back side of the wafer 1, self-doping during epitaxial growth can be prevented when a substrate with a high doping concentration is used. Also, regardless of the doping concentration, when the CVD oxide film (SiO ₂ ) is formed from the back side to the center in the thickness direction of the bevel portion, it is possible to suppress the deposition of polysilicon on the back surface or the bevel portion during epitaxial growth or pollute. Also, in the subsequent epitaxial layer growth step, even if a silicon layer grows on the back side, when the CVD oxide film is subsequently removed, it can be easily removed by removal. Moreover, when there is a CVD oxide film on the back, there is also an advantage that it is not easy to attach to the base. In addition, in order to fully exert these effects, it is preferable to form the CVD oxide film with a thickness of 0.2 μm or more.

After the CVD oxide film is formed, the surface side of the substrate on which the epitaxial layer grows is polished, and then cleaned (FIG. 1(C)). In addition, washing is also appropriately performed in other steps, and the description of this item will be omitted.

As described above, when the CVD oxide film is formed on the back surface and the bevel portion of the wafer, the CVD oxide film may also be formed on the front side. When a CVD oxide film is formed on the surface, there is a possibility of polysilicon growth in the epitaxy step. Therefore, after forming the CVD oxide film, by polishing the surface side on which the epitaxial layer was formed, an epitaxial layer excellent in crystallinity and thickness uniformity can be grown reliably.

Subsequently, as shown in FIG. 2(B), an epitaxial layer 3 is grown on the surface of the polished substrate 1 . Subsequently, the epitaxial layer 3 is now grown to be thicker than the thickness of the final target epitaxial layer ( FIG. 1D ).

The thickness of the grown epitaxial layer 3 can be determined by considering the thickness of the final target epitaxial layer, the thickness of the surface grinding and grinding after the growth of the epitaxial layer, and the like. However, if the epitaxial layer 3 is only grown to be several microns thicker than the final target thickness, the subsequent planarization by surface grinding may not be sufficiently performed. Therefore, considering the thickness removed by the subsequent surface grinding and polishing of the epitaxial layer, it is preferably grown to be 10 microns or more thicker than the final target thickness, particularly preferably grown to be 15 microns or more thicker than the final target thickness. However, if the thickness of the epitaxial layer is too thick, the growth time and the subsequent surface grinding time will be longer, and the productivity may be reduced. Therefore, it is preferable to grow the epitaxial layer thickness to the final target + 30 microns or less.

Although the thickness of the final target epitaxial layer is related to the purpose of use of the epitaxial wafer, when the final thickness of the epitaxial layer is thicker, the removal rate by subsequent surface grinding is relatively small, and the improvement can be fully exerted. productivity and cost reduction. Therefore, the final target thickness of the epitaxial layer is set to be greater than 50 microns, particularly preferably greater than 80 microns. In other words, the present invention is particularly effective for manufacturing epitaxial wafers having an epitaxial layer with a final thickness of 50 μm or more.

Also, the growth rate of the epitaxial layer is not particularly limited, because the faster the growth rate, the higher the productivity, which is 3 to 6 times the growth rate in the past, specifically 2.2 μm/min or more, more preferably 3.0 μm/min or more high speed. Such high-speed growth can be achieved by increasing the supply of raw material gases such as silane sources.

The epitaxial growth apparatus to be used is also not particularly limited, and generally, vertical type, cylindrical type, and monolithic type are widely used, and any type of apparatus can be used in the present invention.

For example, when using a batch-type epitaxial growth device, it is possible to grow epitaxial layers on multiple wafers at a rate of 2.2 μm/min or more, which can definitely improve productivity. On the other hand, in a monolithic device, epitaxial growth can be grown at a growth rate above 5.0 μm/min, which can fully improve productivity.

In addition, when a thick epitaxial layer is formed by high-speed growth, there is a possibility of sticking between the wafer and the susceptor accommodating the wafer due to polysilicon bridge connection. Therefore, it is preferable to use the base 5 formed with a V-shaped placement groove 6 , as shown in FIG. 7 , the bottom of which is gradually deepened from the periphery to the center. When the substrate (silicon wafer) 1 is disposed in the placement groove 6 of the susceptor 5 for epitaxial growth, the above-mentioned generation of bridge connection can be effectively suppressed.

Also, as the silicon wafer 1 of the substrate, the taper angle θ of the bevel portion 7 as shown in FIG. 8 is usually not more than 22 degrees. Sticking between the wafer 1 and the base or accumulation of polysilicon on the back is easy to occur. Also, by making the shape of the bevel asymmetrical, by coating the center of the bevel in the thickness direction with the CVD oxide film as described above, or by using both, it is possible to suppress accumulation of polysilicon on the bevel or the like. When using such a beveled shape different from the normal shape, the beveled shape of the normal substrate can be obtained without hindrance because the bevel processing is performed in the next step.

After growing the epitaxial layer on the wafer, the bevel portion of the wafer is ground, and then the ground bevel portion is ground (FIG. 1(E)).

The shape of the bevel portion of the wafer is one of the important factors affecting the quality of the device process. Polycrystalline silicon can be suppressed to some extent by the shape of the pedestal or the shape of the bevel, etc., to some extent. When polysilicon is deposited on the bevel, or a wafer with an asymmetric shape of the bevel is used When , the probability of occurrence of particles and cracks in subsequent device steps increases.

In addition, when a thick epitaxial layer is grown, as described above, the growth rate of the peripheral portion becomes faster and bumps (protrusions) tend to be generated, and these bumps cause poor resolution during the photolithography step. In order to improve the device characteristics, it is important to take resolution measures in the peripheral part in the power MOS that pattern processing is progressing toward miniaturization.

Therefore, after the high-speed epitaxial growth step, as shown in FIG. Grinding the bevel part can be processed into an ideal bevel shape that can be used in the most advanced devices. That is, by performing the same off-angle processing as the wafer for the most advanced device after the growth of the epitaxial layer, it is possible to stably perform microfabrication that can reach the peripheral portion.

Furthermore, the bevel portion processing performed as described above may be performed after surface grinding the epitaxial layer described later. That is, after surface grinding the epitaxial layer, the bevel portion is ground to adjust the shape, and then the bevel portion is ground to perform mirror finishing. Alternatively, it is also possible to perform surface grinding of the epitaxial layer after grinding the bevel portion, and then perform grinding of the bevel portion.

Also, for example, after forming an epitaxial layer using a wafer with an asymmetric bevel shape, grinding and polishing the bevel portion can also be processed into the same bevel shape as a general mirror wafer that is more suitable for device steps. (eg cone angle of 22 degrees).

Subsequently, the initial surface on the back side of the wafer is exposed by etching (FIG. 1(F)). By removing the CVD oxide film on the back side by etching using HF or the like, the initial back side of the wafer can be exposed, as shown in FIG. 2(D). Also, even if polysilicon is grown on the back side of the wafer during epitaxial growth, the polysilicon can be simultaneously removed (removed) when the oxide film is removed by etching. However, since normal etching of immersing a wafer in an etchant may take a long time, spin etching may be used in order to avoid long-time etching. For example, polysilicon accumulated on the back side is removed by etching only the back side by spin etching using a fluoronitric acid-based etchant. That is, by removing the SiO ₂ oxide film on the back side by etching, the initial surface on the back side of the wafer can be exposed in a short time. By removing SiO ₂ on the back side in this way, the initial thickness of the substrate can be maintained.

In addition, the etching for exposing the initial surface on the rear side as described above may be performed after growing the epitaxial layer on the wafer, or may be performed between grinding and polishing the aforementioned bevel portion.

Subsequently, the aforementioned grown epitaxial layer is planarized by planar grinding ( FIG. 1(G) ), and then the planar-ground epitaxial layer is ground ( FIG. 1(H )).

By performing planar grinding and grinding on the epitaxial layer, the thickness of the final epitaxial layer and the epitaxial wafer can be adjusted. For example, as described above, the initial thickness of the substrate is measured and managed in a recognizable manner so that the overall thickness of the substrate after polishing the epitaxial layer is obtained by adding the initial thickness of the epitaxial substrate and the final target thickness of the epitaxial layer. The resulting thickness is used to planarize and polish the epitaxial layer of each respective substrate.

In particular, the planar grinding of the epitaxial layer enables planarization, and at the same time, the thickness of the epitaxial layer can be greatly adjusted. Furthermore, when the epitaxial layer is surface-ground using the initial back surface exposed by etching as a reference plane, extremely high flatness can be obtained. For example, based on the ID number of the laser marking attached to the initial substrate, the initial thickness of each wafer is identified, and the remaining thickness after surface grinding is set as the initial thickness of the wafer, the final target thickness of the epitaxial layer and After surface grinding, the thickness obtained by adding the grinding thickness produced by grinding is used for surface grinding. By performing such surface grinding, the epitaxial layer can be processed to a high flatness and can be adjusted to a desired thickness. In addition, after forming the CVD oxide film, it is also possible to consider the polishing thickness when performing surface polishing (FIG. 1(C)).

In addition, the thickness of each epitaxial substrate is not limited to be managed by ID marking or the like from the initial stage, and the thickness of the substrate and the thickness of the epitaxial layer may be measured after epitaxial growth to determine the grinding thickness. In addition, it is also possible to perform surface grinding by setting the removed thickness instead of setting the remaining thickness after surface grinding.

After surface grinding the epitaxial layer, grinding is performed. By this polishing, the processing strain of the epitaxial layer caused by plane grinding can be removed, and the surface of the epitaxial layer can be mirror-finished. As mentioned above, if the remaining thickness after surface grinding can be adjusted to be the thickness obtained by adding the initial thickness of the wafer, the final target thickness of the epitaxial layer, and the grinding thickness produced by the grinding after surface grinding, it is also Grinding may be performed by the aforementioned predetermined grinding-off thickness.

Through the steps as described above, an epitaxial wafer 4 having a thick and highly flat epitaxial layer as shown in FIG. 2(E) can be manufactured.

For example, when growing an epitaxial layer using a vertical epitaxial growth device commonly used in the past, it is very difficult to grow an epitaxial layer with a thickness deviation of ±5% or less relative to the standard center. However, according to the present invention, it is not necessary to control the thickness deviation. A thicker epitaxial layer is formed in advance, and by setting a predetermined thickness (initial thickness of the epitaxial substrate + specification center epitaxial layer thickness + grinding thickness) during surface grinding, the overall thickness of the wafer can be processed to include the in-plane The deviation is ±2 microns. Since the in-plane deviation of the substrate used is about ±1 micron, the thickness of the epitaxial layer can be controlled to be ±2.5 micron relative to the standard center. If the standard center thickness is thicker than 50 microns, the thickness of the epitaxial layer can be controlled at the same level or higher than the conventional vertical epitaxial growth device, and the controllability can be improved proportionally when the target thickness is thicker.

Furthermore, specifically, it is also possible to manufacture an epitaxial wafer in which the thickness of the epitaxial layer is not less than 50 micrometers and the thickness variation of the epitaxial layer is not more than ±4%. In particular, when the initial substrate is a silicon wafer whose TTV (representing flatness) is 2 microns or less, the thickness of the epitaxial layer formed on the wafer can also be 50 microns or more, and the thickness variation of the epitaxial layer is An epitaxial wafer with ±4% or less, and an epitaxial wafer with an in-plane thickness deviation within ±2 microns can also be manufactured.

In addition, in the present invention, for example, because epitaxial growth can be performed at a growth rate 3 to 6 times that of the conventional one, even if excess epitaxial growth is performed (thickness removed by grinding and grinding is, for example, about 20 microns), It can also increase productivity by about 2 to 3 times. For example, when finally forming an epitaxial layer with a thickness of 100 microns, in the present invention, the epitaxial layer is grown, even if the processing (grinding and grinding) of the bevel portion and the epitaxial layer is performed, the cost of these steps is higher than that in the past for improving the flatness When the cost of the step of growing the epitaxial layer is compared at a low speed, it can be completed with only about half of it. As a result, the overall cost of the epitaxial wafer manufacturing process can be significantly reduced.

In this way, the epitaxial wafer with a thicker epitaxial layer produced by the present invention has the same planarization and mirror processing as the wafer used for manufacturing the most advanced devices. Such a thick epitaxial wafer can be suitably used for high withstand voltage power MOS, IGBT, etc. for forming fine patterns, and stable device characteristics and high yield can be obtained.

Hereinafter, examples and comparative examples of the present invention will be described.

Example

Prepare 200 silicon wafers with a diameter of 200 mm, a thickness specification of 625 μm, a P type, a resistivity of 5 to 10 mΩcm, and a TTV (flatness specification) of 2.0 μm or less as substrates for epitaxy. An oxide film (SiO ₂ ) was formed on each wafer from the back side to the bevel portion by CVD. In addition, the thickness (initial thickness) of each wafer was measured before forming the CVD oxide film, and an ID number was added to each wafer by laser marking.

Epitaxial growth is a vertical epitaxial growth device that uses high-frequency heating. The epitaxial growth thickness was set at 120 μm, the source gas was trichlorosilane, the carrier gas was H ₂ gas, and the supply rate of trichlorosilane was adjusted so that the growth rate was 4 μm/min. The epitaxial growth temperature (pedestal temperature) was set at 170°C. Also, the resistivity of the target epitaxial layer is N-type, 30Ωcm.

In addition, in order to suppress the bridge connection during epitaxial growth, a base is used, the base is formed with a placement groove, the bottom of which has a V-shaped inclination depth of about 0.2 mm from the periphery to the center.

After growing an epitaxial layer on a silicon wafer using the conditions described above, the bevel portion was ground (equivalent to #3000) and then polished to make the bevel portion into a mirror surface state.

After finishing the processing of the bevel part, dip the wafer in HF aqueous solution to remove the _SiO2 film on the back side. At this time, the polysilicon grown thinly on the outer periphery of the wafer during the epitaxial growth process is removed by lift-off, so that the back surface of the initial wafer is exposed as a reference plane to ensure the subsequent surface grinding step. flatness.

Then, use a surface grinding device to change the processing thickness setting value according to the initial thickness of each wafer, and grind the epitaxial layer (#3000) to the thickness relative to the last epitaxial layer (100 microns) plus grinding Up to a thickness of 7 microns. This surface grinding is performed with the initial rear surface of the above-mentioned exposed substrate as a reference plane.

After surface grinding, use a batch type grinder and a silica-based abrasive to perform grinding in stages to maintain high flatness. The surface is ground in such a way that the grinding thickness from the first grinding to the completion of grinding is 7 microns. The beveled surface becomes a mirror surface.

After grinding, wash with the ammonia/hydrogen peroxide and hydrochloric acid/hydrogen peroxide washing solutions used in the manufacture of common mirror wafers to obtain an epitaxial wafer with an epitaxial layer with a thickness of 100 microns.

comparative example

For the same silicon wafer as the substrate used in the examples, an epitaxial layer was grown to a thickness of about 100 microns on the surface of the wafer using a vertical epitaxial growth apparatus to obtain an epitaxial wafer.

The variation in the thickness of the epitaxial layer (epitaxy thickness) of the epitaxial wafers produced in each of the examples and comparative examples was measured, and each is shown in FIG. 3 . (A) is data showing a comparative example, and (B) is data showing an example.

As shown in FIG. 3(A), the epitaxial thickness of the comparative example is in the range of 96-108 microns in the wafer plane, and the deviation is relatively large.

On the other hand, as shown in FIG. 3(B), in the epitaxial wafer of the embodiment, the thickness of the epitaxial layer is in the range of 98-102 microns, including only a few values, but all are within 100±4 microns in the wafer plane. Within the range, the uniformity is excellent.

Subsequently, the cross-sectional shapes of the outer peripheral portions of the wafers produced in the examples and the comparative examples were measured, and each was as shown in FIG. 4 . (A) is data showing a comparative example, and (B) is data showing an example.

In the outermost peripheral portion of the epitaxial wafer of the comparative example, a bump called a convex portion was observed. When there is such a large bump, there is a problem that it is impossible to perform microfabrication with a stepper when manufacturing a device.

On the other hand, it was found that the convex portion could not be observed in the wafer of the examples, and it was found that microfabrication was possible up to the outermost peripheral portion of the wafer.

Moreover, FIG. 5 is a graph showing the particle size (particle size>0.2 μm) of each epitaxial wafer produced in the embodiment and the comparative example.

As shown in FIG. 5(A) , in the comparative example, there are many large particles having a particle diameter of 5 micrometers or more, which is considered to have a significant influence on the device yield. In contrast, as shown in FIG. 5(B), the number of particles in the example is small, and there are almost no large particles with a particle diameter of 5 microns or more. Whether there are such particles, especially, this quality item will affect the yield improvement of microfabricated devices such as high withstand voltage power MOS, it is extremely useful to know that the epitaxial wafer of the embodiment is used to manufacture such devices.

In addition, this invention is not limited to the said embodiment. The above-described embodiments are merely illustrative, and all methods having the technical idea described in the claims of the present invention, substantially the same structure, and achieving the same effect are included in the technical scope of the present invention.

For example, when manufacturing an epitaxial wafer according to the present invention, the steps in FIG. 1 are not limited, and the sequence of steps can be changed. For example, after the growth of the epitaxial layer, the grinding of the bevel portion and the plane grinding of the epitaxial layer can also be performed. Further, polishing of the bevel portion and the epitaxial layer is performed. Moreover, it is also possible to add a step, for example, after polishing, after grinding, etc., Needless to say, appropriate washing can be performed.

In addition, the substrate for epitaxy is not limited to a silicon wafer, and is not particularly limited if it is a substrate used as an epitaxy wafer. In addition, the silicon wafer to be used is not limited to CW, and it is of course also possible to use a PW (polished wafer) whose back side is also ground.

Claims (20)

1. the manufacture method of a Jingjing sheet of heap of stone, it is at the method for making Jingjing sheet of heap of stone, it is characterized by, and comprises following step at least:

Having the of heap of stone brilliant of initial stage thickness, make epitaxial layer grow to the step thicker than the built crystal layer thickness of ideal with on the surface of substrate;

Aforementioned epitaxial layer of having grown is carried out flat surface grinding and the step of planarization; And

The step of the epitaxial layer of grinding after aforementioned flat surface grinding.

2. the manufacture method of Jingjing sheet of heap of stone as claimed in claim 1, wherein aforementioned epitaxial layer is carried out flat surface grinding and grinding, make the substrate integral thickness that grinds behind the aforementioned epitaxial layer, become aforementioned brilliant initial stage thickness and the ideal thickness of the aforementioned epitaxial layer thickness after adding together with substrate of heap of stone.

3. the manufacture method of Jingjing sheet of heap of stone as claimed in claim 1 or 2 is wherein for the aforementioned brilliant initial stage thickness with substrate of heap of stone of difference identification, at substrate additional laser mark.

4. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～3, wherein with the thickness of the substrate integral body behind the aforementioned epitaxial layer of flat surface grinding, be set at aforementioned crystalline substance of heap of stone is added the thickness that together forms with the ideal thickness of the initial stage thickness of substrate, aforementioned epitaxial layer and the thickness that grinding ground off after the aforementioned flat surface grinding, carry out the flat surface grinding of aforementioned epitaxial layer.

5. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～4, wherein using TTV is that substrate below 2 microns is as aforementioned wafer substrate of heap of stone.

6. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～5, wherein aforementioned crystalline substance of heap of stone with substrate on before the growth epitaxial layer, further contain at least in the rear side of this substrate certainly and form the step of CVD oxide-film to the central part of the thickness direction of oblique angle portion.

7. the manufacture method of Jingjing sheet of heap of stone as claimed in claim 6, wherein form aforementioned CVD oxide-film after, grind the surface of the aforementioned brilliant aforementioned epitaxial layer side of growth with substrate of heap of stone.

8. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～7, wherein aforementioned crystalline substance of heap of stone with substrate on behind the growth epitaxial layer, further contain this substrate of grinding oblique angle portion step and grind this grinding after the step of oblique angle portion.

9. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～8, wherein the ideal thickness setting with aforementioned epitaxial layer is more than 50 microns.

10. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～9, wherein, this epitaxial layer is grown to thicker at least more than 10 microns than aforementioned ideal thickness in the step of the aforementioned epitaxial layer of growth.

11., wherein make aforementioned epitaxial layer with the growth more than 2.2 microns/minute as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～10.

12., wherein use the crystals growth device of heap of stone of the batch aforementioned epitaxial layer of growing as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～11.

13. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～12, the wherein growth of aforementioned epitaxial layer is that aforementioned crystalline substance of heap of stone is configured in substrate in the putting groove of pedestal, the formation of this putting groove is that deepen towards central authorities gradually from periphery the bottom.

14. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～13, wherein aforementioned crystalline substance of heap of stone with substrate on behind the growth epitaxial layer, make the showing out of initial stage of this substrate back side by etching, subsequently, aforementioned epitaxial layer is carried out flat surface grinding.

15. the manufacture method of Jingjing sheet of heap of stone as claimed in claim 14 wherein uses the spin etch device to carry out aforesaid etching.

16. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～15, wherein aforementioned crystalline substance of heap of stone is to use silicon substrate with substrate.

17. as the manufacture method of each described Jingjing sheet of heap of stone in the claim 1～16, wherein aforementioned crystalline substance of heap of stone is to use the angle of taper of oblique angle portion than the little substrate of 22 degree with substrate.

18. a Jingjing sheet of heap of stone, it is to use the made Jingjing sheet of heap of stone of each method in the claim 1～17, and the thickness that wherein should build the epitaxial layer of Jingjing sheet is more than 50 microns, and the thickness deviation of this epitaxial layer is below ± 4%.

19. Jingjing sheet of heap of stone, it is the Jingjing sheet of heap of stone that is formed with epitaxial layer on substrate, wherein the flatness TTV of this aforesaid base plate is below 2 microns, the thickness of formed epitaxial layer on this substrate be more than 50 microns and the thickness deviation of this epitaxial layer for below ± 4%.

20. thickness deviation is below ± 2 microns in the Jingjing sheet of heap of stone as claimed in claim 19, the face of wherein aforementioned Jingjing sheet of heap of stone.

Images