CN101951237A - Laminated sheet type filter and preparation method thereof - Google Patents

Abstract

The invention discloses a laminated sheet type filter and a preparation method thereof, belonging to the technical field of electron component. The filter is formed by compounding a laminated sheet type capacitance and a laminated sheet type magnetic core inductance, wherein the laminated sheet type capacitance is laminated and sintered by multiple layers of ferrite diaphragms of which the surface is printed with conductor wires, composite medium material is arranged between the terminal electrode contained by the laminated sheet type capacitance and a ground electrode, and the composite medium material comprises ferrite material and columnar ceramic arrays distributed in the ferrite material. The preparation method comprises the following steps: burdening, casting, pulping, forming arrays/ interconnecting holes, filling ceramics/ conductor paste, printing conduction band, laminating, equalizing pressure of hot water, cutting, burning, blocking and the like. The invention increases the equivalent dielectric constant in common ferrite structure by adding the columnar ceramic array structure in the capacitance part of the laminated sheet type filter, improves Q value and capacity and effectively lowers the off frequency of the filter and improves the out of band rejection characteristic of the filter.

Description

A kind of multilayer chip filter and its preparation method

technical field

The invention belongs to the technical field of electronic components, and relates to a chip filter, in particular to a laminated chip ferrite filter containing a dielectric ceramic columnar array and a preparation method thereof.

Background technique

As the whole machine and system have higher and higher requirements on the size and weight of electronic components, the filter is a passive component widely used in the system and the whole machine, so it is very important to reduce its size and weight, especially for anti-electromagnetic interference applications The research of the anti-electromagnetic interference filter with small size and high reliability has become a current focus of attention. For this reason, manufacturers at home and abroad develop and produce miniaturized, low cut-off frequency anti-electromagnetic interference filters in the form of multi-layer chip structures.

At present, the anti-electromagnetic interference filter of the laminated chip structure has a circuit and a structural form of a C-type capacitor form of a parallel capacitor to ground using a single dielectric ceramic material or a pure inductive form of a single ferrite multilayer inductor. These structures The form of anti-electromagnetic interference filter has the disadvantages of low out-of-band suppression performance and poor squareness. In order to solve the disadvantage of poor out-of-band suppression characteristics of filters, filter manufacturers improve the frequency band characteristics of filters by adopting multi-layer LC circuit structures. A common structure is an LC filter made of a single dielectric ceramic material. The filter with this structure improves the out-of-band rejection characteristics, but to meet the application requirements of a lower cut-off frequency, it is necessary to increase the capacitance of the filter and Inductance value, since the magnetic permeability of dielectric ceramics is very small, the inductance value can only be increased by increasing the number of inductance layers, thus greatly increasing the volume and weight of the filter. There are also LC-type filters made of a single ferrite material. Also because the dielectric constant of the ferrite material is very small, if you want to increase the capacitance to meet the requirements of a lower cut-off frequency, you can only increase the number of capacitor layers. Realization will also greatly increase the volume and weight of the filter; at the same time, the operating frequency range of the filter is usually lower than 500MHz due to the low resonance frequency of a single ferrite material. Another type of filter is formed by stacking the inductance part with ferrite materials, and the capacitor part is formed by stacking dielectric ceramic materials, and then combining the two parts into one to form a split-layer LC filter. Although this type of filter improves The out-of-band characteristics of the filter are improved, but due to the interface effect between the ceramic layer and the ferrite layer, and the crystal grain size and shrinkage rate of the two materials are different, a large amount of stress will be generated at the interface during debinding and sintering. The two materials The difference in shrinkage rate and direction accelerates the accumulation of stress. This interface stress plus the shrinkage mismatch between material layers often causes cracks, delamination and warping inside the filter, and in severe cases, it will cause cracking of the ceramic body. Greatly reduces the reliability of the filter.

Contents of the invention

In view of the above problems, the task of the present invention is to provide a novel multilayer chip filter and its preparation method, the filter has the advantages of low cut-off frequency, high out-of-band rejection, good squareness coefficient, wide operating frequency range, etc.; The chip filter provided by the invention does not need to modify the existing equipment, and its preparation technology is compatible with the conventional chip component technology and LTCC technology.

The present invention introduces a ceramic columnar array into the existing LC-type ferrite chip filter to effectively increase the capacitance of the filter. Since the columnar array is uniformly distributed, the ferrite material used as the main structure can effectively control each element in the columnar array. The shrinkage of a single cylinder reduces the internal stress of the porcelain body and alleviates the interface effect of heterogeneous materials, thereby improving the reliability of the porcelain body as a whole.

The technical scheme that the present invention takes is as follows:

A multilayer chip filter, as shown in Figure 1, is composed of a multilayer chip capacitor and a multilayer chip magnetic core inductor, and has a multilayer chip structure. The multi-layer chip core inductor is formed by stacking and sintering ferrite diaphragms with conductor lines printed on the surface of multiple layers. The conductor lines on the surface of the multi-layer ferrite diaphragms are connected to each other and form an inductance coil. The inductance coil One lead-out end is connected to one end electrode of the whole filter, and the other lead-out end is connected to the other end electrode of the whole filter. The laminated chip capacitor includes two terminal electrode plates and a ground electrode plate, wherein one terminal electrode plate is connected to one terminal electrode of the whole filter, and the other terminal electrode plate is connected to the other terminal electrode of the whole filter, The ground electrode plate is connected to the ground electrode of the whole filter; between the terminal electrode and the ground electrode is a composite dielectric material, which includes ferrite material and columnar ceramic array distributed in the ferrite material.

The laminated chip filter provided by the present invention can also be expanded into a periodic structure. As shown in Figure 2, the multilayer chip filter with periodic expansion structure provided by the present invention, the filter is separated from each other by a plurality of said multilayer chip capacitors and a plurality of said multilayer chip magnetic core inductors layered together.

Compared with the existing C-type, resistance-capacitance type, and pure inductance type chip filters (the insertion loss-frequency curves of various types of filters are shown in Figure 4), the filter provided by the present invention has the following advantages:

(1) The inductance part in the filter has the advantages of large inductance value, small equivalent series resistance, and small parasitic parameters, which improves the transmission performance in the passband of the filter;

(2) By filling the diaphragm of the capacitor part with low-dielectric and high-frequency ceramic materials, a columnar array is formed after multi-layer stacking, which effectively increases the capacitance and Q value of the capacitor part in the filter, and reduces the volume of the filter And weight, while enhancing the out-of-band rejection characteristics and high-frequency characteristics of the filter, weakening the "tail lift" phenomenon that the out-of-band rejection of the filter becomes worse as the frequency increases, and expanding the application range of the filter's operating frequency.

(3) In the actual preparation process of the present invention, the dielectric ceramic material is filled through the through holes, and the columnar array formed after multi-layer stacking is evenly distributed, and each individual columnar ceramic material in the array is used as the iron core of the main structure Oxygen materials are closely surrounded and controlled, so as to effectively decompose the internal stress of the porcelain body, relieve the interface effect between heterogeneous materials, greatly reduce the shrinkage mismatch during co-firing, and solve the layered cracking phenomenon that may occur during co-firing of the porcelain body. The reliability of the filter is improved as a whole. This method is simple and efficient, and the batch consistency is good.

Description of drawings

Fig. 1 is a schematic diagram of a vertical cross-sectional structure of a multilayer chip filter provided by the present invention.

Fig. 2 is a schematic view of the vertical cross-section of the multilayer chip filter with a periodically expanded structure provided by the present invention.

Fig. 3 is a schematic plan view of the columnar ceramic array structure provided by the present invention.

Fig. 4 is a comparison diagram of the insertion loss-frequency curves of the multilayer chip filter provided by the present invention and the related filter.

Detailed ways

A multilayer chip filter, as shown in Figure 1, is composed of a multilayer chip capacitor and a multilayer chip magnetic core inductor, and has a multilayer chip structure. The multi-layer chip core inductor is formed by stacking and sintering ferrite diaphragms with conductor lines printed on the surface of multiple layers. The conductor lines on the surface of the multi-layer ferrite diaphragms are connected to each other and form an inductance coil. The inductance coil One lead-out end is connected to one end electrode of the whole filter, and the other lead-out end is connected to the other end electrode of the whole filter. The laminated chip capacitor includes two terminal electrode plates and a ground electrode plate, wherein one terminal electrode plate is connected to one terminal electrode of the whole filter, and the other terminal electrode plate is connected to the other terminal electrode of the whole filter, The ground electrode plate is connected to the ground electrode of the whole filter; between the terminal electrode and the ground electrode is a composite dielectric material, which includes ferrite material and columnar ceramic array distributed in the ferrite material.

The laminated chip filter provided by the present invention can also be expanded into a periodic structure. As shown in Figure 2, the multilayer chip filter with periodic expansion structure provided by the present invention, the filter is separated from each other by a plurality of said multilayer chip capacitors and a plurality of said multilayer chip magnetic core inductors Stacked together, so as to realize the structure form of parallel connection of inductors and capacitors, to meet the needs of various application fields.

A method for preparing a laminated chip filter, comprising the following steps:

Step 1: Prepare a ferrite green ceramic diaphragm. Select ferrite powder with an initial magnetic permeability between 100 and 1000, mix it uniformly by ball milling to make a ferrite slurry, and then prepare a ferrite green ceramic diaphragm by dry casting, record For diaphragm A. The thickness of the single-layer diaphragm A is controlled between 10 um and 100 um.

Step 2: Prepare ceramic slurry. Select ceramic powder with a dielectric constant between 10 and 100, add additives and uniformly mix through ball milling to obtain ceramic slurry. The auxiliary agent includes binder, dispersant, alcohol and toluene.

Step 3: Punch array holes. Select the corresponding number of diaphragms A for the preparation of multilayer chip capacitors, and drill equidistant array holes, the diameter of the holes is 0.2mm, and the center distance between the holes is 0.6mm, and the diaphragm A with the array holes is marked as diaphragm B .

Step 4: Fill ceramic slurry. Fill the ceramic slurry prepared in step 2 into the array holes of the diaphragm B to obtain the diaphragm D.

Step 5: Drill interconnection holes. Select the corresponding number of diaphragms A for the preparation of laminated chip core inductors, and make interconnection holes at the positions where the wires need to be interconnected in the preparation of the inductors. The diameter of the interconnection holes is 0.2mm, and the diaphragms with the interconnection holes A is recorded as diaphragm C.

Step 6: Fill the conductive paste. The conductive paste was filled into the interconnection holes of the diaphragm C to obtain the diaphragm E.

Step 7: Printing. Use conductive paste to print the electrode or terminal electrode pattern required by the multilayer chip capacitor on the surface of part of the diaphragm B to obtain the diaphragm F; similarly, use the conductive paste to print the multilayer chip magnetic core inductor on the surface of the diaphragm C Diaphragm G is obtained by the required wire pattern.

Step 8: Lamination, hot water pressure equalization, select a certain number of diaphragms A, diaphragm F and diaphragm G, and stack them one by one according to the filter structure. After lamination, dense blocks are formed by means of hot water pressure equalization.

Step 9: Cutting, debinding, sintering and capping. The blocks formed in step 8 are cut to form rectangular parallelepiped chips of the same size, and placed in a debinding furnace and a sintering furnace for debinding and sintering to form dense and uniform ceramic chips of the same size. The chip is sealed to finally obtain the multilayer chip filter of the present invention.

Claims (3)

1. A multilayer chip filter, which is composited by a multilayer chip capacitor and a multilayer chip magnetic core inductor, has a multilayer chip structure; it is characterized in that: the multilayer chip magnetic core inductor is composed of The ferrite diaphragm with conductor lines printed on the multi-layer surface is stacked and sintered. The conductor lines on the surface of the multi-layer ferrite diaphragm are connected to each other and form an inductance coil. One lead end of the inductance coil is connected to one of the entire filter. The terminal electrodes are connected, and the other lead-out terminal is connected to the other terminal electrode of the whole filter; the laminated chip capacitor includes two terminal electrode plates and a ground electrode plate, one of which is connected to one terminal electrode of the entire filter The other terminal electrode plate is connected to the other terminal electrode of the whole filter, and the ground electrode plate is connected to the ground electrode of the whole filter; between the terminal electrode and the ground electrode is a composite dielectric material, which includes A ferrite material and a columnar ceramic array distributed in the ferrite material. 2. The multilayer chip filter according to claim 1, wherein the multilayer chip filter has a periodic structure, and a plurality of the multilayer chip capacitors and a plurality of the stacked Chip core inductors are stacked at intervals. 3. A method for preparing a laminated chip filter, comprising the following steps: Step 1: Prepare ferrite green ceramic diaphragm; select ferrite powder with initial magnetic permeability between 100 and 1000, mix it uniformly through ball milling, make ferrite slurry, and then cast it by dry method The ferrite green ceramic diaphragm is prepared by this method, which is denoted as diaphragm A; the thickness of the single-layer diaphragm A is controlled between 10um and 100um; Step 2: Prepare ceramic slurry; select ceramic powder with a dielectric constant between 10 and 100, add additives and mix uniformly through ball milling to obtain ceramic slurry; the additives include binders, dispersants, alcohols and toluene. Step 3: Drill array holes; select the corresponding number of diaphragms A for the preparation of multilayer chip capacitors, and punch equidistant array holes with a diameter of 0.2 mm and a center distance between holes of 0.6 mm. Sheet A is denoted as diaphragm B; Step 4: filling ceramic slurry; filling the ceramic slurry prepared in step 2 into the array holes of diaphragm B to obtain diaphragm D; Step 5: Make interconnection holes; select the corresponding number of diaphragms A for the preparation of laminated chip core inductors, and punch interconnection holes at the positions where wire interconnection is required for the preparation of inductors. The diameter of the interconnection holes is 0.2 mm, and the Diaphragm A with interconnected holes is marked as diaphragm C: Step 6: Filling the conductive paste; filling the conductive paste into the interconnection holes of the diaphragm C to obtain the diaphragm E; Step 7: Printing; use conductive paste to print the electrode or terminal electrode pattern required for the laminated chip capacitor on the surface of part of the diaphragm B to obtain the diaphragm F; similarly, use the conductive paste to print the laminate on the surface of the diaphragm C Diaphragm G is obtained from the wire pattern required by the chip core inductor; Step 8: Lamination, hot water pressure equalization, select a certain number of diaphragms A, diaphragm F and diaphragm G, and stack them one by one according to the filter structure; after lamination, a dense block is formed by means of hot water pressure equalization ; Step 9: Cutting, debinding, sintering and capping; cut the block formed in step 8 to form a cuboid chip of the same size, and put it into a debinding furnace and a sintering furnace for debinding and sintering to form a size The same, dense and uniform ceramic chip. The chip is sealed to finally obtain the multilayer chip filter of the present invention.

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