CN102403282A - 有基岛四面无引脚封装结构及其制造方法 - Google Patents
有基岛四面无引脚封装结构及其制造方法 Download PDFInfo
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- CN102403282A CN102403282A CN2011103742372A CN201110374237A CN102403282A CN 102403282 A CN102403282 A CN 102403282A CN 2011103742372 A CN2011103742372 A CN 2011103742372A CN 201110374237 A CN201110374237 A CN 201110374237A CN 102403282 A CN102403282 A CN 102403282A
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- Prior art keywords
- base island
- metal substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/60—Arrangements for protection of devices protecting against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/04—Manufacture or treatment of leadframes
- H10W70/042—Etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/411—Chip-supporting parts, e.g. die pads
- H10W70/417—Bonding materials between chips and die pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
- H10W70/424—Cross-sectional shapes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/456—Materials
- H10W70/457—Materials of metallic layers on leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/014—Manufacture or treatment using batch processing
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/016—Manufacture or treatment using moulds
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/811—Multiple chips on leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/019—Manufacture or treatment using temporary auxiliary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (9)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103742372A CN102403282B (zh) | 2011-11-22 | 2011-11-22 | 有基岛四面无引脚封装结构及其制造方法 |
| JP2014541503A JP2015502035A (ja) | 2011-11-22 | 2012-01-06 | クワッド・フラット・ノーリード(qfn)パッケージ構造及びその製造方法 |
| PCT/CN2012/000018 WO2013075383A1 (en) | 2011-11-22 | 2012-01-06 | Quad flat no-lead (qfn) packaging structures and method for manufacturing the same |
| US14/260,303 US9209115B2 (en) | 2011-11-22 | 2014-04-24 | Quad flat no-lead (QFN) packaging structure and method for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103742372A CN102403282B (zh) | 2011-11-22 | 2011-11-22 | 有基岛四面无引脚封装结构及其制造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102403282A true CN102403282A (zh) | 2012-04-04 |
| CN102403282B CN102403282B (zh) | 2013-08-28 |
Family
ID=45885346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103742372A Active CN102403282B (zh) | 2011-11-22 | 2011-11-22 | 有基岛四面无引脚封装结构及其制造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US9209115B2 (zh) |
| JP (1) | JP2015502035A (zh) |
| CN (1) | CN102403282B (zh) |
| WO (1) | WO2013075383A1 (zh) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102683315A (zh) * | 2011-11-30 | 2012-09-19 | 江苏长电科技股份有限公司 | 滚镀四面无引脚封装结构及其制造方法 |
| CN104269393A (zh) * | 2014-09-15 | 2015-01-07 | 江苏长电科技股份有限公司 | 一体金属框架静电释放圈用于指纹传感器结构及制造方法 |
| CN114823363A (zh) * | 2022-05-13 | 2022-07-29 | 宁波福驰科技有限公司 | 一种芯片封装方法 |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9997439B2 (en) * | 2015-04-30 | 2018-06-12 | Qualcomm Incorporated | Method for fabricating an advanced routable quad flat no-lead package |
| US11729915B1 (en) | 2022-03-22 | 2023-08-15 | Tactotek Oy | Method for manufacturing a number of electrical nodes, electrical node module, electrical node, and multilayer structure |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004349397A (ja) * | 2003-05-21 | 2004-12-09 | Sharp Corp | 半導体装置およびそれに用いられるリードフレーム |
| CN201233888Y (zh) * | 2008-07-30 | 2009-05-06 | 江苏长电科技股份有限公司 | 功能引脚和芯片承载底座凸出式半导体封装结构 |
| US20090166828A1 (en) * | 2007-12-28 | 2009-07-02 | Suresh Upadhyayula | Etched surface mount islands in a leadframe package |
| CN101814482A (zh) * | 2010-04-30 | 2010-08-25 | 江苏长电科技股份有限公司 | 有基岛引线框结构及其生产方法 |
| CN102005432A (zh) * | 2010-09-30 | 2011-04-06 | 江苏长电科技股份有限公司 | 四面无引脚封装结构及其封装方法 |
| WO2011087119A1 (ja) * | 2010-01-18 | 2011-07-21 | ローム株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11195742A (ja) * | 1998-01-05 | 1999-07-21 | Matsushita Electron Corp | 半導体装置及びその製造方法とそれに用いるリードフレーム |
| JP2001077230A (ja) * | 1999-09-02 | 2001-03-23 | Ricoh Co Ltd | リードフレーム及びそれを用いた半導体装置実装体 |
| EP1406300B1 (en) * | 2001-07-09 | 2012-02-22 | Sumitomo Metal Mining Company Limited | Method of manufacturing a lead frame |
| JP2004158753A (ja) * | 2002-11-08 | 2004-06-03 | Sony Corp | リードフレーム材及びその製造方法、並びに半導体装置及びその製造方法 |
| JP4091050B2 (ja) * | 2005-01-31 | 2008-05-28 | 株式会社三井ハイテック | 半導体装置の製造方法 |
| US7825514B2 (en) * | 2007-12-11 | 2010-11-02 | Dai Nippon Printing Co., Ltd. | Substrate for semiconductor device, resin-sealed semiconductor device, method for manufacturing said substrate for semiconductor device and method for manufacturing said resin-sealed semiconductor device |
| KR101204092B1 (ko) * | 2008-05-16 | 2012-11-22 | 삼성테크윈 주식회사 | 리드 프레임 및 이를 구비한 반도체 패키지와 그 제조방법 |
| US8124447B2 (en) * | 2009-04-10 | 2012-02-28 | Advanced Semiconductor Engineering, Inc. | Manufacturing method of advanced quad flat non-leaded package |
| JP2011108818A (ja) * | 2009-11-17 | 2011-06-02 | Mitsui High Tec Inc | リードフレームの製造方法および半導体装置の製造方法 |
| JP5387374B2 (ja) * | 2009-12-04 | 2014-01-15 | 住友金属鉱山株式会社 | リードフレームの製造方法 |
| CN101969032B (zh) * | 2010-09-04 | 2012-04-11 | 江苏长电科技股份有限公司 | 双面图形芯片正装先镀后刻模组封装方法 |
| JP2011211248A (ja) * | 2011-07-29 | 2011-10-20 | Toyo Kohan Co Ltd | Qfn用金属積層板を用いたqfnの製造方法 |
| CN102420206B (zh) * | 2011-11-30 | 2014-05-14 | 江苏长电科技股份有限公司 | 先镀后刻四面无引脚封装结构及其制造方法 |
-
2011
- 2011-11-22 CN CN2011103742372A patent/CN102403282B/zh active Active
-
2012
- 2012-01-06 JP JP2014541503A patent/JP2015502035A/ja active Pending
- 2012-01-06 WO PCT/CN2012/000018 patent/WO2013075383A1/en not_active Ceased
-
2014
- 2014-04-24 US US14/260,303 patent/US9209115B2/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004349397A (ja) * | 2003-05-21 | 2004-12-09 | Sharp Corp | 半導体装置およびそれに用いられるリードフレーム |
| US20090166828A1 (en) * | 2007-12-28 | 2009-07-02 | Suresh Upadhyayula | Etched surface mount islands in a leadframe package |
| CN201233888Y (zh) * | 2008-07-30 | 2009-05-06 | 江苏长电科技股份有限公司 | 功能引脚和芯片承载底座凸出式半导体封装结构 |
| WO2011087119A1 (ja) * | 2010-01-18 | 2011-07-21 | ローム株式会社 | 半導体装置およびその製造方法 |
| CN101814482A (zh) * | 2010-04-30 | 2010-08-25 | 江苏长电科技股份有限公司 | 有基岛引线框结构及其生产方法 |
| CN102005432A (zh) * | 2010-09-30 | 2011-04-06 | 江苏长电科技股份有限公司 | 四面无引脚封装结构及其封装方法 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102683315A (zh) * | 2011-11-30 | 2012-09-19 | 江苏长电科技股份有限公司 | 滚镀四面无引脚封装结构及其制造方法 |
| CN102683315B (zh) * | 2011-11-30 | 2015-04-29 | 江苏长电科技股份有限公司 | 滚镀四面无引脚封装结构及其制造方法 |
| CN104269393A (zh) * | 2014-09-15 | 2015-01-07 | 江苏长电科技股份有限公司 | 一体金属框架静电释放圈用于指纹传感器结构及制造方法 |
| CN114823363A (zh) * | 2022-05-13 | 2022-07-29 | 宁波福驰科技有限公司 | 一种芯片封装方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20140319664A1 (en) | 2014-10-30 |
| JP2015502035A (ja) | 2015-01-19 |
| WO2013075383A1 (en) | 2013-05-30 |
| US9209115B2 (en) | 2015-12-08 |
| CN102403282B (zh) | 2013-08-28 |
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Effective date of registration: 20161230 Address after: The 300000 Tianjin FTA test area (Dongjiang Bonded Port) No. 6865 North Road, 1-1-1802-7 financial and trade center of Asia Patentee after: Xin Xin finance leasing (Tianjin) Co., Ltd. Address before: 214434 Binjiang Middle Road, Jiangyin Development Zone, Jiangsu, China, No. 275, No. Patentee before: Jiangsu Changdian Sci. & Tech. Co., Ltd. |
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Application publication date: 20120404 Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd. Assignor: Xin Xin finance leasing (Tianjin) Co., Ltd. Contract record no.: 2017320000152 Denomination of invention: Packaging structure with basic islands and without pins at four sides and manufacturing method thereof Granted publication date: 20130828 License type: Exclusive License Record date: 20170614 |
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Assignee: JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY Co.,Ltd. Assignor: Xin Xin finance leasing (Tianjin) Co., Ltd. Contract record no.: 2017320000152 Date of cancellation: 20200416 |
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Effective date of registration: 20200429 Address after: 214434, No. 78, mayor road, Chengjiang, Jiangsu, Jiangyin, Wuxi Patentee after: JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY Co.,Ltd. Address before: 1-1-1802-7, North Zone, financial and Trade Center, No. 6865, Asia Road, Tianjin pilot free trade zone (Dongjiang Free Trade Port Area) Patentee before: Xin Xin finance leasing (Tianjin) Co., Ltd. |