CN103018564B - Method for testing diffused layer resistance of finished cell - Google Patents
Method for testing diffused layer resistance of finished cell Download PDFInfo
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- CN103018564B CN103018564B CN201310002813.XA CN201310002813A CN103018564B CN 103018564 B CN103018564 B CN 103018564B CN 201310002813 A CN201310002813 A CN 201310002813A CN 103018564 B CN103018564 B CN 103018564B
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- 238000012360 testing method Methods 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 31
- 239000010703 silicon Substances 0.000 claims abstract description 31
- 238000013178 mathematical model Methods 0.000 claims abstract description 10
- 238000009792 diffusion process Methods 0.000 claims description 24
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000005259 measurement Methods 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 5
- 235000008216 herbs Nutrition 0.000 claims description 3
- 238000001465 metallisation Methods 0.000 claims description 3
- 210000002268 wool Anatomy 0.000 claims description 3
- 238000009795 derivation Methods 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 abstract 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 239000000523 sample Substances 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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- Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
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Abstract
The invention discloses a method for testing diffused layer resistance of a finished cell. The method includes: testing square resistance of a plurality of groups of known diffused silicon wafers and square resistance of the finished cell, building mathematical model between the diffused square resistance and the square resistance of the finished cell, and deducing the square resistance of a diffused layer of the finished cell. Compared with the prior art, sheet resistance of the diffused layer of the finished cell can be tested fast and accurately. The method is simple and easy without adding extra testing cost, and easy to operate.
Description
Technical field
The present invention relates to photovoltaic industry, crystal silicon cell performance test field, is specifically related to a kind of method of test product cell piece diffused layer resistance.
Background technology
Sun power be use not to the utmost, the energy without cease of getting, is also considered to the product of most potential alternative traditional fossil energy.Solar cell is solar radiation to be converted into the device of electric energy, because solar cell machinery-free motion, and long service life, the feature such as maintenance cost is low, is current optimal photoelectric conversion device.Wherein crystal silicon cell is because its electricity conversion is high, and the features such as stable performance have occupied more than 90% share in sun power market.
Conventional crystal-silicon solar cell is on P type silicon chip, to expand phosphorus to manufacture P-N knot, utilizes the built in field of P-N knot to produce photovoltage, and its manufacturing process mainly comprises: surface-texturing, high temperature expand phosphorus P-N knot processed, PECVD coated with antireflection film, electrode printing.Wherein P-N knot is the heart of solar cell, and its quality directly has influence on the photoelectric transformation efficiency of battery, thereby phosphorus diffusion is a vital step in battery manufacture process.In battery production process, be generally by taking a sample test the mode of the diffused layer resistance of the rear silicon chip of diffusion, battery being carried out to character surveillance.But, once after plated film or make after cell piece finished product, its diffused layer resistance just cannot be tested.
In current battery production run, square resistance sampling observation ratio is in 2% left and right, once some battery efficiency occurs that its real square resistance is just had no way of learning, cannot be determined whether the problem of diffusion extremely.Thereby set up a kind of by the method for test battery sheet diffused layer resistance, for battery production extremely look into because of and quality management and control significant.
Summary of the invention
goal of the invention:object of the present invention has just been to provide a kind of method of test product cell piece diffused layer resistance, and the diffused layer resistance of test product cell piece, provides data for analyzing cell piece process abnormality rapidly and accurately.
technical scheme:technical scheme of the present invention is as follows:
A method for test product cell piece diffused layer resistance, is characterized in that comprising the following steps:
(1) get the silicon chip that quality is close some, silicon chip is divided into groups;
(2) silicon chip is cleaned and making herbs into wool;
(3) with different target sheet resistance value, every group of silicon chip spread, then on every silicon chip, with fixed position, test diffusion layer square resistance;
(4) silicon chip film-coated, and the square resistance of measurement silicon chip fixed position;
(5) silicon chip metallization, and the square resistance of measurement finished product cell piece fixed position; After silicon chip metallization, obtain finished product cell piece;
(6) after the diffusion of every group, get the mean value of this group silicon chip with finished product cell piece square resistance, square resistance mean value and diffusion at finished product cell piece are set up mathematical model between square resistance mean value afterwards, then by described Derivation of Mathematical Model, draw the diffusion layer square resistance of finished product cell piece.
Described in step 1, set up mathematical model silicon chip grouping used and require to be no less than 3 groups, every group is no less than 2.
Described square resistance test position is uniformly distributed in silicon chip, and as far as possible identical with finished product cell piece square resistance test point position after diffusion, and finished product cell piece square resistance test point is between two thin grid lines.
Described mathematical model is applicable to test the finished product cell piece diffused layer resistance of same battery manufacturing process, if battery process changes, needs to re-establish model.
principle of work:the present invention is spread rear and finished product cell piece square resistance by testing the known silicon chip of many groups, after diffusion, between square resistance and finished product cell piece square resistance, sets up mathematical model, then derives and draws the diffusion layer square resistance of finished product cell piece.
beneficial effect:adopt the present invention of technique scheme to have the following advantages: the present invention can test out the diffusion layer sheet resistance of finished product cell piece rapidly and accurately; The present invention is simple and can additionally not increase testing expense, easy operating.
Accompanying drawing explanation
Fig. 1 is the finished product cell piece square resistance and the rear square sensitivity figure of diffusion of the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described further.
Below in conjunction with preferred concrete embodiment, to the in addition detailed explanation of the method for a kind of test product cell piece of the present invention diffused layer resistance, it mainly comprises following concrete steps:
(1) get 5 groups of silicon chips, 5 every group, battery process cleaning routinely, making herbs into wool.
(2) 5 groups of silicon chips are put in tubular diffusion furnace, respectively according to desired value: 50,60,70,80,90 ohm/ carry out phosphorus diffusion.
(3) according to identical pattern, on silicon chip, select equably 5 points, test the square resistance of the rear N-type layer of its diffusion with four point probe resistivity tester, test result is as listed in following table 1.
(4) according to conventional batteries technique etching, plated film, print electrode and sintering, and the square resistance after making with the position measurement battery that four point probe resistivity tester is tested square resistance afterwards in diffusion, table with test results 1 is listed.
Table 1 finished product cell piece square resistance and the rear square resistance of diffusion
(5) take and spread rear square resistance as horizontal ordinate, the finished product cell piece square resistance of take is ordinate, and cut-off line is through as far as possible many points, and as shown in Figure 1, the equation of this straight line of numerical evaluation is finished product cell piece: y=1.049x-12.49.
(6) at random at 10 silicon chips of battery production line extraction, according to the position measurement with identical in step (1), spread the square resistance of rear and finished product cell piece, test result is as listed in table 2;
(7) by the finished product cell piece square resistance substitution formula of randomly drawing, calculate the square resistance after diffusion, result of calculation is as listed in table 2.
Table 2 finished product cell piece calculates sheet resistance and calculates diffusion rear resistance
Result of calculation and actual value maximum error are 2.36%, meet testing requirement.
The above is only of the present invention preferred embodiment a kind of; be noted that for those skilled in the art; under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection of the present invention.
Claims (4)
1. a method for test product cell piece diffused layer resistance, is characterized in that comprising the following steps:
(1) get the silicon chip that quality is close some, silicon chip is divided into groups;
(2) silicon chip is cleaned and making herbs into wool;
(3) with different target sheet resistance value, every group of silicon chip spread, then on every silicon chip, with fixed position, test diffusion layer square resistance;
(4) silicon chip film-coated, and the square resistance of measurement silicon chip fixed position;
(5) silicon chip metallization, and the square resistance of measurement finished product cell piece fixed position;
(6) after the diffusion of every group, get the mean value of this group silicon chip with finished product cell piece square resistance, square resistance mean value and diffusion at finished product cell piece are set up mathematical model between square resistance mean value afterwards, then by described Derivation of Mathematical Model, draw the diffusion layer square resistance of finished product cell piece.
2. the method for a kind of test product cell piece diffused layer resistance according to claim 1, is characterized in that: described in step 1, set up mathematical model silicon chip grouping used and require to be no less than 3 groups, every group is no less than 2.
3. the method for a kind of test product cell piece diffused layer resistance according to claim 1, it is characterized in that: described square resistance test position is uniformly distributed in silicon chip, and as far as possible identical with finished product cell piece square resistance test point position after diffusion, finished product cell piece square resistance test point is between two thin grid lines.
4. the method for a kind of test product cell piece diffused layer resistance according to claim 1, it is characterized in that: described mathematical model is applicable to test the finished product cell piece diffused layer resistance of same battery manufacturing process, if battery process changes, need to re-establish model.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310002813.XA CN103018564B (en) | 2013-01-05 | 2013-01-05 | Method for testing diffused layer resistance of finished cell |
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| CN201310002813.XA CN103018564B (en) | 2013-01-05 | 2013-01-05 | Method for testing diffused layer resistance of finished cell |
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| CN103018564B true CN103018564B (en) | 2014-10-08 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103995182A (en) * | 2014-05-21 | 2014-08-20 | 奥特斯维能源（太仓）有限公司 | Method for testing contact resistance between metal electrode and silicon substrate |
| CN114512571B (en) * | 2021-12-20 | 2024-07-02 | 浙江爱旭太阳能科技有限公司 | Intelligent regulation and control method, system and equipment for diffusion sheet resistance and readable storage medium |
| CN115096946B (en) * | 2022-06-20 | 2024-08-09 | 南京固体器件有限公司 | Method for testing aluminum oxide HTCC (htCC) metalized sheet resistance and pass Kong Zu value |
| CN115877082B (en) * | 2022-12-21 | 2026-05-15 | 江苏润阳世纪光伏科技有限公司 | A blue diaphragm sheet resistance test method based on WCT120 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2002280432A (en) * | 2001-03-22 | 2002-09-27 | Mitsumi Electric Co Ltd | Method and apparatus for evaluating diffusion layer of semiconductor substrate |
| CN102200552B (en) * | 2010-11-17 | 2014-07-09 | 浙江正泰太阳能科技有限公司 | Method and equipment for testing square resistor of silicon sheet |
| CN102539919A (en) * | 2011-12-19 | 2012-07-04 | 中利腾晖光伏科技有限公司 | Method for selectively testing diffused sheet resistance |
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Granted publication date: 20141008 Termination date: 20190105 |