CN106877832A - Antenna load matching process and device, communication terminal - Google Patents

Abstract

The present invention discloses a kind of antenna load matching process and device, communication terminal, belongs to the communications field.Communication terminal includes wave filter and antenna load coalignment, and antenna load coalignment includes：Processing unit, impedance matching circuit and load acquiring unit, the input of impedance matching circuit are connected with the output end of wave filter, load acquiring unit, and the antenna environment for obtaining communication terminal is loaded；Processing unit, for being loaded according to antenna environment, inquires about default load and the corresponding relation of matching impedance, and object matching impedance is determined according to Query Result, and the impedance of impedance matching circuit is set into object matching impedance.The present invention solves the problems, such as that the applicability of communication terminal is poor, improves the applicability of communication terminal.The present invention is matched for the antenna load of communication terminal.

Description

Antenna load matching method and device, communication terminal

technical field

The present invention relates to the communication field, in particular to an antenna load matching method and device, and a communication terminal.

Background technique

With the development of communication technology, communication terminals such as mobile phones and tablet computers are becoming more and more common. A communication terminal usually includes an antenna, a filter (or duplexer) and a matching circuit. When the impedance of the matching circuit matches the antenna load, the S11 parameter curve of the filter (or duplexer) of the communication terminal has a better Convergence, the performance of the communication terminal is better. Wherein, the antenna load of the same antenna is different in different environments (that is, the antenna load is affected by the environment where the antenna is located), so the antenna load is also called the antenna environment load.

In order to ensure the convergence of the S11 parameter curve of the filter, it is usually necessary to adjust the impedance of the matching circuit so that the impedance of the matching circuit matches the environmental load of the antenna. At present, in the research and development process of communication terminals, technicians can set the antenna environmental load to 50 ohms, then adjust the impedance of the matching circuit until the S11 parameter curve of the filter converges, and adjust the matching circuit when the S11 parameter curve of the filter converges. The impedance is determined as the optimal impedance, and the communication terminal is manufactured and put into use based on the optimal impedance, wherein the impedance of the matching circuit of the manufactured communication terminal is the optimal impedance.

The current optimal impedance can only match the antenna environmental load of 50 ohms, which can only guarantee the convergence of the S11 parameter curve of the filter when the antenna environmental load is 50 ohms. When the antenna environmental load changes, the S11 parameter of the filter The convergence of the curve becomes worse, and the environmental load of the antenna is ever-changing during the use of the communication terminal. Therefore, the optimal matching of the filter adjusted when the environmental load of the antenna is 50 ohms does not guarantee that the S11 parameter curve of the filter will be in any antenna. Under the environmental load, it can maintain good convergence. Therefore, the applicability of the communication terminal is poor.

Contents of the invention

In order to solve the problem of poor applicability of communication terminals, the present invention provides an antenna load matching method and device, and a communication terminal. Described technical scheme is as follows:

In the first aspect, an antenna load matching device is provided for a communication terminal, the communication terminal includes a filter and the antenna load matching device, and the antenna load matching device includes: a processing unit, an impedance matching circuit and a load acquisition unit , the input end of the impedance matching circuit is connected to the output end of the filter,

The load obtaining unit is used to obtain the antenna environment load of the communication terminal;

The processing unit is configured to query the correspondence between the preset load and the matching impedance according to the environmental load of the antenna, determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit as the target matching impedance.

The second aspect provides an antenna load matching method for a communication terminal, the communication terminal includes a filter and the antenna load matching device described in the first aspect, and the antenna load matching device includes: a processing unit and an impedance matching circuit and a load acquisition unit, the method comprising:

The load obtaining unit obtains the antenna environment load of the communication terminal;

The processing unit queries the preset correspondence relationship between the antenna load and the matching impedance according to the antenna environmental load;

The processing unit determines the target matching impedance according to the query result;

The processing unit sets the impedance of the impedance matching circuit to the target matching impedance.

In a third aspect, a communication terminal is provided, and the communication terminal includes: a filter and the antenna load matching device described in the first aspect.

The beneficial effects brought by the technical scheme provided by the invention are:

In the antenna load matching method and device and communication terminal provided by the present invention, since the input end of the impedance matching circuit is connected to the output end of the filter, the load acquisition unit can acquire the antenna environment load of the communication terminal, and the processing unit can query the antenna load according to the antenna environment load. The corresponding relationship between the preset load and the matching impedance and the target matching impedance are determined according to the query results, and the impedance of the impedance matching circuit is set as the target matching impedance. Therefore, the processing unit can adjust the impedance of the impedance matching circuit according to the antenna environment load to make the impedance match The impedance of the circuit is matched with the antenna load, which ensures the convergence of the S11 parameter curve of the filter of the communication terminal in different environments, and improves the applicability of the communication terminal.

It is to be understood that both the foregoing general description and the following detailed description are exemplary only and are not restrictive of the invention.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

FIG. 1 is a schematic structural diagram of a communication terminal involved in various embodiments of the present invention;

Fig. 2 is a block diagram of an antenna load matching device provided by an embodiment of the present invention;

FIG. 3 is a block diagram of a load acquisition unit provided by an embodiment of the present invention;

Fig. 4 is a schematic diagram of a signal coupling module provided by an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of an impedance matching circuit provided by an embodiment of the present invention;

FIG. 6 is a schematic structural diagram of another impedance matching circuit provided by an embodiment of the present invention;

FIG. 7 is a schematic structural diagram of another impedance matching circuit provided by an embodiment of the present invention;

Fig. 8 is a kind of equivalent circuit diagram of the impedance matching circuit shown in Fig. 5;

Fig. 9 is another kind of equivalent circuit diagram of the impedance matching circuit shown in Fig. 5;

Fig. 10 is another equivalent circuit diagram of the impedance matching circuit shown in Fig. 5;

Fig. 11 is another kind of equivalent circuit diagram of the impedance matching circuit shown in Fig. 5;

Fig. 12 is a kind of S11 parameter graph provided by the embodiment of the present invention;

Fig. 13 is a kind of S11 parameter graph provided by the related art;

Fig. 14 is another S11 parameter curve diagram provided by the embodiment of the present invention;

Fig. 15 is a method flowchart of an antenna load matching method provided by an embodiment of the present invention.

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description serve to explain the principles of the invention.

detailed description

In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

In the research and development process of the communication terminal, the convergence of the S11 parameter curve of the filter (or duplexer) of the communication terminal is usually only debugged under the ideal condition that the antenna environmental load is 50 ohms. This method can ensure that the antenna environmental load The convergence of the S11 parameter curve of the filter is 50 ohms. However, the environment in which the communication terminal is actually used is ever-changing, and the environmental load of the antenna of the communication terminal also changes in real time. Therefore, the above method can only guarantee the convergence of the S11 parameter curve of the filter when the environmental load of the antenna is 50 ohms, and cannot guarantee the convergence of the S11 parameter curve of the filter under other antenna environmental loads, which will lead to Under the environmental load of the antenna, the indicators of the communication terminal deteriorate. Specifically, when the convergence of the S11 parameter curve of the filter becomes poor, the insertion loss of the physical path of the communication terminal increases, which in turn leads to the deterioration of the receiving sensitivity of the communication terminal, and the power amplifier (English: PowerAmplifier; PA for short) of the communication terminal The output power of the communication terminal increases, and the power consumption of the communication terminal increases. At the same time, the deterioration of the convergence of the S11 parameter curve of the filter will also lead to the deterioration of the adjacent channel leakage ratio (English: Adjacent Channel Leakage Ratio; ACLR) index and power gain index of the PA, and the deterioration of the PA power gain will lead to As the operating current of the PA circuit increases, the energy consumption of the communication terminal increases. Under the premise of a certain battery capacity, the standby time and talk time of the communication terminal will be shortened; the deterioration of the ACLR index of the PA will seriously affect the user capacity of the base station cell where the communication terminal is located. , resulting in a waste of community resources.

Please refer to FIG. 1 , which shows a schematic structural diagram of a communication terminal involved in various embodiments of the present invention, where the communication terminal may be a mobile phone, a tablet computer, or the like. Referring to Fig. 1, the communication terminal includes: central processing unit, transceiver, power amplifier, filter (or duplexer), impedance matching circuit, TX/RX (Chinese: transmit/receive; English: Transport/Receive) switch, Power couplers, coupler switches, variable impedances, memories, peripheral circuits, sensor units, and antennas, etc.

Among them, the memory is used to store data, such as but not limited to terminal identification codes, calibration parameters, tables of correspondence between loads and matching impedances, etc.; peripheral circuits may include liquid crystal display (English: Liquid Crystal Display; abbreviated: LCD) circuits (such as Array substrate row drive circuit, etc.), universal serial bus (English: Universal Serial Bus; abbreviation: USB) circuit, power supply circuit of communication terminal, etc.; sensor unit can include distance sensor, pressure sensor, temperature sensor, etc., which are used to detect distance , pressure and temperature etc.

As shown in Figure 1, the coupler switch is connected to the power coupler, and the coupler switch has two ground terminals, the central processing unit, transceiver, power amplifier, filter, impedance matching circuit (the input terminal of the impedance matching circuit and the filter connected to the output end of the device), the TX/RX switch, the power coupler and the variable impedance are connected in sequence, the variable impedance is connected to the antenna through the antenna port (not marked in Figure 1), the impedance matching circuit, the coupler switch, the memory, The peripheral circuit and the sensor unit are respectively connected to the central processing unit, the central processing unit can adjust the impedance of the impedance matching circuit, and can also control the power coupler through the coupler switch, and can read the data stored in the memory, control the peripheral circuit and Sensing data detected by the sensor unit is acquired.

It should be noted that the antenna load matching device provided by the embodiment of the present invention mainly includes the above-mentioned central processing unit, transceiver, impedance matching circuit, power coupler and coupler switch, and the antenna load matching method provided by the embodiment of the present invention mainly consists of the antenna For the implementation of the load matching device, the specific structure and functions of the central processing unit, transceiver, impedance matching circuit, power coupler and coupler switch can refer to the following embodiments, and the specific structures and functions of other devices can refer to the prior art.

Please refer to FIG. 2 , which shows a block diagram of an antenna load matching device 20 provided by an embodiment of the present invention. The antenna load matching device 20 can be used for a communication terminal (not shown in FIG. 2 ), and the communication terminal can include filtering device (not shown in FIG. 2 ) and antenna load matching device 20. Referring to Fig. 2, this antenna load matching device 20 comprises: processing unit 21, impedance matching circuit 22 and load acquiring unit 23, the input end (not shown in Fig. 2) of impedance matching circuit 22 and the output end of filter (Fig. 2 not shown) connection.

A load acquisition unit 23, configured to acquire the antenna environment load of the communication terminal;

The processing unit 21 is configured to query the correspondence between the preset load and the matching impedance according to the environmental load of the antenna, determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit 22 as the target matching impedance.

In summary, in the antenna load matching device provided by the embodiment of the present invention, since the input end of the impedance matching circuit is connected to the output end of the filter, the load acquisition unit can obtain the antenna environment load of the communication terminal, and the processing unit can obtain the antenna environment load according to the antenna environment load. , query the preset correspondence between the load and the matching impedance and determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit as the target matching impedance. Therefore, the processing unit can adjust the impedance of the impedance matching circuit according to the antenna environment load, so that The impedance of the impedance matching circuit is matched with the antenna load, which ensures the convergence of the S11 parameter curve of the filter of the communication terminal in different environments, and improves the applicability of the communication terminal.

Further, please refer to FIG. 3, which shows a block diagram of the load acquisition unit 23 provided by the embodiment of the present invention. Referring to FIG. 3, the load acquisition unit 23 includes: a signal transceiving module 231 and a signal coupling module 232,

A signal transceiving module 231, configured to input a transmission signal to a signal coupling module 232;

The signal coupling module 232 is used to obtain the transmission coupling signal and the reflection coupling signal, and input the transmission coupling signal and the reflection coupling signal to the signal transceiver module 231, the transmission coupling signal is the coupling signal of the transmission signal, and the reflection coupling signal is the reflection signal of the transmission signal coupling signal;

The signal transceiving module 231 is further configured to calculate the environmental load of the antenna according to the transmitted coupling signal and the reflected coupling signal.

Wherein, the signal transceiving module 231 may include the transceiver shown in FIG. 1, the signal coupling module 232 may include the power coupler and the coupler switch shown in FIG. The /RX switch inputs the transmit signal to the power coupler, so that the signal transceiving module 231 inputs the transmit signal to the signal coupling module 232 . Wherein, after the transceiver transmits the transmission signal, the power amplifier, filter, etc. can process the transmission signal and finally input it into the power coupler. For the specific structure of the transceiver, reference may be made to the prior art, and the structure diagram of the signal coupling module 232 may be shown in FIG. 4 .

Referring to Fig. 4, the signal coupling module 232 includes a power coupler and a coupler switch, the power coupler has a total of four ports of port 1, port 2, port 3 and port 4, and the coupler switch includes a single-pole double-throw switch SW ₁ and a single-pole double-throw switch Throw switch SW ₂ , port ₁ of the power coupler can be connected to the TX/RX switch shown in Figure 1, port 2 can be connected to the variable impedance shown in Figure 1, port 3 can be connected to the dynamic Terminal a1 is connected, port ₄ can be connected with the moving terminal _a2 of the SPDT switch _SW2 , the _first fixed terminal b1 of the SPDT switch _SW1 and the _first fixed terminal b of the SPDT switch SW2 ₂ can be respectively connected with the signal transceiver module 231 (the transceiver shown in FIG. ₁ ), the second fixed end c1 _of the single-pole double-throw switch SW1 and the _second fixed end c2 of the single-pole _double -throw switch SW2 are grounded respectively The control terminal L ₂₀₁ of the coupler switch can be connected to a processing unit (a central processing unit as shown in FIG. 1 ), and the processing unit controls the state of the coupler switch through the control terminal L ₂₀₁ of the coupler switch. Wherein, the control terminal L ₂₀₁ of the coupler switch may specifically include the control terminal of the SPDT switch SW ₁ (not shown in FIG. 4 ) and the control terminal of the SPDT switch SW ₂ (not shown in FIG. 4 ), and the processing The unit controls the SPDT switch SW ₁ and the SPDT switch SW ₂ through the control terminal of the SPDT switch SW ₁ and the control terminal of the SPDT switch SW ₂ , thereby controlling the state of the coupler switch.

In the embodiment of the present invention, the coupler switch includes a first state and a second state, when the moving end a ₁ of the SPDT switch SW ₁ is connected to the second fixed end c ₁ of the SPDT switch SW ₁ , and the single-pole When the moving end a2 of the _{double -} throw switch SW2 is connected to the first fixed end b2 of the single-pole _double -throw switch SW2, the port ₃ of the power coupler is grounded, and the port 4 of the power coupler is connected to the signal transceiver module (shown in Figure 1 shown transceiver) connection, at this moment, the port 3 of the power coupler is the isolation terminal, the port 4 of the power coupler is the coupled output terminal, and the coupler switch is in the first state; when the moving end a of the single-pole double-throw switch SW ₁ When ₁ is connected to the first fixed end b ₁ of the SPDT switch SW ₁ , and the moving end a ₂ of the SPDT switch SW ₂ is connected to the second fixed end c ₂ of the SPDT switch SW ₂ , the power coupling Port 4 of the power coupler is grounded, and port 3 of the power coupler is connected to the signal transceiver module (transceiver shown in Figure 1). At this time, port 4 of the power coupler is an isolation terminal, and port 3 of the power coupler is a coupled output terminal. , the coupler switch is in the second state. Wherein, the processing unit can control the coupler switch to switch between the first state and the second state by controlling the SPDT switch SW ₁ and the SPDT switch SW ₂ , so that the coupled output terminal of the power coupler is at the port Switch between port 3 and port 4.

In the embodiment of the present invention, please refer to FIG. 1 to FIG. 4 , during the working process of the communication terminal, the transmission signal S in transmitted by the signal transceiver module 231 (the transceiver shown in FIG. 1 ) passes through the power amplifier and the filter _in turn. , the impedance matching circuit and the TX/RX switch input signal coupling module 232, and input the power coupler through port 1 of the power coupler, and output to the antenna of the communication terminal via port 2 of the power coupler (port 2 is a straight-through output end), The antenna radiates the transmit signal S _in into the surrounding space. However, in this process, due to the influence of the environment where the antenna is located, there is a difference between the antenna environmental load and the impedance of the impedance matching circuit of the communication terminal, and this difference changes with the change of the environment where the antenna is located. As a result, the transmission signal S _in output from port 2 of the power coupler cannot be completely radiated into the surrounding space by the antenna, and a part of the transmission signal is reflected back to the power coupler through port 2 of the power coupler. The reflected signal can be called reflection Signal S _reflect . While the communication terminal is receiving a signal, the antenna of the communication terminal will receive a useful signal from the surrounding space and input it to the power coupler. The useful signal input to the power coupler may be called a received signal S _receive .

In the embodiment of the present invention, the process of acquiring the antenna environment load by the load acquiring unit 23 can be specifically as follows: During the working process of the communication terminal, the processing unit 21 (such as the central processing unit in FIG. 1 ) controls the coupler switch to periodically Switch between the first state and the second state. When the processing unit 21 controls the coupler switch to be in the first state, the port 3 of the power coupler is an isolation terminal, the port 4 is a coupled output terminal, and the power coupler is input from port 1. The transmission signal S _in is coupled to obtain the transmission coupling signal S _co-in , and the transmission signal S _in is output from the port 4 to the signal transceiver module 231; when the processing unit 21 controls the coupler switch to be in the second state, the power coupler Port 4 is the isolation terminal, port 3 is the coupled output terminal, and the power coupler couples the reflected signal S _reflect input from port 3 and the received signal S _receive to obtain the reflected coupling signal S _co-re , and the reflected coupled signal S co-re is obtained from port 3 S _co-re is output to the signal transceiving module 231, and the signal transceiving module 231 performs calculations according to the received transmission coupling signal S _co-in and reflection coupling signal S _co-re to obtain the antenna environmental load, which is The antenna load that changes with the external environment.

It should be noted that the specific implementation process of the power coupler coupling the signal and the signal transceiver module 231 calculating the antenna environment load according to the transmission coupling signal S _co-in and the reflection coupling signal S _co-re can refer to the prior art, and the present invention The embodiment will not be repeated here. It should also be noted that, in the embodiment of the present invention, the reflected coupling signal S _co-re is actually obtained by coupling the combined signal of the reflected signal S _reflect and the received signal S _receive by the power coupler, but because the reflected signal S The strength of _reflect is far greater than the strength of the received signal S _receive , so the received signal S _receive can be ignored in the calculation process of the coupled signal, and the strength of the coupled signal can only be determined by the reflected signal S _reflect . Therefore, the reflected signal S _reflect and the received signal A coupling signal obtained by combining signals of the signal S _receive is called a reflected coupling signal S _co-re , which is not limited in this embodiment of the present invention.

Wherein, the processing unit 21 may include the central processing unit shown in FIG. 1, the memory shown in FIG. 1 may store the corresponding relationship between the load and the matching impedance, and the processing unit 21 may read the corresponding relationship between the load and the matching impedance from the memory, After the load acquisition unit 23 acquires the antenna environment load, it can send the antenna environment load to the processing unit 21, and the processing unit 21 queries the corresponding relationship between the load and the matching impedance according to the antenna environment load, and determines the target matching impedance according to the query result; or, the processing unit 21 The corresponding relationship between the load and the matching impedance can be stored. After the load acquisition unit 23 acquires the antenna environmental load, it can send the antenna environmental load to the processing unit 21. The processing unit 21 queries the corresponding relationship between the load and the matching impedance according to the antenna environmental load, and according to the query result Determine the target matching impedance. Wherein, the corresponding relationship between the load and the matching impedance can specifically be a load-matching impedance characterization table, and the matching impedance corresponding to each load in the characterization table can be calculated through theoretical calculation, empirical value setting, characterization table calibration system, etc. obtained by a method, which is not limited in the embodiments of the present invention.

Optionally, the processing unit 21 is configured to: when there is a matching impedance corresponding to the antenna environment load in the correspondence relationship, determine the matching impedance corresponding to the antenna environment load as the target matching impedance; when there is no matching impedance corresponding to the antenna environment load in the correspondence relationship When matching the impedance corresponding to the load, the preset initial matching impedance is determined as the target matching impedance. In the embodiment of the present invention, the initial matching impedance can be set in the corresponding relationship between the load and the matching impedance, and the initial matching impedance matches the fixed antenna environment load (for example, 50 ohms). When matching the impedance corresponding to the load, the processing unit 21 can query the matching impedance corresponding to the antenna environment load. At this time, the processing unit 21 determines the matching impedance corresponding to the antenna environment load as the target matching impedance. When the matching impedance between the load and the matching impedance When there is no matching impedance corresponding to the antenna environmental load in the relationship, the processing unit 21 cannot find the matching impedance corresponding to the antenna environmental load. At this time, the processing unit 21 may determine the initial matching impedance as the target matching impedance.

Optionally, the processing unit 21 is further configured to determine a matching type of the target matching impedance, and set the impedance of the impedance matching circuit to the target matching impedance according to the matching type of the target matching impedance. Among them, the matching type is used to indicate the series-parallel type of the target matching impedance. For example, the matching type can be parallel capacitor-series capacitor type, parallel capacitor-series inductor type, parallel inductor-series capacitor type, parallel capacitor-series capacitor type, parallel Capacitor-series capacitor-parallel capacitor type, parallel capacitor-series inductor-parallel inductor type, etc., are not limited in this embodiment of the present invention. In the embodiment of the present invention, the matching relationship between the load and the matching impedance can also store the matching type, and the processing unit 21 can obtain the matching type of the target matching impedance by querying the corresponding relationship between the load and the matching impedance. For example, the corresponding relationship between the load and the matching impedance can be shown in Table 1 below:

Table 1

Wherein, Z ₀ may be the default environmental load (for example, 50 ohms), L ₁₁ and C ₂₁ may be the initial matching impedance, the initial matching impedance corresponds to the default environmental load, and the matching type of the initial matching impedance is parallel inductance-parallel capacitance Types of. Assuming that the antenna environmental load acquired by the load acquisition unit 23 is Z ₃ , the processing unit 21 queries the corresponding relationship shown in Table 1 according to the antenna environmental load Z ₃ , and can obtain the matching impedance corresponding to the antenna environmental load Z ₃ as L ₁₂ + L ₁₃ and L ₂₁ , and L ₁₂ +L ₁₃ is a parallel impedance, and L ₂₁ is a series impedance. Therefore, the processing unit 21 determines L ₁₂ +L ₁₃ and L ₂₁ as the target matching impedance, and the matching type of the target matching impedance can be It is a parallel inductance-series inductance type. As another example, assuming that the antenna environment load obtained by the load acquisition unit 23 is Z _N+1 , the processing unit 21 queries the corresponding relationship shown in Table 1 according to the antenna environment load Z _N+1 , and cannot find the corresponding relationship with the antenna environment load Z For matching impedances corresponding to _N+1 , the processing unit 21 determines the initial matching impedances L ₁₁ and C ₂₁ as target matching impedances, which is not limited in this embodiment of the present invention.

It should be noted that the above Table 1 is only exemplary. In practical applications, the terminal state of the communication terminal can also be recorded in the correspondence between the load and the matching impedance. At this time, the processing unit 21 queries the correspondence between the load and the matching impedance. The terminal state of the communication terminal can also be obtained. For example, the corresponding relationship between the load and the matching impedance can also be shown in Table 2 below:

Table 2

It should be noted that the embodiment of the present invention is described by taking the acquisition of the antenna environment load through the signal transceiving module 231 and the signal coupling module 232 as an example. In practical applications, the terminal state of the communication terminal can also be acquired through the sensor unit in the communication terminal. , and then according to the corresponding relationship shown in Table 2, the antenna environment load is determined, and the process of the sensor unit acquiring the terminal state of the communication terminal can refer to the prior art, and the embodiments of the present invention will not be repeated here.

Optionally, please refer to FIG. 5, which shows a schematic structural diagram of an impedance matching circuit 22 provided by an embodiment of the present invention. Referring to FIG. 5, the impedance matching circuit 22 may be an L-shaped impedance matching circuit, and the impedance matching circuit 22 includes: a first parallel adjustment circuit 221 and a first series adjustment circuit 222, one end of the first parallel adjustment circuit 221 (not marked in FIG. 5 ) and one end of the first series adjustment circuit 222 (not marked in FIG. 5 ) respectively connected to the input end SL1 _of the impedance matching circuit 22, the other end (not marked in FIG. 5 ) of the first parallel adjustment circuit 221 is grounded, and the other end (not marked in FIG. 5 ) of the first series adjustment circuit 222 is connected to The output terminal SL2 of the impedance matching circuit ₂₂ is connected. Wherein, the input terminal SL1 of the impedance matching circuit ₂₂ may be connected with the output terminal (not shown in FIG. 5 ) of the filter (not shown in FIG. 5 ).

Further, as shown in FIG. 5 , the first parallel adjustment circuit 221 includes: a first single-pole double-throw switch SW ₂₁ , a first capacitor array C ₁ and a first inductor array (not shown in FIG. 5 ), the first capacitor array Both the capacitance value of _C1 and the inductance value of the first inductor array can be adjusted. The specific structure of the first capacitor _{array C 1} can refer to the prior art. As shown in FIG. The first inductance, the three first inductances connected in series may include the first inductance L ₁₁ , the first inductance L ₁₂ and the first inductance L ₁₃ , the first inductance L ₁₁ , the first inductance L ₁₂ and the first inductance L ₁₃ Connect end to end. The moving end a ₂₁ of the first single-pole double-throw switch SW ₂₁ is connected with the input end SL ₁ of the impedance matching circuit 22, the first fixed end b ₂₁ is connected with the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the second The fixed terminal c ₂₁ is connected to the first terminal (not shown in FIG. 5 ) of the first capacitor array C ₁ ; the three fixed terminals of the first single-pole three-throw switch SW ₃₁ are respectively connected to the first terminals of the three first inductors Terminals (not marked in FIG. 5 ) are connected in one-to-one correspondence, specifically, the first fixed terminal b ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₁ , and the first single-pole three-throw The second fixed terminal c ₃₁ of the switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₂ , and the third fixed terminal d ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₃ ; The three fixed ends of the second single-pole three-throw switch SW ₃₂ are respectively connected to the second ends of the three first inductances (not shown in FIG. 5 ), specifically, the second single-pole three-throw switch SW ₃₂ The first fixed terminal b ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected to the second terminal of the first inductor L ₁₁ , the second fixed terminal c ₃₂ of the second single-pole three-throw switch SW 32 is connected to the second terminal of the first inductor L ₁₂ , and the second The third non-volatile terminal d ₃₂ of the single-pole three-throw switch SW ₃₂ is connected to the second terminal of the first inductor L ₁₃ . As shown in FIG. 5 , the moving terminal a ₃₂ of the second SPTT switch SW ₃₂ and the second terminal (not shown in FIG. 5 ) of the first capacitor array C ₁ are respectively grounded.

Further, as shown in FIG. 5 , the second series adjustment circuit 222 includes: a second single-pole double-throw switch SW ₂₂ , a second capacitor array C ₂ and a second inductor array (not shown in FIG. 5 ), the second capacitor array _Both the capacitance value of C2 and the inductance value of the second inductor array can be adjusted. The specific structure of the second capacitor _{array C 2} can refer to the prior art. As shown in FIG. The second inductance, the three second inductances connected in series may include the second inductance L ₂₁ , the second inductance L ₂₂ and the second inductance L ₂₃ , the second inductance L ₂₁ , the second inductance L ₂₂ and the second inductance L ₂₃ Connect end to end. The moving end a ₂₂ of the second single-pole double-throw switch SW ₂₂ is connected with the input end SL ₁ of the impedance matching circuit 22, the first fixed end b ₂₂ is connected with the moving end a ₃₃ of the third single-pole three-throw switch SW ₃₃ , and the second The fixed terminal c ₂₂ is connected to the first terminal (not shown in FIG. 5 ) of the second capacitor array C ₂ ; the three fixed terminals of the third single-pole three-throw switch SW ₃₃ are respectively connected to the first terminals of the three second inductors Terminals (not marked in FIG. 5 ) are connected in one-to-one correspondence, specifically, the first fixed terminal b ₃₃ of the third single-pole three-throw switch SW ₃₃ is connected to the first terminal of the second inductor L ₂₁ , and the third single-pole three-throw The second fixed terminal c ₃₃ of the switch SW ₃₃ is connected to the first terminal of the second inductor L ₂₂ , and the third fixed terminal d ₃₃ of the third single-pole three-throw switch SW ₃₃ is connected to the first terminal of the second inductor L ₂₃ ; The three fixed ends of the fourth single-pole three-throw switch SW ₃₄ are respectively connected to the second ends of the three second inductances (not shown in FIG. 5 ), specifically, the fourth single-pole three-throw switch SW ₃₄ The first fixed terminal b ₃₄ of the fourth single-pole three-throw switch SW ₃₄ is connected to the second terminal of the second inductor L ₂₁ , the second fixed terminal c ₃₄ of the fourth single-pole three-throw switch SW 34 is connected to the second terminal of the second inductor L ₂₂ , and the fourth The third fixed end d ₃₄ of the single-pole three-throw switch SW ₃₄ is connected to the second end of the second inductor L ₂₃ ; as shown in Figure 5, the moving end a ₃₄ of the fourth single-pole three-throw switch SW ₃₄ and the second capacitor array The _second terminals of C2 (not marked in FIG. 5 ) are respectively connected to the output terminal SL2 of the impedance matching circuit ₂₂ .

Wherein, in the impedance matching circuit 22 shown in FIG. 5 , the control terminals of all SPDT switches, the control terminals of all capacitor arrays and the control terminals of all SPTT switches are respectively connected to the processing unit (not shown in FIG. 5 ). shown) connection. Specifically, as shown in FIG. 5, the control terminal CL ₂₁ of the first SPDT switch SW ₂₁ , the control terminal CL ₂₂ of the second SPDT switch SW ₂₂ , and the control terminal of the first capacitor array C ₁ (in FIG. 5 not shown) and the control terminals (not shown in FIG. 5 ) of the _second capacitor array C2 are respectively connected to the processing unit, and the control terminals CL ₃₁₁ and CL ₃₁₂ of the first single-pole three-throw switch SW ₃₁ are respectively connected to the processing unit, The control terminals CL ₃₂₁ and CL ₃₂₂ of the second single-pole three-throw switch SW ₃₂ are respectively connected with the processing unit, the control terminals CL ₃₃₁ and CL ₃₃₂ of the third single-pole three-throw switch SW ₃₃ are respectively connected with the processing unit, and the fourth single-pole three-throw switch The control terminals _CL341 and _CL342 of the SW ₃₄ are respectively connected to the processing unit.

Optionally, please refer to FIG. 6, which shows a schematic structural diagram of another impedance matching circuit 22 provided by an embodiment of the present invention. Referring to FIG. 6, the impedance matching circuit 22 may be a π-type impedance matching circuit, and the impedance matching The circuit 22 includes: a second parallel adjustment circuit 223, a second series adjustment circuit 224 and a third parallel adjustment circuit 225, one end (not marked in FIG. 6 ) of the second parallel adjustment circuit 223 and one end of the second series adjustment circuit 224 (not marked in FIG. 6 ) are respectively connected with the input terminal SL1 of the impedance matching circuit 22, _one end (not marked in FIG. 6 ) of the third parallel adjustment circuit 225 and the other end (not marked in FIG. 6 ) of the second series adjustment circuit 224 ( FIG. 6 ₂ ) are connected to the output terminal SL2 of the impedance matching circuit 22, the other end of the second parallel adjustment circuit 223 (not marked in Figure 6) and the other end of the third parallel adjustment circuit 225 (in Figure 6 not marked) are grounded respectively. Wherein, the input terminal SL1 of the impedance matching circuit ₂₂ may be connected with the output terminal (not shown in FIG. 6 ) of the filter (not shown in FIG. 6 ).

Further, as shown in FIG. 6 , the second parallel adjustment circuit 223 includes: a first single-pole double-throw switch SW ₂₁ , a first capacitor array C ₁ and a first inductor array (not shown in FIG. 6 ), the first capacitor array Both the capacitance value of _C1 and the inductance value of the first inductor array can be adjusted. The specific structure of the first capacitor _{array C 1} can refer to the prior art. As shown in FIG. The first inductance, the three first inductances connected in series may include the first inductance L ₁₁ , the first inductance L ₁₂ and the first inductance L ₁₃ , the first inductance L ₁₁ , the first inductance L ₁₂ and the first inductance L ₁₃ Connect end to end. The moving end a ₂₁ of the first single-pole double-throw switch SW ₂₁ is connected with the input end SL ₁ of the impedance matching circuit 22, the first fixed end b ₂₁ is connected with the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the second The fixed terminal c ₂₁ is connected to the first terminal (not shown in FIG. 6 ) of the first capacitor array C ₁ ; the three fixed terminals of the first single-pole three-throw switch SW ₃₁ are respectively connected to the first terminals of the three first inductors Terminals (not marked in FIG. 6 ) are connected in one-to-one correspondence, specifically, the first fixed terminal b ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₁ , and the first single-pole three-throw The second fixed terminal c ₃₁ of the switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₂ , and the third fixed terminal d ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₃ ; The three fixed ends of the second single-pole three-throw switch SW ₃₂ are respectively connected to the second ends of the three first inductances (not shown in FIG. 6 ), specifically, the second single-pole three-throw switch SW ₃₂ The first fixed terminal b ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected to the second terminal of the first inductor L ₁₁ , the second fixed terminal c ₃₂ of the second single-pole three-throw switch SW 32 is connected to the second terminal of the first inductor L ₁₂ , and the second The third fixed end d ₃₂ of the single-pole three-throw switch SW ₃₂ is connected with the second end of the first inductor L ₁₃ ; as shown in Figure 6, the moving end a ₃₂ of the second single-pole three-throw switch SW ₃₂ and the first capacitance array The second ends of _C1 (not shown in FIG. 6 ) are respectively grounded.

Further, as shown in FIG. 6 , the second series adjustment circuit 224 includes: a second single-pole double-throw switch SW ₂₂ , a second capacitor array C ₂ and a second inductor array (not shown in FIG. 6 ), the second capacitor array _Both the capacitance value of C2 and the inductance value of the second inductor array can be adjusted. The specific structure of the second capacitor _{array C 2} can refer to the prior art. As shown in FIG. The second inductance, the three second inductances connected in series may include the second inductance L ₂₁ , the second inductance L ₂₂ and the second inductance L ₂₃ , the second inductance L ₂₁ , the second inductance L ₂₂ and the second inductance L ₂₃ Connect end to end. The moving end a ₂₂ of the second single-pole double-throw switch SW ₂₂ is connected with the input end SL ₁ of the impedance matching circuit 22, the first fixed end b ₂₂ is connected with the moving end a ₃₃ of the third single-pole three-throw switch SW ₃₃ , and the second The fixed terminal c ₂₂ is connected to the first terminal (not shown in FIG. 6 ) of the second capacitor array C ₂ ; the three fixed terminals of the third single-pole three-throw switch SW ₃₃ are respectively connected to the first terminals of the three second inductors Terminals (not marked in FIG. 6 ) are connected in one-to-one correspondence, specifically, the first fixed terminal b ₃₃ of the third single-pole three-throw switch SW ₃₃ is connected to the first terminal of the second inductor L ₂₁ , and the third single-pole three-throw The second fixed terminal c ₃₃ of the switch SW ₃₃ is connected to the first terminal of the second inductor L ₂₂ , and the third fixed terminal d ₃₃ of the third single-pole three-throw switch SW ₃₃ is connected to the first terminal of the second inductor L ₂₃ ; The three fixed ends of the fourth single-pole three-throw switch SW ₃₄ are respectively connected to the second ends of the three second inductances (not shown in FIG. 6 ), specifically, the fourth single-pole three-throw switch SW ₃₄ The first fixed terminal b ₃₄ of the fourth single-pole three-throw switch SW ₃₄ is connected to the second terminal of the second inductor L ₂₁ , the second fixed terminal c ₃₄ of the fourth single-pole three-throw switch SW 34 is connected to the second terminal of the second inductor L ₂₂ , and the fourth The third fixed end d ₃₄ of the single-pole three-throw switch SW ₃₄ is connected to the second end of the second inductor L ₂₃ ; as shown in Figure 6, the moving end a ₃₄ of the fourth single-pole three-throw switch SW ₃₄ and the second capacitor array The _second terminals of C2 (not shown in FIG. 6 ) are respectively connected to the output terminal SL2 of the impedance matching circuit ₂₂ .

Further, as shown in FIG. 6 , the third parallel adjustment circuit 225 includes: a third SPDT switch SW ₂₃ , a third capacitor array C ₃ and a third inductor array (not shown in FIG. 6 ), the third capacitor array Both the capacitance value of C ₃ and the inductance value of the third inductor array can be adjusted. The specific structure of the third capacitor _{array C 3} can refer to the prior art. As shown in FIG. The third inductance, the three third inductances connected in series may include the third inductance L ₃₁ , the third inductance L ₃₂ and the third inductance L ₃₃ , the third inductance L ₃₁ , the third inductance L ₃₂ and the third inductance L ₃₃ Connect end to end. The moving end a ₂₃ of the third single-pole double-throw switch SW ₂₃ is connected with the output end SL ₂ of the impedance matching circuit 22, the first fixed end b ₂₂ is connected with the moving end a ₃₅ of the fifth single-pole three-throw switch SW ₃₅ , and the second The fixed terminal c ₂₃ is connected to the first terminal (not shown in FIG. 6 ) of the third capacitor array C ₃ ; the three fixed terminals of the fifth single-pole three-throw switch SW ₃₅ are respectively connected to the first terminals of the three third inductors. Terminals (not marked in FIG. 6 ) are connected in one-to-one correspondence, specifically, the first fixed terminal b ₃₅ of the fifth single-pole three-throw switch SW ₃₅ is connected to the first terminal of the third inductor L ₃₁ , and the fifth single-pole three-throw The second fixed end c ₃₅ of the switch SW ₃₅ is connected to the first end of the third inductance L ₃₂ , and the third fixed end d ₃₅ of the fifth single-pole three-throw switch SW ₃₅ is connected to the first end of the third inductance L ₃₃ ; The three fixed ends of the sixth single-pole three-throw switch SW ₃₆ are connected to the second ends of the three third inductances (not shown in FIG. 6 ) in one-to-one correspondence, specifically, the sixth single-pole three-throw switch SW ₃₆ The first fixed terminal b ₃₆ of the sixth single-pole three-throw switch SW ₃₆ is connected to the second terminal of the third inductor L ₃₁ , the second fixed terminal c ₃₆ of the sixth single-pole three-throw switch SW 36 is connected to the second terminal of the third inductor L ₃₂ , and the sixth The third fixed end d ₃₆ of the single-pole three-throw switch SW ₃₆ is connected to the second end of the third inductor L ₃₃ ; as shown in Figure 6, the moving end a ₃₆ of the sixth single-pole three-throw switch SW ₃₆ and the third capacitor array _The second ends of C3 (not shown in FIG. 6 ) are respectively grounded.

Wherein, in the impedance matching circuit 22 shown in FIG. 6 , the control terminals of all SPDT switches, the control terminals of all capacitor arrays and the control terminals of all SPTT switches are respectively connected to the processing unit (not shown in FIG. 5 ). shown) connection. Specifically, as shown in FIG. 6, the control terminal CL ₂₁ of the first SPDT switch SW ₂₁ , the control terminal CL ₂₂ of the second SPDT switch SW ₂₂ , and the control terminal CL ₂₃ of the third SPDT switch SW ₂₃ , the control terminal (not shown in Figure 6) of the first capacitor array _C1 , the control terminal (not shown in Figure 6) of the _second capacitor array C2 and the control terminal (in Figure 6) of the _third capacitor array C3 not shown) are respectively connected to the processing unit, the control terminals CL ₃₁₁ and CL ₃₁₂ of the first single-pole three-throw switch SW ₃₁ are respectively connected to the processing unit, and the control terminals CL ₃₂₁ and CL ₃₂₂ of the second single-pole three-throw switch SW ₃₂ are respectively connected to the processing unit The processing unit is connected, the control terminals CL ₃₃₁ and CL ₃₃₂ of the third single-pole three-throw switch SW ₃₃ are respectively connected with the processing unit, the control terminals CL ₃₄₁ and CL ₃₄₂ of the fourth single-pole three-throw switch SW ₃₄ are respectively connected with the processing unit, and the fifth The control terminals _CL351 and _{CL352 of the single-pole three-throw switch SW35 are respectively connected to the processing unit, and the control terminals CL361 and CL262 of the sixth single-pole three-throw switch SW36 are respectively connected to} the processing unit.

Optionally, please refer to FIG. 7, which shows a schematic structural diagram of another impedance matching circuit 22 provided by an embodiment of the present invention. Referring to FIG. 7, the impedance matching circuit 22 may be a T-shaped impedance matching circuit, and the impedance matching The circuit 22 includes: a third series adjustment circuit 226, a fourth parallel adjustment circuit 227 and a fourth series adjustment circuit 228, one end (not marked in FIG. 7 ) of the third series adjustment circuit 226 and the input terminal SL of the impedance matching circuit 22 ₁ connection, the other end (not marked in FIG. 7 ) of the third series adjustment circuit 226 and one end (not marked in FIG. 7 ) of the fourth series adjustment circuit 228 are connected with one end (not marked in FIG. 7 ) of the fourth parallel adjustment circuit 227 respectively. ), the other end (not marked in FIG. 7 ) of the fourth parallel adjustment circuit 227 is grounded, and the other end (not marked in FIG. 7 ) of the fourth series adjustment circuit 228 is connected to the output of the impedance matching circuit 22 end SL ₂ connection. Wherein, the input terminal SL1 of the impedance matching circuit ₂₂ may be connected with the output terminal (not shown in FIG. 7 ) of the filter (not shown in FIG. 7 ).

Further, as shown in FIG. 7 , the third series adjustment circuit 226 includes: a first single-pole double-throw switch SW ₂₁ , a first capacitor array C ₁ and a first inductor array (not shown in FIG. 7 ), the first capacitor array Both the capacitance value of _C1 and the inductance value of the first inductor array can be adjusted. The specific structure of the first capacitor _{array C 1} can refer to the prior art. As shown in FIG. The first inductance, the three first inductances connected in series may include the first inductance L ₁₁ , the first inductance L ₁₂ and the first inductance L ₁₃ , the first inductance L ₁₁ , the first inductance L ₁₂ and the first inductance L ₁₃ Connect end to end. The moving end a ₂₁ of the first single-pole double-throw switch SW ₂₁ is connected with the input end SL ₁ of the impedance matching circuit 22, the first fixed end b ₂₁ is connected with the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the second The fixed terminal c ₂₁ is connected to the first terminal (not shown in FIG. 7 ) of the first capacitance array C ₁ ; the three fixed terminals of the first single-pole three-throw switch SW ₃₁ are respectively connected to the first terminals of the three first inductors Terminals (not marked in FIG. 7 ) are connected in one-to-one correspondence, specifically, the first fixed terminal b ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected with the first terminal of the first inductor L ₁₁ , and the first single-pole three-throw The second fixed terminal c ₃₁ of the switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₂ , and the third fixed terminal d ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first terminal of the first inductor L ₁₃ ; The three fixed ends of the second single-pole three-throw switch SW ₃₂ are respectively connected to the second ends of the three first inductances (not shown in FIG. 7 ), specifically, the second single-pole three-throw switch SW ₃₂ The first fixed terminal b ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected to the second terminal of the first inductor L ₁₁ , the second fixed terminal c ₃₂ of the second single-pole three-throw switch SW 32 is connected to the second terminal of the first inductor L ₁₂ , and the second The third fixed terminal d ₃₂ of the single _- pole three-throw switch SW ₃₂ is connected to the second terminal of the _first inductor L ₁₃ ; as shown in FIG. The second terminals (not shown in FIG. 7 ) are respectively connected to the first node A.

Further, as shown in FIG. 7 , the fourth parallel adjustment circuit 227 includes: a second single-pole double-throw switch SW ₂₂ , a second capacitor array C ₂ and a second inductor array (not shown in FIG. 7 ), the second capacitor array _Both the capacitance value of C2 and the inductance value of the second inductor array can be adjusted. The specific structure of the second _{capacitance array} C ₂ can refer to the prior art. As shown in FIG. The second inductance, the three second inductances connected in series may include the second inductance L ₂₁ , the second inductance L ₂₂ and the second inductance L ₂₃ , the second inductance L ₂₁ , the second inductance L ₂₂ and the second inductance L ₂₃ Connect end to end. The moving end a ₂₂ of the second single-pole double-throw switch SW ₂₂ is connected to the first node A, the first fixed end b ₂₂ is connected to the moving end a ₃₃ of the third single-pole three-throw switch SW ₃₃ , and the second fixed end c ₂₂ It is connected with the first end (not marked in Fig. 7) of the second capacitor array C ₂ ; the three fixed ends of the third single-pole three-throw switch SW ₃₃ are respectively connected with the first ends of the three second inductances (in Fig. 7 Not marked) are connected in one-to-one correspondence, specifically, the first fixed end b ₃₃ of the third single-pole three-throw switch SW ₃₃ is connected to the first end of the second inductance L ₂₁ , and the first end b of the third single-pole three-throw switch SW ₃₃ The second fixed end c ₃₃ is connected to the first end of the second inductance L ₂₂ , the third fixed end d ₃₃ of the third single-pole three-throw switch SW ₃₃ is connected to the first end of the second inductance L ₂₃ ; The three fixed ends of the throw switch SW ₃₄ are respectively connected to the second ends of the three second inductances (not shown in FIG _. The end b ₃₄ is connected to the second end of the second inductance L ₂₁ , the second fixed end c ₃₄ of the fourth single-pole three-throw switch SW ₃₄ is connected to the second end of the second inductance L ₂₂ , and the fourth single-pole three-throw switch SW The third fixed end d ₃₄ of ₃₄ is connected with the _second end of the second inductor L ₂₃ ; as shown in _{FIG .} Terminals (not shown in Figure 7) are grounded respectively.

Further, as shown in FIG. 7 , the fourth series adjustment circuit 228 includes: a third SPDT switch SW ₂₃ , a third capacitor array C ₃ and a third inductor array (not shown in FIG. 7 ), the third capacitor array Both the capacitance value of C ₃ and the inductance value of the third inductor array can be adjusted. The specific structure of the third _{capacitance array} C ₃ can refer to the prior art. As shown in FIG. The third inductance, the three third inductances connected in series may include the third inductance L ₃₁ , the third inductance L ₃₂ and the third inductance L ₃₃ , the third inductance L ₃₁ , the third inductance L ₃₂ and the third inductance L ₃₃ Connect end to end. The moving end a ₂₃ of the third single-pole double-throw switch SW ₂₃ is connected to the first node A, the first fixed end b ₂₃ is connected to the moving end a ₃₅ of the fifth single-pole three-throw switch SW ₃₅ , and the second fixed end c ₂₃ Connect with the first end (not marked in Fig. 7) of the third capacitor array _{C 3} ; Not marked) are connected in one-to-one correspondence, specifically, the first fixed end b ₃₅ of the fifth single-pole three-throw switch SW ₃₅ is connected to the first end of the third inductor L ₃₁ , and the first end b of the fifth single-pole three-throw switch SW ₃₅ The second fixed end c ₃₅ is connected to the first end of the third inductor L ₃₂ , the third fixed end d ₃₅ of the fifth single-pole three-throw switch SW ₃₅ is connected to the first end of the third inductor L ₃₃ ; the sixth single-pole three-throw switch SW 35 is connected to the first end of the third inductor L 33; The three fixed terminals of the throw switch SW ₃₆ are respectively connected to the second terminals of the three third inductors (not shown in FIG _. The end b ₃₆ is connected to the second end of the third inductance L ₃₁ , the second fixed end c ₃₆ of the sixth single-pole three-throw switch SW ₃₆ is connected to the second end of the third inductance L ₃₂ , and the sixth single-pole three-throw switch SW The third fixed end d ₃₆ of ₃₆ is connected with the second end of the third inductance L ₃₃ ; As shown in Figure 7, the moving end a ₃₆ of the sixth single pole _three throw switch SW ₃₆ and the second Terminals (not shown in FIG. 7 ) are respectively connected to the output terminal SL2 of the impedance matching circuit ₂₂ .

Wherein, in the impedance matching circuit 22 shown in FIG. 7 , the control terminals of all SPDT switches, the control terminals of all capacitor arrays and the control terminals of all SPTT switches are respectively connected to the processing unit (not shown in FIG. 7 ). shown) connection. Specifically, as shown in FIG. 7, the control terminal CL ₂₁ of the first SPDT switch SW ₂₁ , the control terminal CL ₂₂ of the second SPDT switch SW ₂₂ , and the control terminal CL ₂₃ of the third SPDT switch SW ₂₃ , the control end (not shown in Figure 7) of the first capacitance array _C1 , the control end (not shown in Figure 7) of the _second capacitance array C2 and the control end (in Figure 7) of the _third capacitance array C3 not shown) are respectively connected to the processing unit, the control terminals CL ₃₁₁ and CL ₃₁₂ of the first single-pole three-throw switch SW ₃₁ are respectively connected to the processing unit, and the control terminals CL ₃₂₁ and CL ₃₂₂ of the second single-pole three-throw switch SW ₃₂ are respectively connected to the processing unit The processing unit is connected, the control terminals CL ₃₃₁ and CL ₃₃₂ of the third single-pole three-throw switch SW ₃₃ are respectively connected with the processing unit, the control terminals CL ₃₄₁ and CL ₃₄₂ of the fourth single-pole three-throw switch SW ₃₄ are respectively connected with the processing unit, and the fifth The control terminals CL ₃₅₁ and CL ₃₅₂ of the single-pole three-throw switch SW ₃₅ are respectively connected to the processing unit, and the control terminals CL ₃₆₁ and CL ₃₆₂ of the sixth single-pole three-throw switch SW ₃₆ are respectively connected to the processing unit.

It should be noted that those skilled in the art should understand that the impedance matching circuits shown in Figure 5 to Figure 7 above are parallel, and in practical applications, the communication terminal includes any impedance matching circuit shown in Figure 5 to Figure 7 above , and in order to distinguish the adjustment circuit, switch, inductor, etc., the embodiment of the present invention adopts the first, second, third, etc. descriptions, the first, second, third, etc. are only for distinguishing, and do not indicate sequence. It should also be noted that the correspondence shown in Table 1 and Table 2 above can be adapted to adjust the impedance of the impedance matching circuit 22 shown in FIG. 5 . When the impedance matching circuit is the impedance matching circuit 22 shown in FIG. 6 , the above The parallel connection shown in Table 1 and Table 2 can be the second parallel connection, and the series connection can be the second series connection, and the corresponding third parallel inductance and capacitance can be added in Table 1 and Table 2; when the impedance matching circuit is as shown in Fig. 7, the parallel connection shown in Table 1 and Table 2 above can be the fourth parallel connection, and the series connection can be the third series connection, and the corresponding fourth series connection can be added in Table 1 and Table 2 The inductance and capacitance of the embodiment of the present invention will not be repeated here. In the embodiment of the present invention, the principle of the impedance matching circuit is described by taking the impedance matching circuit 22 shown in FIG. 5 as an example. details as follows:

In the communication terminal, as shown in FIG. 5, the input end SL1 of the impedance matching circuit ₂₂ can be connected with the output end of the filter shown in FIG. 1, and the output end SL2 of the impedance matching circuit ₂₂ can be connected with the output end of the filter shown in FIG. TX/RX switch connection. The working process of the capacitance array of the impedance matching circuit 22 can refer to the prior art. Here, the first single-pole three-throw switch SW ₃₁ , the second single-pole three-throw switch SW ₃₂ and the first inductor L ₁₁ and the first inductor L ₁₂ connected in series in sequence The first inductance array formed with the first inductance L ₁₃ is used as an example to illustrate the working process of the inductance array of the impedance matching circuit 22: when the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first single-pole three-throw switch When the first fixed terminal b ₃₁ of SW ₃₁ is connected, and the movable terminal a ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected with the first fixed terminal b ₃₂ of the second single-pole three-throw switch SW ₃₂ , the first inductance array The inductance value is L ₁₁ ; when the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first fixed end b ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the second single-pole three-throw switch SW ₃₂ When the moving end a ₃₂ is connected to the second fixed end c ₃₂ of the second single-pole three-throw switch SW ₃₂ , the inductance value of the first inductance array is L ₁₁ +L ₁₂ ; when the moving end of the first single-pole three-throw switch SW ₃₁ a ₃₁ is connected to the first fixed end b ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the moving end a ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected to the third fixed end b of the second single-pole three-throw switch SW ₃₂ When d ₃₂ is connected, the _inductance value of the first _{inductance array} is L ₁₁ +L ₁₂ +L ₁₃ ; When the end _c31 is connected, and the moving end _a32 of the second single-pole three-throw switch _SW32 is connected to the second fixed end _c32 of the second single-pole three-throw switch _SW32 , the inductance value of the first inductance array is _L12 ; When the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the second fixed end c ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the moving end a ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected to the second When the third fixed end d ₃₂ of the single-pole three-throw switch SW ₃₂ is connected, the inductance value of the first inductor array is L ₁₂ +L ₁₃ ; when the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first single-pole three-throw When the third fixed end d ₃₁ of the throw switch SW ₃₁ is connected and the moving end a ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected with the third fixed end d ₃₂ of the second single-pole three-throw switch SW ₃₂ , the first inductance The inductance value of the array is L ₁₃ ; when the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the second fixed end c ₃₁ of the first single-pole three-throw switch SW ₃₁ , and the second single-pole three-throw switch SW ₃₂ When the moving end a ₃₂ of the second single-pole three-throw switch SW ₃₂ is connected to the first fixed end b ₃₂ of the second single-pole three-throw switch SW 32, or, when the moving end a ₃₁ of the first single-pole three-throw switch SW ₃₁ is connected to the first single-pole three-throw switch SW ₃₁ The third fixed terminal d ₃₁ is connected, and the moving terminal of the second single-pole three-throw switch SW ₃₂ When a ₃₂ is connected to the second fixed terminal c ₃₂ of the second single-pole three-throw switch SW ₃₂ , the inductance value of the first inductance array is 0. According to the circuit structure and the conduction condition of the inductance array, when the inductance array is located in the parallel adjustment circuit , the inductance state with an inductance value of 0 is prohibited. For example, since the first inductance array in FIG. Arrays are prohibited. According to the description of the first inductance array in FIG. 5, in the embodiment of the present invention, the first inductance array in FIG. 5 can realize six inductance value states, that is, the first inductance array in FIG. Realize the adjustment of six inductance values, the six inductance values are: L ₁₁ , L ₁₂ , L ₁₃ , L ₁₁ +L ₁₂ , L ₁₂ +L ₁₃ and L ₁₁ +L ₁₂ +L ₁₃ , similarly, Fig. The second inductance array in 5 (located in the series adjustment circuit) can realize the adjustment of seven inductance values, and the seven inductance values are: L ₂₁ , L ₂₂ , L ₂₃ , L ₂₁ +L ₂₂ , L ₂₂ +L ₂₃ , L ₂₁ +L ₂₂ +L ₂₃ and 0.

In the embodiment of the present invention, as shown in FIG. 5 , the matching type of the impedance matching circuit 22 can be adjusted through the first SPDT switch SW ₂₁ and the first SPDT switch SW ₂₂ of the impedance matching circuit 22 . Specifically, when the moving end a ₂₁ of the first SPDT switch SW ₂₁ is connected to the first fixed end b ₂₁ of the first SPDT switch SW ₂₁ , and the moving end a ₂₂ of the second SPDT switch SW ₂₂ When connected to the first fixed end b ₂₂ of the second SPDT switch SW ₂₂ , the matching type of the impedance matching circuit 22 is a parallel inductance-series inductance type, and the equivalent circuit diagram of the impedance matching circuit 22 is shown in FIG. 8 . When the moving end a ₂₁ of the first single pole double throw switch SW ₂₁ is connected to the first fixed end b ₂₁ of the first single pole double throw switch SW ₂₁ , and the moving end a ₂₂ of the second single pole double throw switch SW ₂₂ is connected to the second When the second fixed terminal c ₂₂ of the SPDT switch SW ₂₂ is connected, the matching type of the impedance matching circuit 22 is a parallel inductor-series capacitor type, and the equivalent circuit diagram of the impedance matching circuit 22 is shown in FIG. 9 . When the moving end a ₂₁ of the first single pole double throw switch SW ₂₁ is connected to the second fixed end c ₂₁ of the first single pole double throw switch SW ₂₁ , and the moving end a ₂₂ of the second single pole double throw switch SW ₂₂ is connected to the second When the first fixed end b ₂₂ of the SPDT switch SW ₂₂ is connected, the matching type of the impedance matching circuit 22 is a parallel capacitor-series inductor type, and the equivalent circuit diagram of the impedance matching circuit 22 is shown in FIG. 10 . When the moving end a ₂₁ of the first single pole double throw switch SW ₂₁ is connected to the second fixed end c ₂₁ of the first single pole double throw switch SW ₂₁ , and the moving end a ₂₂ of the second single pole double throw switch SW ₂₂ is connected to the second When the second fixed terminal c ₂₂ of the SPDT switch SW ₂₂ is connected, the matching type of the impedance matching circuit 22 is parallel capacitor-series capacitor type, and the equivalent circuit diagram of the impedance matching circuit 22 is shown in FIG. 11 .

In the embodiment of the present invention, after the processing unit 21 determines the target matching impedance and the matching type of the target matching impedance, it can set the impedance of the impedance matching circuit 22 as the target matching impedance according to the matching type of the target matching impedance. As an example, the impedance matching circuit is the impedance matching circuit 22 shown in FIG. 5 , and the target matching impedance is L ₁₂ +L ₁₃ and L ₂₁ , and the matching type of the target matching impedance is the parallel sensor-series inductor type as an example. For illustration, the processing unit 21 can control the moving terminal a ₂₁ of the first SPDT switch SW ₂₁ and the first SPDT switch SW ₂₁ through the control terminal CL ₂₁ of the first SPDT switch SW 21 according to the parallel sensing-series inductance type. The first fixed terminal b ₂₁ of the switch SW ₂₁ is connected, through the control terminals CL ₃₁₁ and CL ₃₁₂ of the first single-pole three-throw switch SW ₃₁ to control the movable terminal a ₃₁ of the first single-pole three-throw switch SW 31 and the first single-pole three-throw switch SW ₃₁ . The second fixed terminal c ₃₁ of the switch SW ₃₁ is connected, through the control terminals CL ₃₂₁ and CL ₃₂₂ of the second single-pole three-throw switch SW ₃₂ to control the moving terminal a ₃₂ of the second single-pole three-throw switch SW 32 and the second single-pole three-throw switch SW ₃₂ The third fixed end d ₃₂ of the switch SW ₃₂ is connected, at this time, the parallel inductance is L ₁₂ +L ₁₃ ; meanwhile, the processing unit 21 can control the second SPDT through the control end CL ₂₂ of the second SPDT switch SW ₂₂ The moving terminal a ₂₂ of the throw switch SW ₂₂ is connected to the first fixed terminal b ₂₁ of the second SPDT switch SW ₂₂ , and the third SPDT switch SW ₃₃ is controlled by the control terminals CL ₃₃₁ and CL ₃₃₂ of the third SPDT switch SW 33. The moving terminal a _{33 of the throw switch SW 33 is connected to the first fixed terminal b 33 of the} third single-pole three-throw switch SW ₃₃ , and the fourth single-pole three-throw switch SW ₃₄ is controlled by the control terminals CL ₃₄₁ and CL ₃₄₂ of the fourth single-pole three-throw switch SW 34. The moving terminal a _{34 of the throw switch SW 34 is connected to the first fixed terminal b 34 of the} fourth single-pole three-throw switch SW ₃₄ , and at this moment, the series inductance is L ₂₁ . So far, the processing unit 21 adjusts the impedance of the impedance matching circuit 22 to the target matching impedance.

It should be noted that the embodiment of the present invention is illustrated by taking the L-type impedance matching circuit shown in FIG. 5 as an example. The principle and adjustment process of the π-type impedance matching circuit shown in FIG. For the principle and adjustment process of the impedance matching circuit, reference may be made to the related description in FIG. 5 , and details will not be repeated here in the embodiment of the present invention.

In the embodiment of the present invention, the communication terminal is in the free space state by default. When the communication terminal is in the free space state, the antenna environment load of the communication terminal is a fixed load, and the fixed load is usually 50 ohms. At this time, the impedance of the matching impedance circuit For the initial matching impedance, taking the matching impedance circuit 22 shown in FIG. 5 as an example, the initial matching impedance may specifically be a parallel inductor L ₁₁ and a series capacitor C ₂₁ . During the working process of the communication terminal, the load acquisition unit 23 can acquire the antenna environment load in real time, and send the antenna environment load to the processing unit 21, and then, the processing unit 21 queries the load and the matching impedance according to the antenna environment load sent by the load acquisition unit 23 (the correspondence between the load and the matching impedance can be a load-matching impedance characterization table), determine the optimal target matching impedance of the matching impedance circuit 22 under the antenna environment load, and set the impedance of the matching impedance circuit 22 To match the impedance for this target, ensure that the S11 parameter curve of the filter of the communication terminal has good convergence under the antenna environment load, and solve the problem of poor convergence of the S11 parameter curve of the filter caused by the change of the antenna environment load. This measure can ensure that the S11 parameter curve of the filter can maintain good convergence under various antenna environmental loads, thereby ensuring that the communication terminal can maintain good receiving and transmitting indicators under various antenna environmental loads.

The effect of the embodiment of the present invention on the convergence of the S11 parameter curve of the filter will be described below with reference to FIGS. 12 to 14 . Specifically, when the communication terminal is in a free space state, the environmental load of the antenna of the communication terminal may be 50 ohms, the impedance of the impedance matching circuit is the initial matching impedance, the impedance matching circuit is matched by default, and the impedance of the impedance matching circuit may be a parallel inductance L ₁₁ , A series capacitor C ₂₁ , at this time, the S11 parameter curve of the filter is shown in Figure 12, see Figure 12, the S11 parameter curve is located in the center of the Smith chart and the circle formed is small, at this time, the S11 parameter curve converges better At the 50 ohm center of the Smith chart, the convergence of the S11 parameter curve is better. When the environmental load of the antenna changes to Z ₁ , it can be seen from the above Table 2 that the communication terminal is in a hand-held state at this time. If the impedance of the impedance matching circuit is still the initial matching impedance at this time, the S11 parameter curve of the filter can be shown in Figure 13. As shown in Figure 13, the circle surrounded by the S11 parameter curve is relatively large. At this time, the S11 parameter curve cannot converge to the center of the Smith chart at 50 ohms, and the convergence of the S11 parameter curve is poor. This situation will cause the communication terminal to The reception index and emission index etc. have seriously deteriorated. In the embodiment of the present invention, the load acquisition unit can acquire the antenna environment load in real time, and when the load acquisition unit acquires that the antenna environment load is Z1, the processing unit can query the correspondence between the load and the matching impedance (for example, Table ₁ or Table 2 Corresponding relationship shown), obtain the matching impedance corresponding to the antenna environment load Z ₁ , and determine the matching impedance as the target matching impedance, which is the optimal matching impedance. According to Table 1 or Table 2, the target matching impedance The impedance is the parallel capacitance C ₁₁ and the series inductance L ₂₁ +L ₂₂ , the processing unit adjusts the impedance of the impedance matching circuit to the parallel capacitance C ₁₁ and the series inductance L ₂₁ +L ₂₂ to ensure that the S11 parameter curve of the filter is within the antenna environment load Z ₁ has good convergence, at this time, the S11 parameter curve of the filter can be shown in Figure 14, see Figure 14, the S11 parameter curve is located in the center of the Smith chart and the circle it forms is small, at this time, the S11 parameter curve The convergence is better at 50 ohms in the center of the Smith chart, and the convergence of the S11 parameter curve is better. In the embodiment of the present invention, by adjusting the impedance of the impedance matching circuit according to the antenna environmental load, the influence of the change of the antenna environmental load on the convergence of the S11 parameter curve of the filter is weakened, and the S11 of the filter caused by the change of the antenna environmental load is solved. The problem of poor convergence of the parameter curve improves the receiving index and transmitting index of the communication terminal.

In summary, in the antenna load matching device provided by the embodiment of the present invention, since the input end of the impedance matching circuit is connected to the output end of the filter, the load acquisition unit can obtain the antenna environment load of the communication terminal, and the processing unit can obtain the antenna environment load according to the antenna environment load. , query the preset correspondence between the load and the matching impedance and determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit as the target matching impedance. Therefore, the processing unit can adjust the impedance of the impedance matching circuit according to the antenna environment load, so that The impedance of the impedance matching circuit is matched with the antenna load, which ensures the convergence of the S11 parameter curve of the filter of the communication terminal in different environments, and improves the applicability of the communication terminal.

The antenna load matching device provided by the embodiment of the present invention can ensure the convergence of the S11 parameter curve of the filter under different antenna environmental loads, avoid the deterioration of the indicators of the communication terminal, and further avoid a series of adverse situations caused by the deterioration of the indicators of the communication terminal. occur.

The antenna load matching device provided in the embodiment of the present invention can be applied to the following methods, and the antenna load matching method and manufacturing principle in the embodiment of the present invention can refer to the descriptions in the following embodiments.

Please refer to FIG. 15 , which shows a method flowchart of an antenna load matching method provided by an embodiment of the present invention. The antenna load matching method can be used in a communication terminal, and the communication terminal can include a filter and the antenna shown in FIG. 2 The load matching device 20 , as shown in FIG. 2 , the antenna load matching device 20 includes a processing unit 21 , an impedance matching circuit 22 and a load acquisition unit 23 . Referring to Figure 15, the antenna load matching method may include:

Step 1501, the load acquiring unit acquires the antenna environment load of the communication terminal.

Step 1502, the processing unit queries the preset correspondence between the antenna load and the matching impedance according to the antenna environmental load.

Step 1503, the processing unit determines the target matching impedance according to the query result.

Step 1504, the processing unit sets the impedance of the impedance matching circuit as the target matching impedance.

To sum up, in the antenna load matching method provided by the embodiment of the present invention, since the input end of the impedance matching circuit is connected to the output end of the filter, the load acquisition unit can obtain the antenna environment load of the communication terminal, and the processing unit can obtain the antenna environment load according to the antenna environment load. , query the preset correspondence between the load and the matching impedance and determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit as the target matching impedance. Therefore, the processing unit can adjust the impedance of the impedance matching circuit according to the antenna environment load, so that The impedance of the impedance matching circuit is matched with the antenna load, which ensures the convergence of the S11 parameter curve of the filter of the communication terminal in different environments, and improves the applicability of the communication terminal.

Wherein, the load acquisition unit may include a signal transceiving module and a signal coupling module, the signal transceiving module may specifically be a transceiver, and the signal coupling module may specifically include a power coupler and a coupler switch. The coupled signal and the reflected coupled signal are used to calculate the environmental load of the antenna according to the transmitted coupled signal and the reflected coupled signal through the signal transceiver module.

Optionally, in step 1502, the processing unit may query the correspondence between the load and the matching impedance according to the antenna environment load obtained in step 1501, for example, the processing unit queries the correspondence shown in Table 1 or Table 2 above. Wherein, the corresponding relationship between the load and the matching impedance can specifically be a load-matching impedance characterization table, and the matching impedance corresponding to each load in the characterization table can be calculated through theoretical calculation, empirical value setting, characterization table calibration system, etc. obtained by a method, which is not limited in the embodiments of the present invention.

Optionally, an initial matching impedance can be set in the corresponding relationship between the load and the matching impedance, and in step 1503, the processing unit can determine the target matching impedance according to the query result. When there is a corresponding matching impedance, the processing unit may determine the matching impedance corresponding to the antenna environmental load as the target matching impedance according to the query result, and when there is no matching impedance corresponding to the antenna environmental load in the corresponding relationship between the load and the matching impedance, the processing unit The initial matching impedance can be determined as the target matching impedance according to the query result.

Optionally, in step 1504, the processing unit may set the impedance of the impedance matching circuit as the target matching impedance. Specifically, the processing unit may determine the matching type of the target matching impedance, and set the impedance of the impedance matching circuit to the target matching impedance according to the matching type of the target matching impedance. Among them, the matching type is used to indicate the series-parallel type of the target matching impedance. For example, the matching type can be parallel capacitor-series capacitor type, parallel capacitor-series inductor type, parallel inductor-series capacitor type, parallel capacitor-series capacitor type, parallel Capacitor-series capacitor-parallel capacitor type, parallel capacitor-series inductor-parallel inductor type, etc. In the embodiment of the present invention, the corresponding relationship between the load and the matching impedance can also store the matching type, and the processing unit can query the corresponding relationship between the load and the matching impedance to obtain the matching type of the target matching impedance. The specific implementation process can refer to the above-mentioned device embodiment , which will not be repeated here.

To sum up, in the antenna load matching method provided by the embodiment of the present invention, since the input end of the impedance matching circuit is connected to the output end of the filter, the load acquisition unit can obtain the antenna environment load of the communication terminal, and the processing unit can obtain the antenna environment load according to the antenna environment load. , query the preset correspondence between the load and the matching impedance and determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit as the target matching impedance. Therefore, the processing unit can adjust the impedance of the impedance matching circuit according to the antenna environment load, so that The impedance of the impedance matching circuit is matched with the antenna load, which ensures the convergence of the S11 parameter curve of the filter of the communication terminal in different environments, and improves the applicability of the communication terminal.

It should be noted that: the antenna load matching method provided by the embodiment of the present invention and the device embodiment can refer to each other, and the principle of the antenna load matching method provided by the above embodiment has been described in detail in the embodiment of the antenna load matching device. For the implementation process, reference may be made to the device embodiments, which will not be repeated here.

An embodiment of the present invention also provides a communication terminal, which may include a filter and the antenna load matching device described in the above embodiments. For other structures in the communication terminal, reference may be made to that shown in FIG. 1 , and details will not be repeated here in this embodiment of the present invention.

Those of ordinary skill in the art can understand that all or part of the steps for implementing the above embodiments can be completed by hardware, and can also be completed by instructing related hardware through a program. The program can be stored in a computer-readable storage medium. The above-mentioned The storage medium mentioned may be a read-only memory, a magnetic disk or an optical disk, and the like.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (11)

1. An antenna load matching device, characterized in that it is used for a communication terminal, and the communication terminal includes a filter and the antenna load matching device, and the antenna load matching device includes: a processing unit, an impedance matching circuit and a load acquisition unit, the input end of the impedance matching circuit is connected to the output end of the filter, The load obtaining unit is used to obtain the antenna environment load of the communication terminal; The processing unit is configured to query the correspondence between the preset load and the matching impedance according to the environmental load of the antenna, determine the target matching impedance according to the query result, and set the impedance of the impedance matching circuit as the target matching impedance. 2. The antenna load matching device according to claim 1, wherein: The processing unit is used for: When there is a matching impedance corresponding to the antenna environmental load in the correspondence relationship, determining the matching impedance corresponding to the antenna environmental load as the target matching impedance; When there is no matching impedance corresponding to the environmental load of the antenna in the correspondence relationship, a preset initial matching impedance is determined as the target matching impedance. 3. The antenna load matching device according to claim 1, wherein: The processing unit is further configured to determine a matching type of the target matching impedance, and set the impedance of the impedance matching circuit to the target matching impedance according to the matching type of the target matching impedance. 4. The antenna load matching device according to any one of claims 1 to 3, wherein: The impedance matching circuit includes: a first parallel adjustment circuit and a first series adjustment circuit, one end of the first parallel adjustment circuit and one end of the first series adjustment circuit are respectively connected to the input end of the impedance matching circuit, The other end of the first parallel adjustment circuit is grounded, and the other end of the first series adjustment circuit is connected to the output end of the impedance matching circuit; Alternatively, the impedance matching circuit includes: a second parallel adjustment circuit, a second series adjustment circuit and a third parallel adjustment circuit, one end of the second parallel adjustment circuit and one end of the second series adjustment circuit are respectively connected to the The input end of the impedance matching circuit is connected, one end of the third parallel adjustment circuit and the other end of the second series adjustment circuit are respectively connected to the output end of the impedance matching circuit, and the other end of the second parallel adjustment circuit One end and the other end of the third parallel adjustment circuit are respectively grounded; Alternatively, the impedance matching circuit includes: a third series adjustment circuit, a fourth parallel adjustment circuit and a fourth series adjustment circuit, one end of the third series adjustment circuit is connected to the input end of the impedance matching circuit, and the first The other end of the three series adjustment circuit and one end of the fourth series adjustment circuit are respectively connected to one end of the fourth parallel adjustment circuit, the other end of the fourth parallel adjustment circuit is grounded, and the fourth series adjustment circuit The other end is connected with the output end of the impedance matching circuit. 5. The antenna load matching device according to claim 4, characterized in that, The first parallel adjustment circuit includes: a first single-pole double-throw switch, a first capacitor array, and a first inductance array, and the first inductance array includes: a first single-pole three-throw switch, a second single-pole three-throw switch, and sequentially connected in series The three first inductors; The moving end of the first single-pole double-throw switch is connected to the input end of the impedance matching circuit, the first fixed end is connected to the moving end of the first single-pole three-throw switch, and the second fixed end is connected to the first The first end of a capacitor array is connected; the three fixed ends of the first single-pole three-throw switch are respectively connected to the first ends of the three first inductances in one-to-one correspondence, and the first ends of the second single-pole three-throw switch The three fixed ends are respectively connected to the second ends of the three first inductors in one-to-one correspondence, and the moving ends of the second single-pole three-throw switch and the second end of the first capacitor array are respectively grounded; The second series adjustment circuit includes: a second single-pole double-throw switch, a second capacitor array, and a second inductance array, and the second inductance array includes: a third single-pole three-throw switch, a fourth single-pole three-throw switch, and sequentially connected in series The three second inductors; The moving end of the second SPDT switch is connected to the input end of the impedance matching circuit, the first fixed end is connected to the moving end of the third SPDT switch, and the second fixed end is connected to the first The first ends of the two capacitor arrays are connected; the three fixed ends of the third single-pole three-throw switch are respectively connected to the first ends of the three second inductances in one-to-one correspondence, and the fourth single-pole three-throw switch is connected in one-to-one correspondence. The three fixed ends are respectively connected to the second ends of the three second inductors in one-to-one correspondence, and the moving end of the fourth single-pole three-throw switch and the second end of the second capacitor array are respectively connected to the impedance The output terminal of the matching circuit is connected; Wherein, in the impedance matching circuit, the control terminals of all single-pole double-throw switches, all capacitor arrays and all single-pole three-throw switches are respectively connected to the processing unit. 6. The antenna load matching device according to claim 4, characterized in that, The second parallel adjustment circuit includes: a first single-pole double-throw switch, a first capacitor array, and a first inductance array, and the first inductance array includes: a first single-pole three-throw switch, a second single-pole three-throw switch, and sequentially connected in series The three first inductors; The moving end of the first single-pole double-throw switch is connected to the input end of the impedance matching circuit, the first fixed end is connected to the moving end of the first single-pole three-throw switch, and the second fixed end is connected to the first The first end of a capacitor array is connected; the three fixed ends of the first single-pole three-throw switch are respectively connected to the first ends of the three first inductances in one-to-one correspondence, and the first ends of the second single-pole three-throw switch The three fixed ends are respectively connected to the second ends of the three first inductors in one-to-one correspondence, and the moving ends of the second single-pole three-throw switch and the second end of the first capacitor array are respectively grounded; The second series adjustment circuit includes: a second single-pole double-throw switch, a second capacitor array, and a second inductance array, and the second inductance array includes: a third single-pole three-throw switch, a fourth single-pole three-throw switch, and sequentially connected in series The three second inductors; The moving end of the second SPDT switch is connected to the input end of the impedance matching circuit, the first fixed end is connected to the moving end of the third SPDT switch, and the second fixed end is connected to the first The first ends of the two capacitor arrays are connected; the three fixed ends of the third single-pole three-throw switch are respectively connected to the first ends of the three second inductances in one-to-one correspondence, and the fourth single-pole three-throw switch is connected in one-to-one correspondence. The three fixed ends are respectively connected to the second ends of the three second inductors in one-to-one correspondence, and the moving end of the fourth single-pole three-throw switch and the second end of the second capacitor array are respectively connected to the impedance The output terminal of the matching circuit is connected; The third parallel adjustment circuit includes: a third single-pole double-throw switch, a third capacitor array, and a third inductance array, and the third inductance array includes: a fifth single-pole three-throw switch, a sixth single-pole three-throw switch, and sequentially connected in series The three third inductors; The moving end of the third single-pole double-throw switch is connected to the output end of the impedance matching circuit, the first fixed end is connected to the moving end of the fifth single-pole three-throw switch, and the second fixed end is connected to the first The first end of the three-capacitor array is connected; the three fixed ends of the fifth single-pole three-throw switch are respectively connected to the first ends of the three third inductors in one-to-one correspondence, and the sixth single-pole three-throw switch is connected in one-to-one correspondence. The three fixed ends are respectively connected to the second ends of the three third inductors in one-to-one correspondence, and the moving end of the sixth single-pole three-throw switch and the second end of the third capacitor array are respectively grounded; Wherein, in the impedance matching circuit, the control terminals of all single-pole double-throw switches, all capacitor arrays and all single-pole three-throw switches are respectively connected to the processing unit. 7. The antenna load matching device according to claim 4, characterized in that, The third series adjustment circuit includes: a first single-pole double-throw switch, a first capacitor array, and a first inductance array, and the first inductance array includes: a first single-pole three-throw switch, a second single-pole three-throw switch, and sequentially connected in series The three first inductors; The moving end of the first single-pole double-throw switch is connected to the input end of the impedance matching circuit, the first fixed end is connected to the moving end of the first single-pole three-throw switch, and the second fixed end is connected to the first The first end of a capacitor array is connected; the three fixed ends of the first single-pole three-throw switch are respectively connected to the first ends of the three first inductances in one-to-one correspondence, and the first ends of the second single-pole three-throw switch The three fixed ends are respectively connected to the second ends of the three first inductors in one-to-one correspondence, and the moving ends of the second single-pole three-throw switch and the second end of the first capacitor array are respectively connected to the first node connect; The fourth parallel adjustment circuit includes: a second single-pole double-throw switch, a second capacitor array, and a second inductance array, and the second inductance array includes: a third single-pole three-throw switch, a fourth single-pole three-throw switch, and sequentially connected in series The three second inductors; The moving end of the second single-pole double-throw switch is connected to the first node, the first fixed end is connected to the moving end of the third single-pole three-throw switch, and the second fixed end is connected to the second capacitor array connected to the first end of the third single-pole three-throw switch; the three fixed ends of the third single-pole three-throw switch are connected to the first ends of the three second inductances in one-to-one correspondence, and the three non-movable ends of the fourth single-pole three-throw switch The moving ends are respectively connected to the second ends of the three second inductors in one-to-one correspondence, and the moving ends of the fourth single-pole three-throw switch and the second end of the second capacitor array are respectively grounded; The fourth series adjustment circuit includes: a third single-pole double-throw switch, a third capacitor array, and a third inductance array, and the third inductance array includes: a fifth single-pole three-throw switch, a sixth single-pole three-throw switch, and sequentially connected in series The three third inductors; The moving end of the third single-pole double-throw switch is connected to the first node, the first fixed end is connected to the moving end of the fifth single-pole three-throw switch, and the second fixed end is connected to the third capacitor array connected to the first end of the fifth single-pole three-throw switch; the three fixed ends of the fifth single-pole three-throw switch are respectively connected to the first ends of the three third inductances in one-to-one correspondence, and the three non-movable ends of the sixth single-pole three-throw switch The moving ends are respectively connected to the second ends of the three third inductances in one-to-one correspondence, and the moving ends of the sixth single-pole three-throw switch and the second end of the third capacitor array are respectively connected to the impedance matching circuit. output connection; Wherein, in the impedance matching circuit, the control terminals of all single-pole double-throw switches, all capacitor arrays and all single-pole three-throw switches are respectively connected to the processing unit. 8. The antenna load matching device according to any one of claims 1 to 3, wherein the load acquisition unit comprises: a signal transceiving module and a signal coupling module, The signal transceiving module is configured to input a transmission signal to the signal coupling module; The signal coupling module is configured to obtain a transmission coupling signal and a reflection coupling signal, and input the transmission coupling signal and the reflection coupling signal to the signal transceiver module, and the transmission coupling signal is a coupling signal of the transmission signal , the reflection coupling signal is a coupling signal of the reflection signal of the transmission signal; The signal transceiving module is further configured to calculate the environmental load of the antenna according to the transmission coupling signal and the reflection coupling signal. 9. An antenna load matching method, characterized in that it is used for a communication terminal, the communication terminal comprising a filter and the antenna load matching device according to any one of claims 1 to 8, the antenna load matching device comprising: processing A unit, an impedance matching circuit and a load acquisition unit, the method comprising: The load obtaining unit obtains the antenna environment load of the communication terminal; The processing unit queries the preset correspondence relationship between the antenna load and the matching impedance according to the antenna environmental load; The processing unit determines the target matching impedance according to the query result; The processing unit sets the impedance of the impedance matching circuit to the target matching impedance. 10. The method according to claim 9, wherein the processing unit sets the impedance of the impedance matching circuit as the target matching impedance, comprising: The processing unit determines a matching type of the target matching impedance; The processing unit sets the impedance of the impedance matching circuit to the target matching impedance according to the matching type of the target matching impedance. 11. A communication terminal, characterized in that the communication terminal comprises: a filter and the antenna load matching device according to any one of claims 1 to 8.