CN109167659A - One type Lorentz 8+4 type chaotic secret communication circuit - Google Patents

One type Lorentz 8+4 type chaotic secret communication circuit Download PDF

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Publication number
CN109167659A
CN109167659A CN201811290908.5A CN201811290908A CN109167659A CN 109167659 A CN109167659 A CN 109167659A CN 201811290908 A CN201811290908 A CN 201811290908A CN 109167659 A CN109167659 A CN 109167659A
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China
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receiving
operational amplifier
transmission
resistor
inverting input
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张剑锋
史书军
史林鑫
高楠
张新国
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/001Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

本发明公开了一种类洛伦兹8+4型混沌保密通信电路,包括发送端信号输入点、发送端加密混沌电路、通信信道、接收端解密混沌电路和接收端信号输出点,发送端加密混沌电路由发送端三阶类洛伦兹3+2型电路与发送端信号加法器构成,接收端解密混沌电路由接收端三阶类洛伦兹3+2型电路与接收端信号加法器构成,接收端信号加法器包括一个接收调制运算放大器和四个接收调制电阻,当发送端信号输入点接入欲传送的电子信号后,经过发送端的混沌加密,产生携带有用信号的混沌信号,送到通信信道中,被接收端接收,接收端经过混沌解密处理,产生解密的信号,送到接收端信号输出点,完成混沌保密通信过程。本发明工作稳定、失真小、调试容易、便于批量生产。

The invention discloses a Lorentz-like 8+4 type chaotic secure communication circuit, which comprises a signal input point of a transmitting end, an encrypted chaotic circuit of the transmitting end, a communication channel, a deciphering chaotic circuit of the receiving end and a signal output point of the receiving end, and the encrypted chaotic circuit of the transmitting end. The circuit is composed of a third-order Lorentz-like 3+2 type circuit at the transmitting end and a signal adder at the transmitting end. The signal adder at the receiving end includes a receiving modulation operational amplifier and four receiving modulation resistors. When the signal input point of the transmitting end is connected to the electronic signal to be transmitted, the chaotic encryption of the transmitting end generates a chaotic signal carrying a useful signal, which is sent to the communication In the channel, it is received by the receiving end, and the receiving end undergoes chaotic decryption processing to generate a decrypted signal, which is sent to the signal output point of the receiving end to complete the chaotic secure communication process. The invention has stable operation, small distortion, easy debugging and convenient mass production.

Description

One type Lorentz 8+4 type chaotic secret communication circuit
Technical field
The invention belongs to nonlinear circuit technical fields, and in particular to a type Lorentz 8+4 type chaotic secret communication electricity Road.
Background technique
Classical Lorentz circuit is chaos circuit, and application field is very extensive, applies it first is that constituting using it a variety of mixed Ignorant circuit for secure communication etc..But there are the following problems for classical Lorentz circuit and its chaotic secret communication circuit of composition: must Must have 10 or more operational amplifiers and 4 analog multipliers to constitute, circuit is complicated, debugging is difficult, at high cost, of poor quality; In addition, three rank class Lorentz circuit structures are simple, debugging is easy, but is not involved with and is mixed using what this element circuit formed Ignorant circuit for secure communication, this is defect existing for existing chaotic secret communication circuit.
Summary of the invention
The purpose of the present invention is to solve the technical problems existing in the prior art, provide a kind of debug and are easy, are distorted It is small, precision is high, good operating stability and convenient for batch production class Lorentz 8+4 type chaotic secret communication circuit.
In order to achieve the above object, the invention adopts the following technical scheme: a type Lorentz 8+4 type chaotic secret communication Circuit, including send end signal input point, transmitting terminal encryption chaos circuit, communication channel, receiving end decryption chaos circuit and connect Receiver signal output point, the transmitting terminal encryption chaos circuit are believed by three rank class Lorentz 3+2 type circuit of transmitting terminal and transmitting terminal Number adder is constituted, the transmitting terminal signal adder includes transmissions a modulation operation amplifier and four transmission modulate it is electric Resistance, the inverting input terminal for sending modulation operation amplifier are connect with end signal input point is sent, the transmission modulation operation The non-inverting input terminal of amplifier is connect with the output end of three rank class Lorentz 3+2 type circuit of transmitting terminal, the transmission modulation operation The output end of amplifier is connect with communication channel, and the receiving end decryption chaos circuit is by three rank class Lorentz 3+2 type of receiving end Circuit and receiving end signal adder are constituted, and the receiving end signal adder includes a reception modulation operation amplifier and four A reception modulated resistance, the inverting input terminal for receiving modulation operation amplifier are connect with communication channel, the reception modulation The non-inverting input terminal of operational amplifier is connect with the output end of three rank class Lorentz 3+2 type circuit of receiving end, the reception modulation The output end of operational amplifier is connect with receiving end signal output point.
Further, the transmitting terminal encryption chaos circuit is put including the first transmission operational amplifier, the second transmission operation Big device, third transmission operational amplifier, the 4th transmission operational amplifier, the first transmission analog multiplier, second send simulation and multiply Musical instruments used in a Buddhist or Taoist mass, first send resistance, the second transmission resistance, third and send resistance, the 4th transmission resistance, the 5th transmission resistance, the 6th hair Power transmission resistance, the 7th transmission resistance, the 8th transmission resistance, the 9th transmission resistance, the tenth transmission resistance, first send capacitor, second It sends capacitor and third sends capacitor, described first, which sends operational amplifier, the second transmission operational amplifier, third, sends operation The non-inverting input terminal of amplifier is grounded, the described first inverting input terminal for sending operational amplifier sent respectively with first resistance and Second sends one end connection of resistance, connects first between the inverting input terminal and output end of the first transmission operational amplifier Capacitor is sent, the described first output end for sending operational amplifier is the first transmission output end, and described first sends operation amplifier The output end of device is connect with one end of the 9th transmission resistance, and the described 9th other end for sending resistance sends operation with the 4th respectively The non-inverting input terminal of amplifier is connected with one end of the tenth transmission resistance, and the described tenth sends the other end ground connection of resistance, described The inverting input terminal of 4th transmission operational amplifier is connect with one end of the 7th transmission resistance and the 8th transmission resistance respectively, described The other end of 7th transmission resistance is connect with end signal input point is sent, and the described 8th, which sends the other end of resistance and the 4th, sends The output end of operational amplifier connects, and the described 4th output end for sending operational amplifier is sent with communication channel, first respectively The other end of resistance, one end of third transmission resistance, the non-inverting input terminal of the first transmission analog multiplier, second send simulation and multiply The non-inverting input terminal of musical instruments used in a Buddhist or Taoist mass connects, and the described second inverting input terminal for sending operational amplifier sends the another of resistance with third respectively One end, the 4th one end for sending resistance connect, and the described 4th, which sends the other end of resistance and second, sends the defeated of analog multiplier Outlet connection, it is described second transmission operational amplifier inverting input terminal connect with output end second send capacitor, described second The output end for sending operational amplifier is second to send output end, and described second sends the output end of operational amplifier respectively with the Two send the other end of resistance, the first non-inverting input terminal for sending analog multiplier connects, and described first sends analog multiplier Output end with the 5th transmission resistance one end connect, it is described 5th send resistance the other end and third transmission operational amplifier Inverting input terminal connection, the third sends and connects in parallel the 6th between the inverting input terminal and output end of operational amplifier It sending resistance and third and sends capacitor, the output end that the third sends operational amplifier is that third sends output end, described the The output end of three transmission operational amplifiers is connect with the inverting input terminal of the second transmission analog multiplier.
Further, the receiving end decryption chaos circuit is put including the first reception operational amplifier, the second reception operation Big device, third reception operational amplifier, the 4th reception operational amplifier, the first reception analog multiplier, second receive simulation and multiply Musical instruments used in a Buddhist or Taoist mass, the first reception resistance, the second reception resistance, third reception resistance, the 4th reception resistance, the 5th reception resistance, the 6th connect Receipts resistance, the 7th receive resistance, the 8th reception resistance, the 9th reception resistance, the tenth reception resistance, the first reception capacitor, second It receives capacitor and third receives capacitor, described first, which receives operational amplifier, the second reception operational amplifier, third, receives operation The non-inverting input terminal of amplifier is grounded, the described first inverting input terminal for receiving operational amplifier received respectively with first resistance and Second receives one end connection of resistance, connects first between the inverting input terminal and output end of the first reception operational amplifier Capacitor is received, the described first output end for receiving operational amplifier is the first reception output end, and described first receives operation amplifier The output end of device is connect with one end of the 9th reception resistance, and the described 9th other end for receiving resistance receives operation with the 4th respectively The non-inverting input terminal of amplifier is connected with one end of the tenth reception resistance, and the described tenth receives the other end ground connection of resistance, described The inverting input terminal of 4th reception operational amplifier is connect with one end of the 7th reception resistance and the 8th reception resistance respectively, described The other end of 8th reception resistance is connect with the output end of the 4th reception operational amplifier, and the described 4th receives operational amplifier Output end is connect with receiving end signal output point, and the described 7th other end for receiving resistance is received with communication channel, first respectively The other end of resistance, one end of third reception resistance, the non-inverting input terminal of the first reception analog multiplier, second receive simulation and multiply The non-inverting input terminal of musical instruments used in a Buddhist or Taoist mass connects, and the described second inverting input terminal for receiving operational amplifier receives the another of resistance with third respectively One end, the 4th one end for receiving resistance connect, and the described 4th, which receives the other end of resistance and second, receives the defeated of analog multiplier Outlet connection, it is described second reception operational amplifier inverting input terminal connect with output end second receive capacitor, described second The output end for receiving operational amplifier is second to receive output end, and described second receives the output end of operational amplifier respectively with the Two receive the other end of resistance, the first non-inverting input terminal for receiving analog multiplier connects, and described first receives analog multiplier Output end with the 5th reception resistance one end connect, it is described 5th receive resistance the other end and third reception operational amplifier Inverting input terminal connection, the third receives and connects in parallel the 6th between the inverting input terminal and output end of operational amplifier It receiving resistance and third and receives capacitor, the output end that the third receives operational amplifier is that third receives output end, described the The output end of three reception operational amplifiers is connect with the inverting input terminal of the second reception analog multiplier.
Further, the transmitting terminal encrypts and is equipped with the first wire jumper needle and the second wire jumper needle in chaos circuit, and described first The end K1-1 of wire jumper needle is connect with end signal input point is sent, and the end K1-2 of the first wire jumper needle sends resistance with the 7th and connects It connects, the end the K1-3 ground connection of the first wire jumper needle, the end K2-1 of the second wire jumper needle sends the defeated of operational amplifier with the 4th Outlet connection, the end K2-2 of the second wire jumper needle sends the other end of resistance with first respectively, third send resistance one end, First sends the non-inverting input terminal of analog multiplier, the second non-inverting input terminal for sending analog multiplier connects, and described second jumps The end K2-3 of line needle is connect with the output end of the first transmission operational amplifier.
Further, third wire jumper needle, the K3-1 of the third wire jumper needle are equipped in the receiving end decryption chaos circuit End is connect with communication channel, and the end K3-2 of the third wire jumper needle receives the other end of resistance with first respectively, third receives electricity One end of resistance, the non-inverting input terminal of the first reception analog multiplier, the second non-inverting input terminal for receiving analog multiplier connect, institute The end K3-3 for stating third wire jumper needle is connect with the output end of the first reception operational amplifier.
Further, the communication channel is conducting wire.
The present invention has the advantages that class Lorentz 8+4 type chaotic secret communication of the invention compared with the prior art Circuit includes sending end signal input point, transmitting terminal encryption chaos circuit, communication channel, receiving end decryption chaos circuit and reception End signal output point, transmitting terminal encrypt chaos circuit by three rank class Lorentz 3+2 type circuit of transmitting terminal and send end signal addition Device is constituted, and receiving end decryption chaos circuit is made of three rank class Lorentz 3+2 type circuit of receiving end with receiving end signal adder, Receiving end signal adder includes a reception modulation operation amplifier and four reception modulated resistances, is inputted when sending end signal After the point access electronic signal to be transmitted, by the chaos encryption of transmitting terminal, the chaotic signal for carrying useful signal is generated, is sent to In communication channel, receiving end is received, and chaos decryption processing is passed through in receiving end, is generated the signal of decryption, is sent to receiving end signal Output point completes chaotic secret communication process.The present invention includes 8 operational amplifiers and 4 analog multipliers in total, and work is steady It is fixed, be distorted small, debugging and be easy, convenient for batch production.In addition, the present invention is in class Lorentz 8+4 type chaotic secret communication circuit By three groups of wire jumper needles of setting on basis, controllable class Lorentz 8+4 type chaotic secret communication circuit is constituted, it can It realizes all outputs that the asynchronous of chaotic secret communication circuit, no signal is synchronous, has signal communication, it is logical to can be used for chaotic secret In the practical application of letter and experimental teaching demonstration.
Detailed description of the invention
Fig. 1 is class Lorentz 8+4 type chaotic secret communication circuit block diagram of the present invention;
Fig. 2 is class Lorentz 8+4 type chaotic secret communication circuit diagram of the present invention;
Fig. 3 is the controllable class Lorentz 8+4 type chaotic secret communication circuit diagram of the present invention;
Fig. 4 is the asynchronous phasor of class Lorentz 8+4 type chaotic secret communication circuit xr-xs of the present invention;
Fig. 5 is the synchronous phasor of class Lorentz 8+4 type chaotic secret communication circuit xr-xs of the present invention;
Fig. 6 is the asynchronous phasor of class Lorentz 8+4 type chaotic secret communication circuit yr-ys of the present invention;
Fig. 7 is the synchronous phasor of class Lorentz 8+4 type chaotic secret communication circuit yr-ys of the present invention;
Fig. 8 is the asynchronous phasor of class Lorentz 8+4 type chaotic secret communication circuit zr-zs of the present invention;
Fig. 9 is the synchronous phasor of class Lorentz 8+4 type chaotic secret communication circuit zr-zs of the present invention;
Figure 10 is class Lorentz 8+4 type chaotic secret communication circuit of the present invention modulation and received sine wave signal;
Figure 11 is class Lorentz 8+4 type chaotic secret communication circuit of the present invention modulation and received actual signal.
Appended drawing reference meaning of the present invention is as follows: 1, sending end signal input point;2, transmitting terminal encrypts chaos circuit;3, it communicates Channel;4, chaos circuit is decrypted in receiving end;5, receiving end signal output point;As1, first send operational amplifier;As2, second Send operational amplifier;As3, third send operational amplifier;As4, the 4th send operational amplifier;Ms1, first send simulation Multiplier;Ms2, second send analog multiplier;Rs1, first send resistance;Rs2, second send resistance;Rs3, third are sent Resistance;Rs4, the 4th send resistance;Rs5, the 5th send resistance;Rs6, the 6th send resistance;Rs7, the 7th send resistance;Rs8, 8th sends resistance;Rs9, the 9th send resistance;Rs10, the tenth send resistance;Cs1, first send capacitor;Cs2, second send Capacitor;Cs3, third send capacitor;Ar1, first receive operational amplifier;Ar2, second receive operational amplifier;Ar3, third Receive operational amplifier;Ar4, the 4th receive operational amplifier;Mr1, first receive analog multiplier;Mr2, second receive simulation Multiplier;Rr1, first receive resistance;Rr2, second receive resistance;Rr3, third receive resistance;Rr4, the 4th receive resistance; Rr5, the 5th receive resistance;Rr6, the 6th receive resistance;Rr7, the 7th receive resistance;Rr8, the 8th receive resistance;Rr9, the 9th Receive resistance;Rr10, the tenth receive resistance;Cr1, first receive capacitor;Cr2, second receive capacitor;Cr3, third receive electricity Hold;K1, the first wire jumper needle;K2, the second wire jumper needle;K3, third wire jumper needle.
Specific embodiment
Present invention will be further explained below with reference to the attached drawings and specific embodiments.
Embodiment 1
As shown in Figs. 1-2, a type Lorentz 8+4 type chaotic secret communication circuit, including send end signal input point 1, send End encryption chaos circuit 2, communication channel 3, receiving end decryption chaos circuit 4 and receiving end signal output point 5, communication channel 3 are Conducting wire, it includes the first transmission operational amplifier As1, the second transmission operational amplifier As2, third hair that transmitting terminal, which encrypts chaos circuit, Operational amplifier As3, the 4th is sent to send operational amplifier As4, the first transmission analog multiplier Ms1, the second transmission analogue multiplication Device Ms2, first send resistance Rs1, the second transmission resistance Rs2, third and send resistance Rs3, the 4th transmission resistance Rs4, the 5th hair Power transmission hinders Rs5, the 6th sends resistance Rs6, the 7th send resistance Rs7, the 8th send resistance Rs8, the 9th send resistance Rs9, the Ten, which send resistance Rs10, the first transmission capacitor Cs1, the second transmission capacitor Cs2 and third, sends capacitor Cs3, and first sends operation Amplifier As1, the second transmission operational amplifier As2, third send the non-inverting input terminal ground connection of operational amplifier As3, the first hair The inverting input terminal of operational amplifier As1 is sent to connect respectively with one end of the first transmission resistance Rs1 and the second transmission resistance Rs2, First, which sends connection first between the inverting input terminal and output end of operational amplifier As1, sends capacitor Cs1, and first sends operation The output end of amplifier As1 is the first transmission output end X1s, and first, which sends the output end of operational amplifier As1 and the 9th, sends One end of resistance Rs9 connects, and the 9th other end for sending resistance Rs9 sends the same mutually defeated of operational amplifier As4 with the 4th respectively Enter end to connect with one end of the tenth transmission resistance Rs10, the tenth sends the other end ground connection of resistance Rs10, and the 4th transmission operation is put The inverting input terminal of big device As4 is connect with one end of the 7th transmission resistance Rs7 and the 8th transmission resistance Rs8 respectively, and the 7th sends The other end of resistance Rs7 is connect with end signal input point is sent, and the other end and the 4th transmission operation of the 8th transmission resistance Rs8 is put The output end connection of big device As4, the 4th output end for sending operational amplifier As4 send resistance with communication channel 3, first respectively The other end of Rs1, third send one end of resistance Rs3, the non-inverting input terminal of the first transmission analog multiplier Ms1, the second transmission The non-inverting input terminal of analog multiplier Ms2 connects, and the second inverting input terminal for sending operational amplifier As2 is sent with third respectively The other end of resistance Rs3, the 4th one end for sending resistance Rs4 connect, and the 4th, which sends the other end of resistance Rs4 and second, sends mould The output end of quasi-multiplication device Ms2 connects, and the inverting input terminal of the second transmission operational amplifier As2 connect the second transmission with output end Capacitor Cs2, the second output end for sending operational amplifier As2 is the second transmission output end X2s, and second sends operational amplifier The output end of As2 sends the other end of resistance Rs2 with second respectively, the first non-inverting input terminal for sending analog multiplier Ms1 connects It connects, the output end of the first transmission analog multiplier Ms1 is connect with one end of the 5th transmission resistance Rs5, and the 5th sends resistance Rs5's The other end is connect with the inverting input terminal that third sends operational amplifier As3, and third sends the anti-phase input of operational amplifier As3 Sixth in parallel with connecting between output end is held to send resistance Rs6 and third transmission capacitor Cs3, third sends operational amplifier The output end of As3 is that third sends output end X3s, and third sends the output end of operational amplifier As3 and the second transmission simulation multiplies The inverting input terminal of musical instruments used in a Buddhist or Taoist mass Ms2 connects;It includes the first reception operational amplifier Ar1, the second reception that chaos circuit is decrypted in receiving end Operational amplifier Ar2, third receive operational amplifier Ar3, the 4th reception operational amplifier Ar4, the first reception analog multiplier Mr1, second receive analog multiplier Mr2, first receive resistance Rr1, second receive resistance Rr2, third receives resistance Rr3, the Four receive resistance Rr4, the 5th reception resistance Rr5, the 6th reception resistance Rr6, the 7th reception resistance Rr7, the 8th reception resistance Rr8, the 9th reception resistance Rr9, the tenth reception resistance Rr10, the first reception capacitor Cr1, the second reception capacitor Cr2 and third connect Capacitor Cr3 is received, first, which receives operational amplifier Ar1, the second reception operational amplifier Ar2, third, receives operational amplifier Ar3's Non-inverting input terminal ground connection, the inverting input terminal of the first reception operational amplifier Ar1 connect with the first reception resistance Rr1 and second respectively One end connection of resistance Rr2 is received, first, which receives connection first between the inverting input terminal and output end of operational amplifier Ar1, receives Capacitor Cr1, the first output end for receiving operational amplifier Ar1 is the first reception output end X1r, and first receives operational amplifier The output end of Ar1 is connect with one end of the 9th reception resistance Rr9, and the 9th other end for receiving resistance Rr9 is received with the 4th respectively The non-inverting input terminal of operational amplifier Ar4 is connected with one end of the tenth reception resistance Rr10, and the tenth receives the another of resistance Rr10 End ground connection, the 4th inverting input terminal for receiving operational amplifier Ar4 receive resistance Rr7 and the 8th with the 7th respectively and receive resistance One end of Rr8 connects, and the other end of the 8th reception resistance Rr8 is connect with the output end of the 4th reception operational amplifier Ar4, and the 4th Receive operational amplifier Ar4 output end connect with receiving end signal output point, the 7th reception resistance Rr7 the other end respectively with Communication channel 3, first receives the other end of resistance Rr1, third receives one end of resistance Rr3, first receives analog multiplier Mr1 Non-inverting input terminal, second receive analog multiplier Mr2 non-inverting input terminal connection, second receive operational amplifier Ar2 it is anti- Phase input terminal receives the other end of resistance Rr3 with third respectively, one end of the 4th reception resistance Rr4 is connect, and the 4th receives resistance The other end of Rr4 is connect with the output end of the second reception analog multiplier Mr2, and the reverse phase of the second reception operational amplifier Ar2 is defeated Enter end and connect the second reception capacitor Cr2 with output end, the second output end for receiving operational amplifier Ar2 is the second reception output end X2r, the output end of the second reception operational amplifier Ar2 receive simulation with the other end of the second reception resistance Rr2, first respectively and multiply The non-inverting input terminal of musical instruments used in a Buddhist or Taoist mass Mr1 connects, and first, which receives the output end of analog multiplier Mr1 and the 5th, receives one end of resistance Rr5 The other end of connection, the 5th reception resistance Rr5 is connect with the inverting input terminal that third receives operational amplifier Ar3, and third receives In parallel the 6th is connected between the inverting input terminal of operational amplifier Ar3 and output end receives resistance Rr6 and third reception capacitor Cr3, the output end that third receives operational amplifier Ar3 is that third receives output end X3r, and third receives operational amplifier Ar3's Output end is connect with the inverting input terminal of the second reception analog multiplier Mr2.
After sending the access electronic signal to be transmitted of end signal input point 1, by the chaos encryption of transmitting terminal, generation is taken Chaotic signal with useful signal is sent in communication channel 3, and receiving end receives, and chaos decryption processing is passed through in receiving end, is generated The signal of decryption is sent to receiving end signal output point 5, completes chaotic secret communication process.
Embodiment 2
As shown in figure 3, a type Lorentz 8+4 type chaotic secret communication circuit, including send end signal input point 1, transmitting terminal Chaos circuit 2, communication channel 3, receiving end decryption chaos circuit 4 and receiving end signal output point 5 are encrypted, communication channel 3 is to lead Line, it includes the first transmission operational amplifier As1, the second transmission operational amplifier As2, third transmission that transmitting terminal, which encrypts chaos circuit, Operational amplifier As3, the 4th send operational amplifier As4, the first transmission analog multiplier Ms1, the second transmission analog multiplier Ms2, first send resistance Rs1, the second transmission resistance Rs2, third and send resistance Rs3, the 4th transmission resistance Rs4, the 5th transmission Resistance Rs5, the 6th send resistance Rs6, the 7th transmission resistance Rs7, the 8th transmission resistance Rs8, the 9th transmission resistance Rs9, the tenth Send resistance Rs10, first send capacitor Cs1, second send capacitor Cs2, third sends capacitor Cs3, the first wire jumper needle K1 and the Two wire jumper needle K2, first, which sends operational amplifier As1, the second transmission operational amplifier As2, third, sends operational amplifier As3 Non-inverting input terminal ground connection, first send operational amplifier As1 inverting input terminal respectively with first send resistance Rs1 and second One end connection of resistance Rs2 is sent, first sends the first hair of connection between the inverting input terminal and output end of operational amplifier As1 Power transmission holds Cs1, and the first output end for sending operational amplifier As1 is the first transmission output end X1s, and first sends operational amplifier The output end of As1 is connect with one end of the 9th transmission resistance Rs9, and the 9th other end for sending resistance Rs9 is sent with the 4th respectively The non-inverting input terminal of operational amplifier As4 is connected with one end of the tenth transmission resistance Rs10, and the tenth sends the another of resistance Rs10 End ground connection, the 4th inverting input terminal for sending operational amplifier As4 send resistance Rs7 and the 8th with the 7th respectively and send resistance One end of Rs8 connects, and the other end of the 7th transmission resistance Rs7 is connect with the end K1-2 of the first wire jumper needle K1, the first wire jumper needle K1 The end K1-1 connect with end signal input point is sent, the end K1-3 of the first wire jumper needle K1 ground connection, the 8th transmission resistance Rs8's is another End with the 4th transmission operational amplifier As4 output end connect, the 4th transmission operational amplifier As4 output end respectively with communication Channel 3 is connected with the end K2-1 of the second wire jumper needle K2, and the end K2-2 of the second wire jumper needle K2 sends the another of resistance Rs1 with first respectively One end, third send one end of resistance Rs3, the non-inverting input terminal of the first transmission analog multiplier Ms1, the second transmission analogue multiplication The non-inverting input terminal of device Ms2 connects, and the output end that the end K2-3 of the second wire jumper needle K2 sends operational amplifier As1 with first connects It connects, the second inverting input terminal for sending operational amplifier As2 sends the other end of resistance Rs3, the 4th transmission electricity with third respectively One end connection of Rs4 is hindered, the other end of the 4th transmission resistance Rs4 is connect with the output end of the second transmission analog multiplier Ms2, the The inverting input terminal of two transmission operational amplifier As2 connect the second transmission capacitor Cs2 with output end, and second sends operational amplifier The output end of As2 is the second transmission output end X2s, and the second output end for sending operational amplifier As2 sends electricity with second respectively The non-inverting input terminal connection of the other end, the first transmission analog multiplier Ms1 of Rs2 is hindered, first sends the defeated of analog multiplier Ms1 Outlet is connect with one end of the 5th transmission resistance Rs5, and the 5th sends the other end of resistance Rs5 and third transmission operational amplifier The inverting input terminal of As3 connects, and third, which is sent, connects in parallel the between the inverting input terminal and output end of operational amplifier As3 Six send resistance Rs6 and third transmission capacitor Cs3, and the output end that third sends operational amplifier As3 is that third sends output end X3s, the output end that third sends operational amplifier As3 are connect with the inverting input terminal of the second transmission analog multiplier Ms2;It receives End decryption chaos circuit receives operation and puts including the first reception operational amplifier Ar1, the second reception operational amplifier Ar2, third Big device Ar3, the 4th receive operational amplifier Ar4, first receive analog multiplier Mr1, second receive analog multiplier Mr2, the One, which receives resistance Rr1, the second reception resistance Rr2, third, receives resistance Rr3, the 4th reception resistance Rr4, the 5th reception resistance Rr5, the 6th receive resistance Rr6, the 7th reception resistance Rr7, the 8th reception resistance Rr8, the 9th reception resistance Rr9, the tenth reception Resistance Rr10, first receive capacitor Cr1, the second reception capacitor Cr2, third and receive capacitor Cr3 and third wire jumper needle K3, and first connects The non-inverting input terminal ground connection that operational amplifier Ar1, the second reception operational amplifier Ar2, third receive operational amplifier Ar3 is received, First inverting input terminal for receiving operational amplifier Ar1 receives one end that resistance Rr1 and second receives resistance Rr2 with first respectively Connection, first, which receives connection first between the inverting input terminal and output end of operational amplifier Ar1, receives capacitor Cr1, and first connects The output end for receiving operational amplifier Ar1 is first to receive output end X1r, and first receives the output end of operational amplifier Ar1 and the Nine receive one end connection of resistance Rr9, and the 9th other end for receiving resistance Rr9 receives operational amplifier Ar4's with the 4th respectively Non-inverting input terminal is connected with one end of the tenth reception resistance Rr10, and the tenth receives the other end ground connection of resistance Rr10, and the 4th receives The inverting input terminal of operational amplifier Ar4 is connect with one end of the 7th reception resistance Rr7 and the 8th reception resistance Rr8 respectively, the The other end of eight reception resistance Rr8 is connect with the output end of the 4th reception operational amplifier Ar4, and the 4th receives operational amplifier The output end of Ar4 is connect with receiving end signal output point, the 7th receive the other end of resistance Rr7 respectively with communication channel 3 and the The end K3-1 of three wire jumper needle K3 connects, and the end K3-2 of third wire jumper needle K3 receives the other end, the third of resistance Rr1 with first respectively One end of reception resistance Rr3, the non-inverting input terminal of the first reception analog multiplier Mr1, second receive the same of analog multiplier Mr2 The connection of phase input terminal, the end K3-3 of third wire jumper needle K3 are connect with the output end of the first reception operational amplifier Ar1, and second receives The inverting input terminal of operational amplifier Ar2 receives one end of the other end of resistance Rr3, the 4th reception resistance Rr4 with third respectively Connection, the other end of the 4th reception resistance Rr4 are connect with the output end of the second reception analog multiplier Mr2, and second receives operation The inverting input terminal of amplifier Ar2 connect the second reception capacitor Cr2 with output end, and second receives the output of operational amplifier Ar2 End receives output end X2r for second, and the second output end for receiving operational amplifier Ar2 receives the another of resistance Rr2 with second respectively The non-inverting input terminal connection that one end, first receive analog multiplier Mr1, first receives the output end of analog multiplier Mr1 and the Five receive one end connection of resistance Rr5, and the 5th receives the reverse phase of the other end of resistance Rr5 and third reception operational amplifier Ar3 Input terminal connection connects in parallel the 6th between the inverting input terminal and output end of third reception operational amplifier Ar3 and receives electricity It hinders Rr6 and third receives capacitor Cr3, the output end that third receives operational amplifier Ar3 is that third receives output end X3r, third The output end for receiving operational amplifier Ar3 is connect with the inverting input terminal of the second reception analog multiplier Mr2.
When the end K2-2 of the second wire jumper needle K2 and the end K2-3 of the second wire jumper needle K2 pass through in transmitting terminal encryption chaos circuit Short circuit cap short circuit, the first transmission output end X1s sends resistance Rs3 with the first transmission resistance Rs1, third, the first transmission simulation multiplies Musical instruments used in a Buddhist or Taoist mass Ms1 non-inverting input terminal, second send analog multiplier Ms2 non-inverting input terminal and connect, the first transmission operational amplifier As1, Second sends operational amplifier As2, third sends operational amplifier As3, analog multiplier Ms1 is sent with first, second sends Analog multiplier Ms2 constitutes independent three ranks class Lorentz 3+2 type chaos circuit;When third in receiving end decryption chaos circuit 4 After the end K3-2 of wire jumper needle K3 and the end K3-3 of third wire jumper needle K3 are by short circuit cap short circuit, first receive output end Xr1 and First receives resistance Rr1, third receives resistance Rr3, first receives analog multiplier Mr1 non-inverting input terminal, the second reception simulation The connection of multiplier Mr2 non-inverting input terminal, first, which receives operational amplifier Ar1, the second reception operational amplifier Ar2, third, receives Operational amplifier Ar3 and first receives analog multiplier Mr1, the second reception analog multiplier Mr2 constitutes independent three ranks class Lip river Human relations hereby 3+2 type chaos circuit;At this point, two independent class Lorentz chaos circuits can carry out the nonsynchronous all circuits of chaos Experiment.
When the end K1-2 of the first wire jumper needle K1 and the end K1-3 of the first wire jumper needle K1 pass through in transmitting terminal encryption chaos circuit Short circuit cap short circuit, the 7th sends one end ground connection of resistance Rs7;Transmitting terminal encrypts the end K2-1 of the second wire jumper needle K2 in chaos circuit By short circuit cap short circuit, the 4th, which sends operational amplifier As4, accesses three rank class Lip river of transmitting terminal at the end K2-2 with the second wire jumper needle K2 Hereby 3+2 type circuit, entire transmitting terminal are in by zero-signal modulation condition for human relations, and be sent to communication channel 3 is by the zero of chaotic modulation Information signal;It is logical that the end K3-1 of third wire jumper needle K3 and the end K3-2 of third wire jumper needle K3 in chaos circuit 4 are decrypted in receiving end After crossing short circuit cap short circuit, the 4th, which receives operational amplifier Ar4, accesses three rank class Lorentz 3+2 type circuit of receiving end, entire to receive End is in by zero-signal modulation condition, and be sent to receiving end signal output point 5 is zero information signal of chaos demodulation;At this point, two A class Lorentz chaos circuit can carry out all Experiments of Electrical Circuits of Chaotic Synchronous.
When the end K1-1 of the first wire jumper needle K1 and the end K1-2 of the first wire jumper needle K1 pass through in transmitting terminal encryption chaos circuit The end K2-2 of short circuit cap short circuit, the end K2-1 of the second wire jumper needle K2 and the second wire jumper needle K2 pass through short circuit cap short circuit, receiving end solution In close chaos circuit 4 end K3-2 of the end K3-1 of third wire jumper needle K3 and third wire jumper needle K3 by short circuit cap it is short-circuit after, it is whole A telecommunication circuit is identical as Fig. 2, at this point it is possible to carry out all Experiments of Electrical Circuits of chaotic communication.
The component parameter of the embodiment of the present invention is as follows: first sends operational amplifier As1, the second transmission operational amplifier As2, third transmission operational amplifier As3, the 4th transmission operational amplifier As4, the first reception operational amplifier Ar1, second connect Receive operational amplifier Ar2, third receive operational amplifier Ar3, the 4th receive operational amplifier Ar4 model TL082 or TL084, first sends analog multiplier Ms1, the second transmission analog multiplier Ms2, the first reception analog multiplier Mr1, second Model AD633CN, Cs1=Cs2=Cs3=Cr1=Cr2=Cr3=0.01uF of analog multiplier Mr2 is received, Rs1 = Rs2 = Rs7 = Rs8 = Rs9 = Rs10 = Rr1 = Rr2 = Rr7 = Rr8 = Rr9 = Rr10 = 10k Ω, Rs3 = Rr3 = 2.2kΩ, Rs4 = Rr4 = 510Ω, Rs5 = Rr5 = 2kΩ, Rs6 = Rr6 = 27k Ω。

Claims (6)

1.一种类洛伦兹8+4型混沌保密通信电路,其特征在于:包括发送端信号输入点(1)、发送端加密混沌电路(2)、通信信道(3)、接收端解密混沌电路(4)和接收端信号输出点(5),所述发送端加密混沌电路(2)由发送端三阶类洛伦兹3+2型电路与发送端信号加法器构成,所述发送端信号加法器包括一个发送调制运算放大器和四个发送调制电阻,所述发送调制运算放大器的反相输入端与发送端信号输入点(1)连接,所述发送调制运算放大器的同相输入端与发送端三阶类洛伦兹3+2型电路的输出端连接,所述发送调制运算放大器的输出端与通信信道(3)连接,所述接收端解密混沌电路(4)由接收端三阶类洛伦兹3+2型电路与接收端信号加法器构成,所述接收端信号加法器包括一个接收调制运算放大器和四个接收调制电阻,所述接收调制运算放大器的反相输入端与通信信道(3)连接,所述接收调制运算放大器的同相输入端与接收端三阶类洛伦兹3+2型电路的输出端连接,所述接收调制运算放大器的输出端与接收端信号输出点(5)连接。1. A Lorentz-like 8+4 type chaotic secure communication circuit, characterized in that: it comprises a signal input point (1) at a transmitting end, an encrypted chaotic circuit at the transmitting end (2), a communication channel (3), and a deciphering chaotic circuit at the receiving end. (4) and the receiving end signal output point (5), the transmitting end encrypted chaotic circuit (2) is composed of the transmitting end third-order Lorentz-like 3+2 type circuit and the transmitting end signal adder, the transmitting end signal The adder includes a transmission modulation operational amplifier and four transmission modulation resistors, the inverting input terminal of the transmission modulation operational amplifier is connected to the transmission terminal signal input point (1), and the non-inverting input terminal of the transmission modulation operational amplifier is connected to the transmission terminal The output end of the third-order Lorentz-like 3+2 type circuit is connected, the output end of the transmitting modulation operational amplifier is connected to the communication channel (3), and the receiving end decrypts the chaotic circuit (4) by the third-order Lorentz-like circuit at the receiving end. The Lenz 3+2 type circuit is composed of a signal adder at the receiving end. The signal adder at the receiving end includes a receiving modulation operational amplifier and four receiving modulation resistors. The inverting input terminal of the receiving modulation operational amplifier is connected to the communication channel ( 3) Connection, the non-inverting input terminal of the receiving modulation operational amplifier is connected with the output terminal of the third-order Lorentz-like 3+2 type circuit of the receiving terminal, and the output terminal of the receiving modulation operational amplifier is connected to the signal output point (5) of the receiving terminal. )connect. 2.根据权利要求1所述的一种类洛伦兹8+4型混沌保密通信电路,其特征在于:所述发送端加密混沌电路包括第一发送运算放大器(As1)、第二发送运算放大器(As2)、第三发送运算放大器(As3)、第四发送运算放大器(As4)、第一发送模拟乘法器(Ms1)、第二发送模拟乘法器(Ms2)、第一发送电阻(Rs1)、第二发送电阻(Rs2)、第三发送电阻(Rs3)、第四发送电阻(Rs4)、第五发送电阻(Rs5)、第六发送电阻(Rs6)、第七发送电阻(Rs7)、第八发送电阻(Rs8)、第九发送电阻(Rs9)、第十发送电阻(Rs10)、第一发送电容(Cs1)、第二发送电容(Cs2)和第三发送电容(Cs3),所述第一发送运算放大器(As1)、第二发送运算放大器(As2)、第三发送运算放大器(As3)的同相输入端接地,所述第一发送运算放大器(As1)的反相输入端分别与第一发送电阻(Rs1)和第二发送电阻(Rs2)的一端连接,所述第一发送运算放大器(As1)的反相输入端与输出端之间连接第一发送电容(Cs1),所述第一发送运算放大器(As1)的输出端为第一发送输出端(X1s),所述第一发送运算放大器(As1)的输出端与第九发送电阻(Rs9)的一端连接,所述第九发送电阻(Rs9)的另一端分别与第四发送运算放大器(As4)的同相输入端和第十发送电阻(Rs10)的一端连接,所述第十发送电阻(Rs10)的另一端接地,所述第四发送运算放大器(As4)的反相输入端分别与第七发送电阻(Rs7)和第八发送电阻(Rs8)的一端连接,所述第七发送电阻(Rs7)的另一端与发送端信号输入点连接,所述第八发送电阻(Rs8)的另一端与第四发送运算放大器(As4)的输出端连接,所述第四发送运算放大器(As4)的输出端分别与通信信道(3)、第一发送电阻(Rs1)的另一端、第三发送电阻(Rs3)的一端、第一发送模拟乘法器(Ms1)的同相输入端、第二发送模拟乘法器(Ms2)的同相输入端连接,所述第二发送运算放大器(As2)的反相输入端分别与第三发送电阻(Rs3)的另一端、第四发送电阻(Rs4)的一端连接,所述第四发送电阻(Rs4)的另一端与第二发送模拟乘法器(Ms2)的输出端连接,所述第二发送运算放大器(As2)的反相输入端与输出端连接第二发送电容(Cs2),所述第二发送运算放大器(As2)的输出端为第二发送输出端(X2s),所述第二发送运算放大器(As2)的输出端分别与第二发送电阻(Rs2)的另一端、第一发送模拟乘法器(Ms1)的同相输入端连接,所述第一发送模拟乘法器(Ms1)的输出端与第五发送电阻(Rs5)的一端连接,所述第五发送电阻(Rs5)的另一端与第三发送运算放大器(As3)的反相输入端连接,所述第三发送运算放大器(As3)的反相输入端与输出端之间连接并联的第六发送电阻(Rs6)与第三发送电容(Cs3),所述第三发送运算放大器(As3)的输出端为第三发送输出端(X3s),所述第三发送运算放大器(As3)的输出端与第二发送模拟乘法器(Ms2)的反相输入端连接。2. A Lorentz-like 8+4 type chaotic secure communication circuit according to claim 1, wherein the encrypted chaotic circuit at the transmitting end comprises a first transmitting operational amplifier (As1), a second transmitting operational amplifier ( As2), the third transmission operational amplifier (As3), the fourth transmission operational amplifier (As4), the first transmission analog multiplier (Ms1), the second transmission analog multiplier (Ms2), the first transmission resistance (Rs1), the The second transmission resistance (Rs2), the third transmission resistance (Rs3), the fourth transmission resistance (Rs4), the fifth transmission resistance (Rs5), the sixth transmission resistance (Rs6), the seventh transmission resistance (Rs7), the eighth transmission resistance resistance (Rs8), ninth transmission resistance (Rs9), tenth transmission resistance (Rs10), first transmission capacitance (Cs1), second transmission capacitance (Cs2) and third transmission capacitance (Cs3), the first transmission capacitance (Cs1) The non-inverting input terminals of the operational amplifier (As1), the second transmission operational amplifier (As2), and the third transmission operational amplifier (As3) are grounded, and the inverting input terminals of the first transmission operational amplifier (As1) are respectively connected to the first transmission resistor (Rs1) is connected to one end of the second transmission resistor (Rs2), the first transmission capacitor (Cs1) is connected between the inverting input terminal and the output terminal of the first transmission operational amplifier (As1), and the first transmission operation The output end of the amplifier (As1) is the first sending output end (X1s), and the output end of the first sending operational amplifier (As1) is connected to one end of the ninth sending resistor (Rs9), the ninth sending resistor (Rs9 ) are respectively connected to the non-inverting input terminal of the fourth transmission operational amplifier (As4) and one end of the tenth transmission resistance (Rs10), the other end of the tenth transmission resistance (Rs10) is grounded, and the fourth transmission operation The inverting input terminal of the amplifier (As4) is respectively connected to one end of the seventh transmission resistor (Rs7) and the eighth transmission resistor (Rs8), and the other end of the seventh transmission resistor (Rs7) is connected to the signal input point of the transmission terminal, The other end of the eighth transmission resistor (Rs8) is connected to the output end of the fourth transmission operational amplifier (As4), and the output end of the fourth transmission operational amplifier (As4) is respectively connected to the communication channel (3), the first transmission The other end of the resistor (Rs1), one end of the third transmitting resistor (Rs3), the non-inverting input end of the first transmitting analog multiplier (Ms1), and the non-inverting input end of the second transmitting analog multiplier (Ms2) are connected. The inverting input terminals of the second transmission operational amplifier (As2) are respectively connected to the other end of the third transmission resistor (Rs3) and one end of the fourth transmission resistor (Rs4), and the other end of the fourth transmission resistor (Rs4) is connected to the third transmission resistor (Rs4). The output end of the two transmit analog multipliers (Ms2) is connected, the inverting input end of the second transmit operational amplifier (As2) is connected to the output end of the second transmit capacitor (Cs2), and the second transmit operational amplifier (As2) The output is the second sending output (X2s), so The output end of the second transmitting operational amplifier (As2) is respectively connected with the other end of the second transmitting resistor (Rs2) and the non-inverting input end of the first transmitting analog multiplier (Ms1), the first transmitting analog multiplier (Ms1) ) is connected to one end of the fifth transmission resistor (Rs5), the other end of the fifth transmission resistor (Rs5) is connected to the inverting input end of the third transmission operational amplifier (As3), and the third transmission operation A sixth transmission resistor (Rs6) and a third transmission capacitor (Cs3) connected in parallel are connected between the inverting input terminal and the output terminal of the amplifier (As3), and the output terminal of the third transmission operational amplifier (As3) is the third transmission The output terminal (X3s), the output terminal of the third transmitting operational amplifier (As3) is connected to the inverting input terminal of the second transmitting analog multiplier (Ms2). 3.根据权利要求1所述的一种类洛伦兹8+4型混沌保密通信电路,其特征在于:所述接收端解密混沌电路包括第一接收运算放大器(Ar1)、第二接收运算放大器(Ar2)、第三接收运算放大器(Ar3)、第四接收运算放大器(Ar4)、第一接收模拟乘法器(Mr1)、第二接收模拟乘法器(Mr2)、第一接收电阻(Rr1)、第二接收电阻(Rr2)、第三接收电阻(Rr3)、第四接收电阻(Rr4)、第五接收电阻(Rr5)、第六接收电阻(Rr6)、第七接收电阻(Rr7)、第八接收电阻(Rr8)、第九接收电阻(Rr9)、第十接收电阻(Rr10)、第一接收电容(Cr1)、第二接收电容(Cr2)和第三接收电容(Cr3),所述第一接收运算放大器(Ar1)、第二接收运算放大器(Ar2)、第三接收运算放大器(Ar3)的同相输入端接地,所述第一接收运算放大器(Ar1)的反相输入端分别与第一接收电阻(Rr1)和第二接收电阻(Rr2)的一端连接,所述第一接收运算放大器(Ar1)的反相输入端与输出端之间连接第一接收电容(Cr1),所述第一接收运算放大器(Ar1)的输出端为第一接收输出端(X1r),所述第一接收运算放大器(Ar1)的输出端与第九接收电阻(Rr9)的一端连接,所述第九接收电阻(Rr9)的另一端分别与第四接收运算放大器(Ar4)的同相输入端和第十接收电阻(Rr10)的一端连接,所述第十接收电阻(Rr10)的另一端接地,所述第四接收运算放大器(Ar4)的反相输入端分别与第七接收电阻(Rr7)和第八接收电阻(Rr8)的一端连接,所述第八接收电阻(Rr8)的另一端与第四接收运算放大器(Ar4)的输出端连接,所述第四接收运算放大器(Ar4)的输出端与接收端信号输出点连接,所述第七接收电阻(Rr7)的另一端分别与通信信道(3)、第一接收电阻(Rr1)的另一端、第三接收电阻(Rr3)的一端、第一接收模拟乘法器(Mr1)的同相输入端、第二接收模拟乘法器(Mr2)的同相输入端连接,所述第二接收运算放大器(Ar2)的反相输入端分别与第三接收电阻(Rr3)的另一端、第四接收电阻(Rr4)的一端连接,所述第四接收电阻(Rr4)的另一端与第二接收模拟乘法器(Mr2)的输出端连接,所述第二接收运算放大器(Ar2)的反相输入端与输出端连接第二接收电容(Cr2),所述第二接收运算放大器(Ar2)的输出端为第二接收输出端(X2r),所述第二接收运算放大器(Ar2)的输出端分别与第二接收电阻(Rr2)的另一端、第一接收模拟乘法器(Mr1)的同相输入端连接,所述第一接收模拟乘法器(Mr1)的输出端与第五接收电阻(Rr5)的一端连接,所述第五接收电阻(Rr5)的另一端与第三接收运算放大器(Ar3)的反相输入端连接,所述第三接收运算放大器(Ar3)的反相输入端与输出端之间连接并联的第六接收电阻(Rr6)与第三接收电容(Cr3),所述第三接收运算放大器(Ar3)的输出端为第三接收输出端(X3r),所述第三接收运算放大器(Ar3)的输出端与第二接收模拟乘法器(Mr2)的反相输入端连接。3. A Lorentz-like 8+4 type chaotic secure communication circuit according to claim 1, characterized in that: the receiving end decryption chaotic circuit comprises a first receiving operational amplifier (Ar1), a second receiving operational amplifier ( Ar2), the third receiving operational amplifier (Ar3), the fourth receiving operational amplifier (Ar4), the first receiving analog multiplier (Mr1), the second receiving analog multiplier (Mr2), the first receiving resistor (Rr1), the first receiving Two receiving resistors (Rr2), third receiving resistors (Rr3), fourth receiving resistors (Rr4), fifth receiving resistors (Rr5), sixth receiving resistors (Rr6), seventh receiving resistors (Rr7), eighth receiving resistors A resistor (Rr8), a ninth receiving resistor (Rr9), a tenth receiving resistor (Rr10), a first receiving capacitor (Cr1), a second receiving capacitor (Cr2) and a third receiving capacitor (Cr3), the first receiving The non-inverting input terminals of the operational amplifier (Ar1), the second receiving operational amplifier (Ar2), and the third receiving operational amplifier (Ar3) are grounded, and the inverting input terminals of the first receiving operational amplifier (Ar1) are respectively connected to the first receiving resistor. (Rr1) is connected to one end of the second receiving resistor (Rr2), the first receiving capacitor (Cr1) is connected between the inverting input terminal and the output terminal of the first receiving operational amplifier (Ar1), and the first receiving operation The output end of the amplifier (Ar1) is the first receiving output end (X1r), and the output end of the first receiving operational amplifier (Ar1) is connected to one end of the ninth receiving resistor (Rr9), and the ninth receiving resistor (Rr9) ) are respectively connected to the non-inverting input end of the fourth receiving operational amplifier (Ar4) and one end of the tenth receiving resistor (Rr10), the other end of the tenth receiving resistor (Rr10) is grounded, and the fourth receiving operation The inverting input terminal of the amplifier (Ar4) is respectively connected to one end of the seventh receiving resistor (Rr7) and the eighth receiving resistor (Rr8), and the other end of the eighth receiving resistor (Rr8) is connected to the fourth receiving operational amplifier (Ar4). ), the output of the fourth receiving operational amplifier (Ar4) is connected to the signal output point of the receiving end, and the other end of the seventh receiving resistor (Rr7) is connected to the communication channel (3), the first receiving The other end of the resistor (Rr1), one end of the third receiving resistor (Rr3), the non-inverting input end of the first receiving analog multiplier (Mr1), and the non-inverting input end of the second receiving analog multiplier (Mr2) are connected. The inverting input terminals of the second receiving operational amplifier (Ar2) are respectively connected to the other end of the third receiving resistor (Rr3) and one end of the fourth receiving resistor (Rr4), and the other end of the fourth receiving resistor (Rr4) is connected to the third receiving resistor (Rr4). The output terminal of the two receiving analog multiplier (Mr2) is connected, the inverting input terminal of the second receiving operational amplifier (Ar2) is connected to the output terminal of the second receiving capacitor (Cr2), and the second receiving operational amplifier (Ar2) The output is the second receiving output (X2r), so The output end of the second receiving operational amplifier (Ar2) is respectively connected with the other end of the second receiving resistor (Rr2) and the non-inverting input end of the first receiving analog multiplier (Mr1), the first receiving analog multiplier (Mr1) ) is connected to one end of the fifth receiving resistor (Rr5), the other end of the fifth receiving resistor (Rr5) is connected to the inverting input end of the third receiving operational amplifier (Ar3), and the third receiving operation A sixth receiving resistor (Rr6) and a third receiving capacitor (Cr3) in parallel are connected between the inverting input terminal and the output terminal of the amplifier (Ar3), and the output terminal of the third receiving operational amplifier (Ar3) is the third receiving An output end (X3r), the output end of the third receiving operational amplifier (Ar3) is connected to the inverting input end of the second receiving analog multiplier (Mr2). 4.根据权利要求2所述的一种类洛伦兹8+4型混沌保密通信电路,其特征在于:所述发送端加密混沌电路内设有第一跳线针(K1)和第二跳线针(K2),所述第一跳线针(K1)的K1-1端与发送端信号输入点连接,所述第一跳线针(K1)的K1-2端与第七发送电阻(Rs7)连接,所述第一跳线针(K1)的K1-3端接地,所述第二跳线针(K2)的K2-1端与第四发送运算放大器(As4)的输出端连接,所述第二跳线针(K2)的K2-2端分别与第一发送电阻(Rs1)的另一端、第三发送电阻(Rs3)的一端、第一发送模拟乘法器(Ms1)的同相输入端、第二发送模拟乘法器(Ms2)的同相输入端连接,所述第二跳线针(K2)的K2-3端与第一发送运算放大器(As1)的输出端连接。4. A Lorentz-like 8+4 type chaotic secure communication circuit according to claim 2, characterized in that: a first jumper pin (K1) and a second jumper are arranged in the encrypted chaotic circuit at the transmitting end pin (K2), the K1-1 end of the first jumper pin (K1) is connected to the signal input point of the sending end, and the K1-2 end of the first jumper pin (K1) is connected to the seventh sending resistor (Rs7 ) connection, the K1-3 end of the first jumper pin (K1) is grounded, and the K2-1 end of the second jumper pin (K2) is connected to the output end of the fourth sending operational amplifier (As4), so The K2-2 end of the second jumper pin (K2) is respectively connected with the other end of the first sending resistor (Rs1), one end of the third sending resistor (Rs3), and the non-inverting input end of the first sending analog multiplier (Ms1). . The non-inverting input end of the second sending analog multiplier (Ms2) is connected, and the K2-3 end of the second jumper pin (K2) is connected with the output end of the first sending operational amplifier (As1). 5.根据权利要求3所述的一种类洛伦兹8+4型混沌保密通信电路,其特征在于:所述接收端解密混沌电路内设有第三跳线针(K3),所述第三跳线针(K3)的K3-1端与通信信道(3)连接,所述第三跳线针(K3)的K3-2端分别与第一接收电阻(Rr1)的另一端、第三接收电阻(Rr3)的一端、第一接收模拟乘法器(Mr1)的同相输入端、第二接收模拟乘法器(Mr2)的同相输入端连接,所述第三跳线针(K3)的K3-3端与第一接收运算放大器(Ar1)的输出端连接。5. A Lorentz-like 8+4 type chaotic secure communication circuit according to claim 3, characterized in that: said receiving end decryption chaotic circuit is provided with a third jumper pin (K3), said third The K3-1 end of the jumper pin (K3) is connected to the communication channel (3), and the K3-2 end of the third jumper pin (K3) is respectively connected with the other end of the first receiving resistor (Rr1), the third receiving One end of the resistor (Rr3), the non-inverting input end of the first receiving analog multiplier (Mr1), and the non-inverting input end of the second receiving analog multiplier (Mr2) are connected, and K3-3 of the third jumper pin (K3) The terminal is connected to the output terminal of the first receiving operational amplifier (Ar1). 6.根据权利要求1所述的一种类洛伦兹8+4型混沌保密通信电路,其特征在于:所述通信信道(3)为导线。6 . The Lorentz-like 8+4 type chaotic secure communication circuit according to claim 1 , wherein the communication channel ( 3 ) is a wire. 7 .
CN201811290908.5A 2018-10-31 2018-10-31 One type Lorentz 8+4 type chaotic secret communication circuit Pending CN109167659A (en)

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Application publication date: 20190108