CN109362013B - Combined sensor - Google Patents

Abstract

The invention discloses a combined sensor. The combined sensor includes: a substrate having an upper surface and a lower surface; a first MEMS chip and a first ASIC chip. The first MEMS chip and the first ASIC chip are mounted to the upper surface of the substrate. A MEMS chip is electrically connected to the first ASIC chip, and the first MEMS chip is a capacitive structure; and a second MEMS chip and a second ASIC chip are mounted on the upper surface of the substrate, and the second MEMS chip is mounted on the upper surface of the substrate. The chip is electrically connected to the second ASIC chip, and the working voltage of the second MEMS chip is AC voltage; the shortest distance between the first MEMS chip and the second ASIC chip is d1, d1≥0.3mm, and the distance between the first MEMS chip and the second ASIC chip is The shortest distance is d2, d2≥1.2mm. The technical solution of the present invention weakens the parasitic capacitance effect, thereby reducing electromagnetic induction, so that when the combined sensor is working, the background noise of the first MEMS chip is greatly reduced, and the overall performance of the combined sensor is improved.

Description

Combination sensor

Technical field

The present invention relates to the field of sensor technology, and in particular to a combination sensor.

Background technique

Two MEMS chips and two ASIC chips are packaged to form a combined sensor. Specifically, the first MEMS chip is electrically connected to the first ASIC chip, the second MEMS chip is electrically connected to the second ASIC chip, the first MEMS chip is a capacitive structure, and the second MEMS chip is electrically connected to the second ASIC chip. The working voltage of the second MEMS chip is AC voltage. Since the packaging space is relatively compact, when the combined sensor is working, due to the parasitic capacitance effect, the background noise of the first MEMS chip is larger, thus affecting the overall performance of the combined sensor.

Contents of the invention

The main purpose of the present invention is to propose a combined sensor, aiming to improve the performance of the combined sensor.

In order to achieve the above objects, the present invention discloses a combined sensor, which includes:

a substrate having an upper surface and a lower surface;

a first MEMS chip and a first ASIC chip, the first MEMS chip and the first ASIC chip are mounted to the upper surface of the substrate, the first MEMS chip and the first ASIC chip are electrically connected, the The first MEMS chip is a capacitive structure; and

a second MEMS chip and a second ASIC chip, the second MEMS chip and the second ASIC chip are mounted to the upper surface of the substrate, the second MEMS chip and the second ASIC chip are electrically connected, the The working voltage of the second MEMS chip is AC voltage;

The shortest distance between the first MEMS chip and the second ASIC chip is d1, d1≥0.3mm, and the shortest distance between the first ASIC chip and the second ASIC chip is d2, d2≥1.2mm.

In an embodiment of the present invention, the shortest distance d1 is formed between the side of the first MEMS chip and the side of the second ASIC chip;

The shortest distance d2 is formed between the side surface of the first ASIC chip and the side surface of the second ASIC chip.

In an embodiment of the present invention, the first MEMS chip is in the shape of a rectangular parallelepiped, the first ASIC chip is in the shape of a rectangular parallelepiped, and the second ASIC chip is in the shape of a rectangular parallelepiped;

The shortest distance d1 is formed between the side edge of the first MEMS chip and the side edge of the second ASIC chip;

The shortest distance d2 is formed between the side edge of the first ASIC chip and the side edge of the second ASIC chip.

In an embodiment of the present invention, the shortest distance connection between the first MEMS chip and the second MEMS chip is a, and the shortest distance connection between the first ASIC chip and the second ASIC chip For b, a intersects b.

In an embodiment of the present invention, the first MEMS chip and the second MEMS chip are arranged side by side.

In an embodiment of the present invention, the substrate is rectangular, and the first ASIC chip and the second ASIC chip are distributed in diagonal directions of the substrate.

In an embodiment of the present invention, the volume of the first MEMS chip is smaller than the volume of the second MEMS chip or the second ASIC chip;

And/or, the operating voltage of the first MEMS chip is a DC voltage;

And/or, the substrate is a circuit board.

In an embodiment of the present invention, the first MEMS chip is a microphone chip.

In an embodiment of the present invention, the substrate is provided with a sound hole, and the microphone chip covers the sound hole.

In one embodiment of the present invention, the combined sensor further includes a cover, which is disposed on the upper surface of the substrate and defines a packaging cavity with the substrate;

The first MEMS chip, the first ASIC chip, the second MEMS chip and the second ASIC chip are provided in the packaging cavity.

The technical solution of the present invention is to provide a first MEMS chip and a first ASIC chip corresponding to the first MEMS chip, a second MEMS chip and a second ASIC chip corresponding to the second MEMS chip on a substrate, and combine the first MEMS chip and the second ASIC chip corresponding to the second MEMS chip. The shortest distance between the second ASIC chip and the second ASIC chip is set to be greater than or equal to 0.3mm, and the shortest distance between the first ASIC chip and the second ASIC chip is set to be greater than or equal to 1.2mm. This weakens the parasitic capacitance effect, thereby reducing the electromagnetic induction, making the combined sensor When working, the noise floor of the first MEMS chip is significantly reduced, improving the overall performance of the combined sensor.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on the structures shown in these drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram of a combined sensor in an embodiment of the present invention;

Figure 2 is a schematic structural diagram of a combined sensor in an embodiment of the present invention;

Figure 3 is a schematic structural diagram of a combined sensor in an embodiment of the present invention.

Explanation of reference numbers:

label name label name 100 substrate 320 The first ASIC chip 110 upper surface 410 Second MEMS chip 310 The first MEMS chip 420 Second ASIC chip

The realization of the purpose, functional features and advantages of the present invention will be further described with reference to the embodiments and the accompanying drawings.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present invention.

It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiment of the present invention are only used to explain the relationship between components in a specific posture (as shown in the drawings). Relative positional relationship, movement conditions, etc., if the specific posture changes, the directional indication will also change accordingly.

In the present invention, unless otherwise clearly stated and limited, the terms "connection", "fixing", etc. should be understood in a broad sense. For example, "fixing" can be a fixed connection, a detachable connection, or an integral body; It can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be an internal connection between two elements or an interactive relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

In addition, descriptions such as "first", "second", etc. in the present invention are for descriptive purposes only and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of indicated technical features. Therefore, features defined as "first" and "second" may explicitly or implicitly include at least one of these features. In addition, the technical solutions in various embodiments can be combined with each other, but it must be based on the realization by those of ordinary skill in the art. When the combination of technical solutions is contradictory or cannot be realized, it should be considered that such a combination of technical solutions does not exist. , nor within the protection scope required by the present invention.

In the present invention, two MEMS chips and two ASIC chips are packaged to form a combined sensor. Specifically, the first MEMS chip 310 and the first ASIC chip 320 are electrically connected, the second MEMS chip 410 and the second ASIC chip 420 are electrically connected. One MEMS chip 310 has a capacitive structure, and the working voltage of the second MEMS chip 410 is AC voltage. Due to the compact packaging structure, when the combined sensor is working, the background noise of the first MEMS chip 310 is relatively large, thus affecting the combined sensor. overall performance.

In order to solve the above technical problems, the present invention proposes a combined sensor.

In an embodiment of the present invention, as shown in Figure 1, the combined sensor includes:

Substrate 100, said substrate 100 having an upper surface 110 and a lower surface;

The first MEMS chip 310 and the first ASIC chip 320 are mounted to the upper surface 110 of the substrate 100. The first MEMS chip 310 and the first ASIC chip 320 are mounted on the upper surface 110 of the substrate 100. The ASIC chip 320 is electrically connected, and the first MEMS chip 310 is a capacitive structure; and

The second MEMS chip 410 and the second ASIC chip 420 are mounted to the upper surface 110 of the substrate 100 . The second MEMS chip 410 and the second The ASIC chip 420 is electrically connected, and the working voltage of the second MEMS chip 410 is an AC voltage;

The shortest distance between the first MEMS chip 310 and the second ASIC chip 420 is d1, d1≥0.3mm, and the shortest distance between the first ASIC chip 320 and the second ASIC chip 420 is d2, d2≥1.2 mm.

In this embodiment, the substrate 100 of the combined sensor is in a rectangular shape, and a circuit board well known to those skilled in the art can be used as the substrate 100 .

MEMS (Micro-Electro-Mechanical System) chip is an independent intelligent system. Its internal structure is generally on the micron or even nanometer scale. It has small size, light weight, low power consumption, good durability, and stable performance. Characteristics, with the development of smaller, lighter and lighter electronic devices, MEMS chips are more and more widely used in these devices. ASIC (Application Specific Integrated Circuit) chips are used to process electrical signals, such as amplification. For those skilled in the art, the MEMS chip and the ASIC chip can be mounted on the substrate 100 in a well-known manner.

In this embodiment, a first MEMS chip 310 and a first ASIC chip 320 are provided, and the first MEMS chip 310 and the first ASIC chip 320 are electrically connected. The first MEMS chip 310 is provided with an interface, and the first ASIC chip 320 is provided with an interface. The interface of the first MEMS chip 310 is bonded to the interface of the first ASIC chip 320 through metal wires to achieve electrical connection. For example, the metal wire is made of gold, and the first MEMS chip 310 and the first ASIC chip 320 are treated with adhesive so that the first MEMS chip 310 and the first ASIC chip 320 have good bonding properties. High-purity gold is used. The metal wire of the material bonds the interface of the first MEMS chip 310 and the interface of the first ASIC chip 320, thereby realizing the electrical connection between the first MEMS chip 310 and the first ASIC chip 320. The same is true for the electrical connection between the second MEMS chip 410 and the second ASIC chip 420 .

The first MEMS chip 310 has a capacitive structure, and the operating voltage of the second MEMS chip 410 is an AC voltage. Therefore, the operating signal of the second ASIC chip 420 electrically connected to the second MEMS chip 410 is an AC signal. Due to the packaging The relatively compact structure will cause the first MEMS chip 310 to have a larger background noise. In order to ensure that the first MEMS chip 310 has good background noise performance, for example, when the first MEMS chip 310 is a microphone chip, it needs to ensure that it has a lower background noise. In this embodiment, the distance between d1 and d2 is limited to weaken the noise. The parasitic capacitance effect between the first MEMS chip 310 and the second ASIC chip 420, and between the first ASIC chip 320 and the second ASIC chip 420, thereby reducing the electromagnetic induction, so that when the combined sensor is working, the first MEMS chip The noise floor of the 310 is significantly reduced, thereby improving the overall performance of the combined sensor.

In an embodiment of the present invention, the shortest distance d1 is formed between the side surface of the first MEMS chip 310 and the side surface of the second ASIC chip 420;

The shortest distance d2 is formed between the side surfaces of the first ASIC chip 320 and the second ASIC chip 420 .

In this embodiment, the shortest distance d1 is formed between the side of the first MEMS chip 310 and the side of the second ASIC chip 420. For example, the side of the first MEMS chip 310 has a connection point, and the side of the second ASIC chip 420 There is a connection point on the side of , and the connection distance between the connection point of the first MEMS chip 310 and the second ASIC chip 420 is the shortest distance between the first MEMS chip 310 and the second ASIC chip, and the same is true for the shortest distance d2. The first MEMS chip 310 , the first ASIC chip 320 and the second ASIC chip 420 have a three-dimensional structure. This ensures that d1 and d2 achieve maximum values on the substrate 100 with a limited area, thereby reducing the background noise of the first MEMS chip 310 .

In an embodiment of the present invention, the first MEMS chip 310 is in the shape of a rectangular parallelepiped, the first ASIC chip 320 is in the shape of a rectangular parallelepiped, and the second ASIC chip 420 is in the shape of a rectangular parallelepiped;

The shortest distance d1 is formed between the side edge of the first MEMS chip 310 and the side edge of the second ASIC chip 420;

The shortest distance d2 is formed between the side edge of the first ASIC chip 320 and the side edge of the second ASIC chip 420 .

A cube is a special rectangular parallelepiped. In this embodiment, the shortest distance d1 is formed between the side edges of the first MEMS chip 310 and the side edges of the second ASIC chip 420 , for example, the side edges of the first MEMS chip 310 The edge has a connection point, and the side edge of the second ASIC chip 420 has a connection point. The connection distance between the connection point of the first MEMS chip 310 and the connection point of the second ASIC chip 420 is the distance between the first MEMS chip 310 and the second ASIC chip. The same is true for the shortest distance of the chip, the shortest distance d2. In this way, under the premise of limited packaging space and reducing the background noise of the first MEMS chip 310, the arrangement of each chip is more regular.

In an embodiment of the present invention, as shown in Figure 2, the shortest distance connection between the first MEMS chip 310 and the second MEMS chip 410 is a, and the first ASIC chip 320 and the third The shortest distance connection between the two ASIC chips 420 is b, and a and b intersect. In this embodiment, a plane rectangular coordinate system XOY is defined. The second MEMS chip 410 and the second ASIC chip 420 are arranged in sequence along the Y direction. Arranged in opposite directions, when a and b intersect, the limited packaging space can be maximized.

Further, the first MEMS chip 310 and the second MEMS chip 410 are arranged side by side. The side-by-side arrangement means a straight-line arrangement. For example, as shown in Figure 1, the second MEMS chip 410 and the first MEMS chip 310 are arranged in sequence along the X direction. They are arranged side by side. In this way, the miniaturization of the product can be ensured to the greatest extent. Under the premise, ensure that d1 and d2 are large enough to reduce the background noise of the first MEMS chip 310

In an embodiment of the present invention, as shown in Figures 1 and 2, the substrate 100 is rectangular, and the first ASIC chip 320 and the second ASIC chip 420 are distributed in the diagonal direction of the substrate 100 . Rectangles include squares and rectangles, as shown in Figures 1 and 2. In this embodiment, the substrate 100 is in a long direction, and the first ASIC chip 320 and the first MEMS chip 310 are arranged on the right side of the substrate 100. The first ASIC chip 320 Located in the lower right corner of the substrate 100, the second ASIC chip 420 and the second MEMS chip 410 are arranged on the left side of the substrate 100, and the second ASIC chip 420 is located in the upper left corner of the substrate 100. This can effectively increase the power consumption while ensuring the distance d1. Large d2 distance.

In an embodiment of the present invention, as shown in FIG. 3 , the volume of the first MEMS chip 310 is smaller than the volume of the second MEMS chip 410 or the second ASIC chip 420 . In this embodiment, by reducing the size of the first MEMS chip 310 and thereby increasing the value of d1, under the same packaging area, the parasitic capacitance effect can be further reduced and the background noise of the first MEMS chip 310 can be reduced. .

In an embodiment of the present invention, the working voltage of the first MEMS chip 310 is a DC voltage.

In an embodiment of the present invention, the first MEMS chip 310 is a microphone chip. In this embodiment, the first MEMS chip 310 is a microphone chip, which can convert sound signals into electrical signals to achieve sound capture.

Further, the substrate 100 is provided with a sound hole (not shown in the figure), and the microphone chip (first MEMS chip 310) covers the sound hole.

In this embodiment, the microphone chip (first MEMS chip 310) covers the sound hole, and external sound can be transmitted to the microphone chip (first MEMS chip 310) through the sound hole, thereby facilitating the microphone chip (first MEMS chip 310) to obtain the sound. Signal.

In an embodiment of the present invention, the substrate 100 is a circuit board. Circuits are formed on the circuit board, and the circuit board can be manufactured according to methods well known to those skilled in the art.

In one embodiment of the present invention, the combined sensor further includes a cover (not shown in the figure), which is disposed on the upper surface 110 of the substrate 100 and defines a packaging cavity with the substrate 100;

The first MEMS chip 310, the first ASIC chip 320, the second MEMS chip 410 and the second ASIC chip 420 are disposed in the packaging cavity.

In this embodiment, the cover is disposed on the upper surface 110 of the substrate 100, and the two jointly define a packaging cavity. Specifically, the cover includes a cover plate and a coaming plate formed at the edge of the cover plate. The cover plate and the coaming plate can be integrally formed. The coaming plate surrounds the cover plate to form an open cavity, and the cover shell is attached to the base plate through the coaming plate. 100, thereby forming a closed packaging cavity. The cover and the substrate 100 can be mounted using patch tape or soldered to form a package structure. The packaging structure is used to package each chip, and each chip is installed on the upper surface of the substrate 100 corresponding to the packaging cavity to avoid interference from external signals.

Furthermore, the material of the cover is metal, that is, the cover forms an electromagnetic shielding cover to meet the packaging requirements of each chip and protect each chip from interference by external electromagnetic signals.

The above are only preferred embodiments of the present invention, and do not limit the patent scope of the present invention. Under the inventive concept of the present invention, equivalent structural transformations can be made using the contents of the description and drawings of the present invention, or direct/indirect applications. Other related technical fields are included in the patent protection scope of the present invention.

Claims (9)

1. A combination sensor, characterized in that the combination sensor includes: a substrate having an upper surface and a lower surface; a first MEMS chip and a first ASIC chip, the first MEMS chip and the first ASIC chip are mounted to the upper surface of the substrate, the first MEMS chip and the first ASIC chip are electrically connected, the The first MEMS chip is a capacitive structure; and a second MEMS chip and a second ASIC chip, the second MEMS chip and the second ASIC chip are mounted to the upper surface of the substrate, the second MEMS chip and the second ASIC chip are electrically connected, the The working voltage of the second MEMS chip is AC voltage; The shortest distance between the first MEMS chip and the second ASIC chip is d1, d1≥0.3mm, and the shortest distance between the first ASIC chip and the second ASIC chip is d2, d2≥1.2mm; The shortest distance connection between the first MEMS chip and the second MEMS chip is a, the shortest distance connection between the first ASIC chip and the second ASIC chip is b, and a intersects with b; The first MEMS chip and the first ASIC chip are both provided with interfaces, and the interface on the first MEMS chip is bonded to the interface on the first ASIC chip through metal wires; The second MEMS chip and the second ASIC chip are both provided with interfaces, and the interface on the second MEMS chip is bonded to the interface on the second ASIC chip through metal wires. 2. The combined sensor according to claim 1, wherein the shortest distance d1 is formed between the side of the first MEMS chip and the side of the second ASIC chip; The shortest distance d2 is formed between the side surface of the first ASIC chip and the side surface of the second ASIC chip. 3. The combined sensor according to claim 1, wherein the first MEMS chip is in the shape of a cuboid, the first ASIC chip is in the shape of a cuboid, and the second ASIC chip is in the shape of a cuboid; The shortest distance d1 is formed between the side edge of the first MEMS chip and the side edge of the second ASIC chip; The shortest distance d2 is formed between the side edge of the first ASIC chip and the side edge of the second ASIC chip. 4. The combined sensor according to any one of claims 1 to 3, wherein the first MEMS chip and the second MEMS chip are arranged side by side. 5. The combined sensor according to claim 1, wherein the substrate is in a rectangular shape, and the first ASIC chip and the second ASIC chip are distributed in diagonal directions of the substrate. 6. The combined sensor according to claim 1, wherein the volume of the first MEMS chip is smaller than the volume of the second MEMS chip or the second ASIC chip; And/or, the operating voltage of the first MEMS chip is a DC voltage; And/or, the substrate is a circuit board. 7. The combined sensor of claim 1, wherein the first MEMS chip is a microphone chip. 8. The combined sensor according to claim 7, wherein the substrate is provided with a sound hole, and the microphone chip covers the sound hole. 9. The combined sensor according to claim 1, wherein the combined sensor further includes a cover, the cover is disposed on the upper surface of the substrate and defines a packaging cavity with the substrate; The first MEMS chip, the first ASIC chip, the second MEMS chip and the second ASIC chip are provided in the packaging cavity.