CN109560102A - MRAM and its production method - Google Patents

MRAM and its production method Download PDF

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Publication number
CN109560102A
CN109560102A CN201710884968.9A CN201710884968A CN109560102A CN 109560102 A CN109560102 A CN 109560102A CN 201710884968 A CN201710884968 A CN 201710884968A CN 109560102 A CN109560102 A CN 109560102A
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layer
mentioned
substrate
top electrode
storage structure
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左正笏
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CETHIK Group Ltd
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CETHIK Group Ltd
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Priority to PCT/CN2017/116137 priority patent/WO2019061852A1/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N59/00Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)

Abstract

本申请提供了一种MRAM与其制作方法。该制作方法包括:步骤S1,在基底上设置预存储结构,预存储结构至少包括MTJ单元;步骤S2,在预存储结构的裸露表面上设置保护层材料,或者在预存储结构的裸露表面上以及基底的裸露表面上设置保护层材料;步骤S3,采用各向异性刻蚀法自对准刻蚀去除部分保护层材料,形成位于预存储结构的至少部分侧壁上的保护层。采用自对准刻蚀技术刻蚀保护层,该方法无需设置掩膜层,方法简单,容易控制,且只留下预存储结构侧壁上的保护层材料,避免了MTJ单元两侧的基底表面上或者是部分预存储结构的表面上的保护层材料带来的电容效应和应力效应,保证了器件具有较好的性能。

The present application provides an MRAM and a manufacturing method thereof. The manufacturing method includes: step S1, arranging a pre-storage structure on a substrate, and the pre-storage structure at least includes MTJ units; step S2, arranging a protective layer material on the exposed surface of the pre-storage structure, or on the exposed surface of the pre-storage structure and A protective layer material is provided on the exposed surface of the substrate; in step S3, part of the protective layer material is removed by self-aligned etching using anisotropic etching to form a protective layer on at least part of the sidewall of the pre-storage structure. Self-aligned etching technology is used to etch the protective layer. This method does not need to set a mask layer. The method is simple and easy to control, and only the protective layer material on the sidewall of the pre-storage structure is left, avoiding the substrate surface on both sides of the MTJ unit. The capacitance effect and stress effect brought by the protective layer material on the surface of the pre-storage structure or part of the pre-storage structure ensure that the device has better performance.

Description

MRAM and its production method
Technical field
This application involves memory areas, in particular to a kind of MRAM and its production method.
Background technique
Magnetic RAM (Magnetic Random Access Memory, abbreviation MRAM) due to high density, The advantages that service life is long and non-volatile, it is considered to be following most widely used " general " processor.Its core work unit The magnetic tunnel-junction (MTJ) being made of " magnetic reference layer/separation layer/magnetic free layer " sandwich structure.
Main functional units in MRAM are MTJ cell, and structure mainly includes free magnetic layer/non magnetic oxide layer (MgO)/pinned magnetic layer.Under the driving such as externally-applied magnetic field or electric current, the magnetic moment direction of free magnetic layer is flipped, with magnetism Parallel state or anti-parallel state is presented in the magnetic moment direction of pinning layer, so that low high-resistance state occurs in MRAM, can be respectively defined as storing State " 0 " and " 1 ", to realize the storage of information.
In the prior art after etching forms MTJ cell, one layer of insulation can be deposited on the exposed surface of MTJ cell 1' Protective layer 2', as shown in Figure 1, needing to go that a part of protective layer 2' above MTJ cell 1' in subsequent manufacturing process It removes, forms structure as shown in Figure 2, to facilitate MTJ cell 1' to be connected with top electrode, or when protective layer is arranged in MTJ cell And when on the exposed surface of structure that is formed of top electrode above it, facilitate being electrically connected for top electrode and other structures.But The dielectric constant of this partial protection layer is bigger, can reduce the processing speed of device;Also, it is remaining in addition on MTJ sidewall Part except protective layer certain stress problem can be brought to device, to reduce the reliability of device.
Summary of the invention
The main purpose of the application is to provide a kind of MRAM and its production method, to solve around MTJ in the prior art The excessive capacity effect of protective layer and protective layer bring stress problem.
To achieve the goals above, according to the one aspect of the application, the production method of MRAM a kind of is provided, the production Method includes: step S1, and setting prestores storage structure in substrate, and the above-mentioned storage structure that prestores is including at least MTJ cell;Step S2, Protective layer material is set on the above-mentioned exposed surface for prestoring storage structure, or on the above-mentioned exposed surface for prestoring storage structure with And protective layer material is set on the exposed surface of above-mentioned substrate;Step S3 is removed using anisotropic etching method Self-aligned etching The above-mentioned protective layer material in part forms and is located on the above-mentioned at least partly side wall for prestoring storage structure.
Further, above-mentioned steps S1 includes: step S11, and setting bottom electrode layer and MTJ are sequentially stacked in above-mentioned substrate Structure sheaf;Step S12, the etching removal above-mentioned mtj structure layer in part, remaining above-mentioned mtj structure layer form above-mentioned MTJ cell, It obtains including that the above-mentioned of above-mentioned MTJ cell prestores storage structure.
Further, implement the etching in above-mentioned steps S12 using anisotropic etching method.
Further, after above-mentioned mtj structure layer is set, above-mentioned steps S11 further include: in above-mentioned mtj structure layer First top electrode layer is set, and before etching above-mentioned mtj structure layer, above-mentioned steps on the surface far from above-mentioned bottom electrode layer S12 further include: etching removal above-mentioned first top electrode layer in part, remaining above-mentioned first top electrode layer form the first top electrode, The above-mentioned storage structure that prestores further includes above-mentioned first top electrode.
Further, in above-mentioned steps S12, retaining above-mentioned bottom electrode layer, the above-mentioned storage structure that prestores includes bottom electrode layer, and In above-mentioned steps S3, above-mentioned protective layer is located on the side wall of above-mentioned MTJ cell and above-mentioned first top electrode.
Further, after above-mentioned steps S3, above-mentioned production method further include: in above-mentioned substrate or above-mentioned bottom is electric Pole layer exposed surface on be arranged+1 dielectric layer of X, and+1 dielectric layer of above-mentioned X far from above-mentioned substrate surface with it is upper The surface far from above-mentioned substrate for stating the first top electrode constitutes the first plane;The second top electrode is set in above-mentioned first plane Layer;It is sequentially etched above-mentioned second top electrode layer in removal part, part+1 dielectric layer of above-mentioned X and the above-mentioned hearth electrode in part Layer, remaining above-mentioned second top electrode layer form the second top electrode, and remaining above-mentioned bottom electrode layer forms hearth electrode, above-mentioned bottom electricity Pole, above-mentioned MTJ cell, above-mentioned first top electrode and above-mentioned second top electrode are sequentially stacked setting.
Further, before above-mentioned steps S1, above-mentioned production method further include: X dielectric layer is set on substrate; X metal interconnection is set on above-mentioned substrate, above-mentioned X dielectric layer is located at the two sides of above-mentioned X metal interconnection, And the surface and above-mentioned surface of the X metal interconnection far from above-mentioned substrate far from above-mentioned substrate of above-mentioned X dielectric layer Constitute the second plane;Etching barrier layer is set in above-mentioned second plane;It removes upper on above-mentioned X metal interconnection surface Etching barrier layer is stated, above-mentioned substrate is formed.
Further, above-mentioned hearth electrode be arranged in above-mentioned X metal interconnection far from above-mentioned substrate surface on And on the surface far from above-mentioned substrate of the above-mentioned etching barrier layer in part of above-mentioned X metal interconnection two sides.
Further, after forming above-mentioned second top electrode, above-mentioned production method further include: in+1 dielectric of above-mentioned X + 2 dielectric layers of X are set on the exposed surface of layer and on the exposed surface of at least partly above-mentioned second top electrode;At least + 1 metal interconnection of X, and above-mentioned X+2 are set on the surface far from above-mentioned substrate of above-mentioned second top electrode of partial denudation A dielectric layer is located at the two sides of+1 metal interconnection of above-mentioned X, and surface of+2 dielectric layers of above-mentioned X far from above-mentioned substrate Surface with above-mentioned X+1 metal interconnection far from above-mentioned substrate is in the same plane.
According to the another aspect of the application, a kind of MRAM is provided, which includes: substrate;Storage structure is prestored, setting exists In above-mentioned substrate, the above-mentioned storage structure that prestores is including at least a MTJ cell;Protective layer is arranged in and above-mentioned prestores storage structure extremely On small part side wall.
Using the technical solution of the application, using Self-aligned etching technology etch-protecting layer material, no setting is required for this method Mask layer, method is simple, is easy to control, also, by the substrate surface that MTJ cell two sides are arranged in or portion in this method Divide the protective layer material removal on the surface for prestoring storage structure, the protective layer material left behind in pre-stored structure side wall forms guarantor Sheath, the protection materials avoided on the surface for either partially prestoring storage structure on the substrate surface of MTJ cell two sides are brought Capacity effect and stress effect, thus ensure that device have preferable performance.
Detailed description of the invention
The accompanying drawings constituting a part of this application is used to provide further understanding of the present application, and the application's shows Meaning property embodiment and its explanation are not constituted an undue limitation on the present application for explaining the application.In the accompanying drawings:
Fig. 1 shows the structural schematic diagram in the prior art on the surface of MTJ cell after setting protective layer;
Fig. 2 shows the structural schematic diagrams after removing the partial protection layer in Fig. 1;And
The structural representation of the production method process for the MRAM that a kind of embodiment that Fig. 3 to Figure 12 shows the application provides Figure.
Wherein, the above drawings include the following reference numerals:
1', MTJ cell;2', protective layer;1, substrate;11, X dielectric layer;12, X metal interconnection;13, it etches Barrier layer;2, storage structure is prestored;21, hearth electrode;22, MTJ cell;23, the first top electrode;24, the second top electrode;3, it protects Layer;4 ,+1 dielectric layer of X;5 ,+2 dielectric layers of X;6 ,+1 metal interconnection of X;30, protective layer material;210, bottom electricity Pole layer;220, mtj structure layer;230, the first top electrode layer;240, the second top electrode layer.
Specific embodiment
It is noted that following detailed description is all illustrative, it is intended to provide further instruction to the application.Unless another It indicates, all technical and scientific terms used herein has usual with the application person of an ordinary skill in the technical field The identical meanings of understanding.
It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singular Also it is intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " packet Include " when, indicate existing characteristics, step, operation, device, component and/or their combination.
It should be understood that when element (such as layer, film, region or substrate) is described as at another element "upper", this yuan Part can be directly on another element, or intermediary element also may be present.Moreover, in specification and following claims In, when description has element " connected " to another element, which " can be directly connected to " to another element, or pass through third Element " electrical connection " is to another element.
As background technique is introduced, in the prior art, the more difficult control of the removal for the protective layer being arranged on the surface of MTJ System, in order to solve technical problem as above, present applicant proposes a kind of MRAM and its production method.
In a kind of typical embodiment of the application, the production method of MRAM a kind of is provided, which includes: Step S1, setting prestores storage structure 2 on the base 1, and the above-mentioned storage structure 2 that prestores is formed including at least MTJ cell 22 such as Fig. 5 institute The structure shown;Protective layer material 30 is arranged in step S2 on the above-mentioned exposed surface for prestoring storage structure 2, is formed as shown in FIG. 6 Structure, or protective layer material is set on the above-mentioned exposed surface for prestoring storage structure 2 and on the exposed surface of above-mentioned substrate 1 30;Step S3 removes the above-mentioned protective layer material 30 in part, remaining above-mentioned protection using anisotropic etching method Self-aligned etching Layer material 30 is located on the above-mentioned at least partly side wall for prestoring storage structure 2, forms protective layer 3 shown in Fig. 7.
In the above-mentioned production method of the application, using Self-aligned etching technology etch-protecting layer material, this method is without setting Set mask layer, method is simple, be easy to control, also, in this method by the substrate surface that MTJ cell two sides are set either Part prestores the removal of the protective layer material on the surface of storage structure, and the protective layer material left behind in pre-stored structure side wall is formed Protective layer avoids the protection materials band on the surface for either partially prestoring storage structure on the substrate surface of MTJ cell two sides The capacity effect and stress effect come, to ensure that device has preferable performance.
After formation prestores storage structure 2, the deposition of protective layer material 30 is carried out, under vacuum conditions to prevent MTJ cell The exposure of the structures such as 22 is contaminated damage in air.
The material of the protective layer of the application can for silicon nitride, silica and N doping one of silica or A variety of combinations.
In a kind of specific embodiment, the material of protective layer is silicon nitride, can be by chemical vapor deposition or atomic layer Protective layer material is arranged in deposition technique.
In a kind of embodiment of the application, above-mentioned steps S1 includes: step S11, is sequentially stacked setting in above-mentioned substrate 1 Bottom electrode layer 210 and mtj structure layer 220, form structure shown in Fig. 4;Step S12, the etching removal above-mentioned mtj structure layer in part 220, remaining above-mentioned mtj structure layer 220 forms above-mentioned MTJ cell 22, that is, being formed as shown in Figure 5 includes above-mentioned MTJ cell 22 above-mentioned prestores storage structure 2.
In order to further ensure the storage structure 2 that prestores of formation is scheduled shape, and then it is good to guarantee that the MRAM has Performance in a kind of embodiment of the application, implements the etching in above-mentioned steps S12 using anisotropic etching method.
The anisotropic etching method of the application can be dry etching and be also possible to wet etching, and dry etching is come It says, there are commonly reactive ion beam etching (RIBE) and ion beam etching etc., those skilled in the art can select to close according to the actual situation Suitable anisotropic etching method.Etching in above-mentioned steps S12 can be performed etching using hard mask layer masking, before etching, It is initially formed corresponding hard mask layer.
In another embodiment of the application, after above-mentioned mtj structure layer 220 is set, above-mentioned steps S11 further include: As shown in figure 4, first top electrode layer 230 is set on the surface far from above-mentioned bottom electrode layer 210 of above-mentioned mtj structure layer 220, And before etching above-mentioned mtj structure layer 220, above-mentioned steps S12 further include: etching removal above-mentioned first top electrode layer in part 230, as shown in figure 5, remaining above-mentioned first top electrode layer 230 forms the first top electrode 23, the above-mentioned storage structure 2 that prestores further includes Above-mentioned first top electrode 23.In this way before protective layer material 30 is set, it is already provided with top electrode in MTJ cell 22, is made Protective layer material 30 can also protect top electrode and place top electrode metal be diffused into other structures, further ensure The performance of device.
Certainly, the first top electrode layer 230 can also be not provided in the step S11 of the application, only be arranged bottom electrode layer 210 with Mtj structure layer 220, i.e. the two form and prestore storage structure 2, later, directly on the exposed surface for prestoring storage structure 2 or also Protective layer material 30 is set on the exposed surface of substrate 1, and then Self-aligned etching removes partial protection layer material 30 again, is formed and is protected Then top electrode is arranged in sheath 3 on the exposed surface MTJ, and there are two types of specific process engineering is general, one is prestoring Dielectric layer is set on the exposed surface of storage structure 2 and the exposed surface of protective layer 3 or on the exposed surface of also substrate 1, and And planarize, and the surface of the separate substrate 1 of MTJ is exposed, top electrode layer then is set on surface again after planarization, Top electrode is then formed by etching technics;Another kind is the exposed surface in the exposed surface and protective layer 3 that prestore storage structure 2 Dielectric layer is set on upper or exposed surface there are also substrate 1, and is planarized, and the surface of the separate substrate 1 of MTJ is coating So that the lower end in the hole is connect with MTJ then, top electrode layer is arranged simultaneously in the hole in lid, then, aperture in the dielectric layer Planarization forms top electrode.
The material of bottom electrode layer 210 can be metal or alloy, and those skilled in the art can select according to the actual situation It selects suitable metal etc. and forms bottom electrode layer 210.In a kind of embodiment, the material of bottom electrode layer 210 is tantalum.
Mtj structure layer 220 includes a variety of materials component.In a kind of embodiment comprising be sequentially stacked the pinning of setting Layer, tunnel layer and free layer.But it is not limited to above-mentioned three-decker, can also be other structures, for example including artificial anti- The structure of ferromagnetic layer etc..
In a kind of specific embodiment, pinning layer can be PtMn layers, and tunnel layer is MgO layer, and free layer is CoFeB layer. It is certainly not limited to above-mentioned material layer, can also be the counter structure layer that other materials is formed.
In the another embodiment of the application, in above-mentioned steps S12, retain above-mentioned bottom electrode layer 210, i.e., not to hearth electrode Layer 210 performs etching, and the bottom electrode layer 210 is used as the etching barrier layer 13 in step S12, as shown in figure 5, above-mentioned be pre-stored Structure 2 includes bottom electrode layer 210, and exposed surface, above-mentioned MTJ cell 22 in above-mentioned steps S2, in above-mentioned bottom electrode layer 210 Exposed surface and above-mentioned first top electrode 23 exposed surface on above-mentioned protective layer material 30, and above-mentioned steps S3 are set In, the above-mentioned protective layer 3 of formation is located on the side wall of above-mentioned MTJ cell 22 and above-mentioned first top electrode 23.
Certainly, in above-mentioned steps S12, above-mentioned bottom electrode layer 210 can also be performed etching, and then being formed includes successively The hearth electrode 21 of stacked setting, MTJ cell 22 and top electrode prestore storage structure 2, in subsequent technique, are prestoring storage structure 2 and substrate 1 exposed surface on protective layer 3 is set, also, when Self-aligned etching, removal is protection on 1 surface of substrate The protective layer material 30 on the surface of the separate substrate 1 of layer 3 and MTJ cell 22, the remaining setting of protective layer material 30 is in bottom electricity On the side wall of pole 21, MTJ cell 22 and top electrode, protective layer 3 is formed.
In order to further ensure the MRAM of formation has good electrical property, in a kind of embodiment of the application, it is above-mentioned After above-mentioned steps S3, above-mentioned production method further include: in the above-mentioned substrate 1 of the two sides of above-mentioned protective layer 3 or above-mentioned bottom + 1 dielectric layer of X 4 is set on the exposed surface of electrode layer 210, as shown in figure 8, and the two sides of above-mentioned protective layer 3 above-mentioned the The surface far from above-mentioned substrate 1 on the surface and above-mentioned first top electrode 23 far from above-mentioned substrate 1 of X+1 dielectric layer 4 is constituted First plane, the step are actually that first facility corresponds to dielectric material and then planarizes again, it is contemplated that the technique of planarization can make It obtains first electrode and loses certain thickness, so, in order to form good electrical contact, guarantee that device has good electrical property, In the embodiment further include: the second top electrode layer 240 is set in above-mentioned first plane, forms structure shown in Fig. 9;Successively carve Etching off removes above-mentioned second top electrode layer 240 in part, the above-mentioned bottom electrode layer 210 of part+1 dielectric layer of above-mentioned X 4 and part, Remaining above-mentioned second top electrode layer 240 forms the second top electrode 24, as shown in Figure 10, remaining above-mentioned 210 shape of bottom electrode layer At hearth electrode 21, above-mentioned hearth electrode 21, above-mentioned MTJ cell 22, above-mentioned first top electrode 23 and above-mentioned second top electrode 24 according to Secondary stacked setting.
The material of the top electrode of the application is metal or alloy, can specifically include tantalum, tantalum nitride, titanium and/or nitridation Titanium etc., those skilled in the art can select suitable material to form top electrode according to the actual situation.If needed in manufacture craft The first top electrode 23 and the second top electrode 24 are formed, then the material of the two can be independently selected from above-mentioned material.
Certainly, if top electrode is arranged after the etching of protective layer 3, which generally only needs that one layer of top electrode layer is arranged Top electrode is formed, the top electrodes to form two contacts are not needed, without two top electrode layers of setting.
It is electrically connected in order to facilitate MTJ with other structures, to be further ensured that the MRAM to be formed has good electric property, In a kind of embodiment of the application, before above-mentioned steps S1, above-mentioned production method further include: in substrate (not shown) X dielectric layer 11 is set;X metal interconnection is set on above-mentioned substrate, and above-mentioned X dielectric layer 11 is positioned at above-mentioned The two sides of X metal interconnection, and the surface of the separate above-mentioned substrate of above-mentioned X dielectric layer 11 and above-mentioned X metal Interconnection constitutes the second plane far from the surface of above-mentioned substrate;Etching barrier layer 13 is set in above-mentioned second plane;In removal The above-mentioned etching barrier layer 13 on X metal interconnection surface is stated, above-mentioned substrate 1 shown in Fig. 3 is formed.
The material of above-mentioned etching barrier layer 13 can be inorganic material, the oxygen including silicon nitride, silica N doping The combination of one or more of the silicon carbide of SiClx and N doping.In certain embodiments, it is also possible to organic material.
In a kind of specific embodiment of the application, the material of etching barrier layer 13 is the silicon carbide of N doping, using change Vapour deposition process preparation is learned, the chemical formula of institute's deposition materials is SiaCbNcHd(wherein, a, b, c and d indicate the original in molecule The number of son, specific data are determined according to chemical feasibility).Pattern is carried out on etching barrier layer 13 using photoetching process Change, then carries out barrier etch technique and form channel, expose bottom metal material.
There are many tools for the process of the X dielectric layer 11 of above-mentioned X metal interconnection and its two sides in formation Fig. 3 The embodiment of body, illustrates in such a way that two kinds specific, a kind of mode below are as follows: X is arranged on a surface of the substrate and is situated between Electric layer 11, then, aperture or slot in the X dielectric layer 11 are formed in Fig. 3 finally, filling metal in hole and planarizing Part-structure, also, in this embodiment, X dielectric layer 11 is also located at the lower section of X metal interconnection, this kind Embodiment is more conventional, and commonly referred to as Damascus technics;Another way are as follows: substrate surface be arranged metal and Etching forms X metal interconnection shown in Fig. 3, then, on substrate and the exposed surface of the X metal interconnection Dielectric material is set, and is planarized, the X dielectric layer 11 in Fig. 3 is formed.
It either prestores including still not including the first top electrode layer 230 in storage structure 2, in the application in preferred the application It is preferred that the surface for prestoring the separate substrate 1 of storage structure 2 is more than or equal to the separate base of etching barrier layer 13 at a distance from substrate 1 At a distance from substrate 1, that is, prestore storage structure 2 is higher than etching barrier layer 13 apart from maximum surface with substrate 1 on the surface at bottom 1 With substrate 1 apart from maximum surface, it can both can simplify subsequent manufacture craft in this way, subsequent manufacturing processes can also be reduced Difficulty, can also be further ensured that prepared device is with good performance.
The X metal interconnection that those skilled in the art can select according to the actual situation suitable method to be formed in Fig. 3 Portion 12 and X dielectric layer 11.
In another embodiment of the application, as shown in Figure 10, above-mentioned bottom electrode layer 210 is arranged in above-mentioned X metal Interconnection far from above-mentioned substrate surface on and above-mentioned 12 two sides of X metal interconnection the above-mentioned etching barrier layer in part On 13 surface far from above-mentioned substrate.It can further prevent the metal of X metal interconnection from diffusing upward into this way In other structures layer, and then it ensure that the MRAM to be formed is with good performance.
In order to which the electrode above MTJ to be electrically connected with other metal layers, in a kind of embodiment of the application, in formation After stating the second top electrode 24, above-mentioned production method further include: on the exposed surface of+1 dielectric layer of above-mentioned X 4 and at least + 2 dielectric layers of X 5 are set on the exposed surface of above-mentioned second top electrode 24 in part, form structure shown in Figure 11;At least + 1 metal interconnection 6 of X is set on the surface far from above-mentioned substrate 1 of above-mentioned second top electrode 24 of partial denudation, forms figure Structure shown in 12, and+2 dielectric layers of above-mentioned X 5 are located at the two sides of+1 metal interconnection 6 of above-mentioned X, and above-mentioned X+2 The surface far from above-mentioned substrate 1 of+1 metal interconnection 6 in surface of a dielectric layer 5 far from above-mentioned substrate 1 and above-mentioned X is same In one plane.
The forming process of+2 dielectric layers of X 5 of above-mentioned+1 metal interconnection 6 of formation X and its two sides can be with Referring to above-mentioned formation X metal interconnection and the forming process of+1 dielectric layer of X 4 of its two sides, herein just no longer It repeats.
The above-mentioned substrate of the application includes all necessary structures of preceding road technique and device, for example including CMOS, X-1 Dielectric layer and X-1 metal interconnection etc..
X dielectric layer 11 in the application ,+2 dielectric layers of+1 dielectric layer of X 4 and X 5 material can be only On the spot it is selected from silica, low-dielectric constant dielectric medium or ultralow dielectric dielectric.Those skilled in the art can root According to X dielectric layer of actual conditions selection suitable material and the formation of suitable method ,+1 dielectric layer of X 4 and X+2 Dielectric layer 5.
In the typical embodiment of the another kind of the application, a kind of MRAM is provided, it, should as shown in Figure 10 and Figure 12 MRAM includes substrate 1, prestores storage structure 2 and protective layer 3, prestores storage structure 2 and is arranged in above-mentioned substrate 1, above-mentioned pre-stored Structure 2 includes at least a MTJ cell 22;Protective layer 3 is arranged on the above-mentioned at least partly side wall for prestoring storage structure 2.
In the MRAM, either partially prestores on the substrate surface of MTJ cell two sides and be not provided on the surface of storage structure Protection materials, protective layer are positioned only in pre-stored structure side wall, avoid on the substrate surface of MTJ cell two sides either portion Point prestore the protective layer material bring capacity effect and stress effect on the surface of storage structure, thus ensure that device have compared with Good performance.
It as shown in figure 12, in the substrate 1 in above-mentioned the application further include that X is situated between in another embodiment of the application Electric layer 11 and X metal interconnection 12, specific positional relationship is referred to Figure 12 and Fig. 3 etc., but be not restricted to that should Kind positional relationship.
In the another embodiment of the application, the above-mentioned storage structure 2 that prestores includes bottom electrode layer 210, MTJ cell 22 and the One top electrode 23, as shown in figure 12, certainly, however it is not limited to which this kind prestores storage structure 2, and the above-mentioned storage structure 2 that prestores can also include Hearth electrode 21, MTJ cell 22 and the first top electrode 23, perhaps including hearth electrode 21 and MTJ cell 22 again or including bottom electricity Pole layer 210 and MTJ cell 22.Those skilled in the art can prestore storage structure 2 according to the actual situation and be set as suitable film layer Structure.
It is spread out upwards to further avoid the metal in X metal interconnection, is further ensured that MRAM has There is a good performance, in a kind of embodiment of the application, as shown in figure 12, above-mentioned hearth electrode 21 is arranged in above-mentioned X metal Interconnection far from above-mentioned substrate surface on and above-mentioned 12 two sides of X metal interconnection the above-mentioned etching barrier layer in part On 13 surface far from above-mentioned substrate.
In the another embodiment of the application, above-mentioned MRAM includes the top electrodes of two connections, i.e. the first top electrode 23 with Second top electrode 24, positional relationship is as shown in Fig. 2, can better ensure that the electric property of the MRAM by two top electrodes.
In order to further ensure MRAM is with good performance, in a kind of embodiment of the application, above-mentioned MRAM further includes + 1 dielectric layer of X 4, Figure 12 etc. is seen in specific position.
In another embodiment of the application, above-mentioned MRAM further includes that+1 metal of+2 dielectric layers of X 5 and X interconnects Portion 6, specific positional relationship are referred to Figure 12 and Fig. 3 etc., but be not restricted to that this kind of positional relationship.It in this way can be into one The top electrode of MTJ is electrically connected by step with other structures.
It can be seen from the above description that the application the above embodiments realize following technical effect:
1), in the production method of the MRAM of the application, using Self-aligned etching technology etch-protecting layer material, this method without Mask layer need to be set, method is simple, be easy to control, also, in this method by the substrate surface that MTJ cell two sides are arranged in or Person is that the protective layer material that part prestores on the surface of storage structure removes, and leaves behind the protective layer material in pre-stored structure side wall Protective layer is formed, the protected material on the surface for either partially prestoring storage structure on the substrate surface of MTJ cell two sides is avoided Bring capacity effect and stress effect are expected, to ensure that device has preferable performance.
2) it, in the MRAM of the application, is either partially prestored on the surface of storage structure on the substrate surface of MTJ cell two sides Protection materials are not provided with, protective layer is positioned only in pre-stored structure side wall, on the substrate surface for avoiding MTJ cell two sides The protective layer material bring capacity effect and stress effect on the surface of storage structure are either partially prestored, to ensure that device Part has preferable performance.
The foregoing is merely preferred embodiment of the present application, are not intended to limit this application, for the skill of this field For art personnel, various changes and changes are possible in this application.Within the spirit and principles of this application, made any to repair Change, equivalent replacement, improvement etc., should be included within the scope of protection of this application.

Claims (10)

1.一种MRAM的制作方法,其特征在于,所述制作方法包括:1. a preparation method of MRAM, is characterized in that, described preparation method comprises: 步骤S1,在基底上设置预存储结构,所述预存储结构至少包括MTJ单元;Step S1, a pre-storage structure is set on the substrate, and the pre-storage structure at least includes an MTJ unit; 步骤S2,在所述预存储结构的裸露表面上设置保护层材料,或者在所述预存储结构的裸露表面上以及所述基底的裸露表面上设置保护层材料;以及Step S2, disposing a protective layer material on the exposed surface of the pre-storage structure, or disposing a protective layer material on the exposed surface of the pre-storage structure and the exposed surface of the substrate; and 步骤S3,采用各向异性刻蚀法自对准刻蚀去除部分所述保护层材料,形成位于所述预存储结构的至少部分侧壁上的保护层。Step S3, using anisotropic etching method to self-align and remove part of the protective layer material to form a protective layer on at least part of the sidewall of the pre-storage structure. 2.根据权利要求1所述的制作方法,其特征在于,所述步骤S1包括:2. The manufacturing method according to claim 1, wherein the step S1 comprises: 步骤S11,在所述基底上依次叠置设置底电极层与MTJ结构层;以及Step S11, sequentially stacking a bottom electrode layer and an MTJ structure layer on the substrate; and 步骤S12,刻蚀去除部分所述MTJ结构层,剩余的所述MTJ结构层形成所述MTJ单元,得到包括所述MTJ单元的所述预存储结构。In step S12, a part of the MTJ structure layer is removed by etching, and the remaining MTJ structure layer forms the MTJ unit to obtain the pre-storage structure including the MTJ unit. 3.根据权利要求2所述的制作方法,其特征在于,采用各向异性刻蚀法实施所述步骤S12中的刻蚀。3 . The manufacturing method according to claim 2 , wherein the etching in the step S12 is performed by an anisotropic etching method. 4 . 4.根据权利要求2所述的制作方法,其特征在于,4. preparation method according to claim 2, is characterized in that, 在设置所述MTJ结构层之后,所述步骤S11还包括:After setting the MTJ structure layer, the step S11 further includes: 在所述MTJ结构层的远离所述底电极层的表面上设置第一顶电极层,A first top electrode layer is provided on the surface of the MTJ structure layer away from the bottom electrode layer, 且在刻蚀所述MTJ结构层之前,所述步骤S12还包括:And before etching the MTJ structure layer, the step S12 further includes: 刻蚀去除部分所述第一顶电极层,剩余的所述第一顶电极层形成第一顶电极,所述预存储结构还包括所述第一顶电极。Part of the first top electrode layer is removed by etching, the remaining first top electrode layer forms a first top electrode, and the pre-storage structure further includes the first top electrode. 5.根据权利要求4所述的制作方法,其特征在于,所述步骤S12中,保留所述底电极层,所述预存储结构包括底电极层,且所述步骤S3中,所述保护层位于所述MTJ单元以及所述第一顶电极的侧壁上。5 . The manufacturing method according to claim 4 , wherein in the step S12 , the bottom electrode layer is reserved, the pre-storage structure includes a bottom electrode layer, and in the step S3 , the protective layer on the sidewalls of the MTJ unit and the first top electrode. 6.根据权利要求4所述的制作方法,其特征在于,在所述步骤S3之后,所述制作方法还包括:6. The manufacturing method according to claim 4, wherein after the step S3, the manufacturing method further comprises: 在所述基底上或者所述底电极层的裸露表面上设置第X+1个介电层,且所述第X+1个介电层的远离所述基底的表面与所述第一顶电极的远离所述基底的表面构成第一平面;An X+1 th dielectric layer is disposed on the substrate or on the exposed surface of the bottom electrode layer, and the surface of the X+1 th dielectric layer away from the substrate and the first top electrode The surface away from the substrate constitutes a first plane; 在所述第一平面上设置第二顶电极层;以及disposing a second top electrode layer on the first plane; and 依次刻蚀去除部分所述第二顶电极层、部分所述第X+1个介电层以及部分所述底电极层,剩余的所述第二顶电极层形成第二顶电极,剩余的所述底电极层形成底电极,所述底电极、所述MTJ单元、所述第一顶电极以及所述第二顶电极依次叠置设置。Part of the second top electrode layer, part of the X+1 th dielectric layer and part of the bottom electrode layer are sequentially removed by etching, the remaining second top electrode layer forms a second top electrode, and the remaining The bottom electrode layer forms a bottom electrode, and the bottom electrode, the MTJ unit, the first top electrode and the second top electrode are stacked in sequence. 7.根据权利要求6所述的制作方法,其特征在于,在所述步骤S1之前,所述制作方法还包括:7. The manufacturing method according to claim 6, wherein before the step S1, the manufacturing method further comprises: 在衬底上设置第X个介电层;disposing the Xth dielectric layer on the substrate; 在所述衬底上设置第X个金属互连部,所述第X个介电层位于所述第X个金属互连部的两侧,且所述第X个介电层的远离所述衬底的表面与所述第X个金属互连部远离所述衬底的表面构成第二平面;Disposing an Xth metal interconnection on the substrate, the Xth dielectric layer is located on both sides of the Xth metal interconnection, and the Xth dielectric layer is far from the the surface of the substrate and the surface of the Xth metal interconnection part away from the substrate form a second plane; 在所述第二平面上设置刻蚀阻挡层;以及disposing an etch stop layer on the second plane; and 去除所述第X个金属互连部表面上的所述刻蚀阻挡层,形成所述基底。The etch stop layer on the surface of the Xth metal interconnection is removed to form the substrate. 8.根据权利要求7所述的制作方法,其特征在于,所述底电极设置在所述第X个金属互连部的远离所述衬底的表面上以及所述第X个金属互连部两侧的部分所述刻蚀阻挡层的远离所述衬底的表面上。8 . The manufacturing method according to claim 7 , wherein the bottom electrode is disposed on a surface of the Xth metal interconnection portion away from the substrate and the Xth metal interconnection portion. 9 . Parts of the etch stop layer on both sides are on the surface away from the substrate. 9.根据权利要求6所述的制作方法,其特征在于,在形成所述第二顶电极后,所述制作方法还包括:9. The manufacturing method according to claim 6, wherein after forming the second top electrode, the manufacturing method further comprises: 在所述第X+1个介电层的裸露表面上以及至少部分所述第二顶电极的裸露表面上设置第X+2个介电层;以及disposing an X+2 th dielectric layer on the exposed surface of the X+1 th dielectric layer and on at least a portion of the exposed surface of the second top electrode; and 在至少部分裸露所述第二顶电极的远离所述基底的表面上设置第X+1个金属互连部,且所述第X+2个介电层位于所述第X+1个金属互连部的两侧,且所述第X+2个介电层远离所述基底的表面与所述第X+1个金属互连部的远离所述基底的表面在同一个平面上。An X+1 th metal interconnection is disposed on a surface of the second top electrode that is at least partially exposed and away from the substrate, and the X+2 th dielectric layer is located on the X+1 th metal interconnect on both sides of the connecting portion, and the surface of the X+2th dielectric layer away from the substrate and the surface of the X+1th metal interconnection portion away from the substrate are on the same plane. 10.一种MRAM,其特征在于,所述MRAM包括:10. An MRAM, wherein the MRAM comprises: 基底(1);base(1); 预存储结构(2),设置在所述基底(1)上,所述预存储结构(2)至少包括一个MTJ单元(22);以及a pre-storage structure (2) arranged on the substrate (1), the pre-storage structure (2) comprising at least one MTJ unit (22); and 保护层(3),设置在所述预存储结构(2)的至少部分侧壁上。A protective layer (3) is provided on at least part of the sidewall of the pre-storage structure (2).
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