CN109683085A - A kind of electronic cell self-examination method - Google Patents
A kind of electronic cell self-examination method Download PDFInfo
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- CN109683085A CN109683085A CN201910044394.3A CN201910044394A CN109683085A CN 109683085 A CN109683085 A CN 109683085A CN 201910044394 A CN201910044394 A CN 201910044394A CN 109683085 A CN109683085 A CN 109683085A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31702—Testing digital circuits including elements other than semiconductor transistors, e.g. biochips, nanofabrics, mems, chips with magnetic elements
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Abstract
The invention provides an electronic cell self-checking method, which is applied to the technical field of circuit detection and comprises the following steps: determining a first code of the electronic cell address generating module based on the residue code; determining a second code of the electronic cell input and output module based on the Berger code and the residual code; and inputting the first code and the second code to the first TRC cascade circuit to obtain fault indication information of the electronic cell. The electronic cell self-checking method provided by the invention can detect single faults and unidirectional multi-bit faults and realize the coding self-checking of the embryo electronic cells.
Description
Technical field
The invention belongs to circuit detection technique fields, are to be related to a kind of electronic cell self checking method more specifically.
Background technique
With the progress of technology, electronic system integrity problem is received more and more attention.Embryonic circuit is one
Kind imitates the digital integrated electronic circuit of multicellular organism growth and development mechanism, the identical circuit module unit of the electricity routing infrastructure
(i.e. embryo's electronic cell) is interconnected to constitute embryonic arrays, and when one or more cells break down, circuit is to embryo's electricity
Daughter cell is detected, and then is controlled redundancy cell replacement failure cell and completed corresponding function, realizes failure selfreparing.Due to embryo
The self-organizing of tire circuit, self diagnosis and selfreparing excellent performance, in unmanned plane, space equipment, deep diving equipment and military machine
The fields such as people have a good application prospect.
Cell self-test is the basis of selfreparing.Currently, the detection method of embryo's electronic cell mainly has iuntercellular detection
With intracellular two kinds of detection.Iuntercellular detects based on duplication redundancy detection method, and such methods fault coverage is higher, but hard
Part resource consumption is big, and placement-and-routing is complex, and embryonic circuit array structure there are certain requirements.The intracellular main packet of detection
The duplication redundancy included for cell function module detects, for the fault detection of cell memory module, for iuntercellular line
Redundancy detection and the detection of iuntercellular duplication redundancy.These detection methods are locally detected only for cell, and detectability is by thin
Born of the same parents' structure influences, and fault coverage is limited, and detection unit can not effective self-test.
Summary of the invention
The purpose of the present invention is to provide a kind of electronic cell self checking methods, single to solve detection existing in the prior art
Member can not effective self-test the technical issues of.
In view of the above technical problems, the embodiment of the invention provides a kind of electronic cell self checking methods, which comprises
The first coding of electronic cell address generating module is determined based on residue code；
The second coding of electronic cell input/output module is determined based on Berger code and residue code；
It inputs first coding and the second coding to the first TRC cascade circuit obtains the indicating fault letter of electronic cell
Breath.
Optionally, first coding that electronic cell address generating module is determined based on residue code includes:
The first check information of electronic cell address generating module is generated based on residue code；
Address output information to the residue code checker for inputting the address generating module obtains the first check bit；
It inputs first check information and the first check bit to the 2nd TRC cascade circuit and obtains the first coding.
Optionally, address output information to the residue code checker of the input address generating module obtains the first school
Testing position includes:
The address output information of the address generating module is inputted to residue code checker；
The residue code that the residue code checker calculates the address output information obtains the first check bit.
Optionally, described to determine that the second coding of electronic cell input/output module wraps based on Berger code and residue code
It includes:
The second check information of electronic cell input/output module is generated based on Berger code and residue code；
Input information to the coding circuit for inputting the input/output terminal obtains the second check bit；
It inputs second check information and the second check bit to the 3rd TRC cascade circuit and obtains the second coding.
Optionally, the input information of the input/output terminal includes switching input information and function inputs information, described defeated
Input information to the coding circuit for entering the input/output terminal obtains the second check bit and includes:
It inputs switching input information to first coding circuit and obtains the first exports coding；
It inputs function input information to second coding circuit and obtains the second exports coding；
The second check bit is determined according to first exports coding and the second exports coding.
Optionally, first coding circuit includes the first equivalent circuit and switching input coding circuit；The input institute
Switching input information to the first coding circuit is stated to obtain the first exports coding and include:
It inputs the switching and inputs information to first equivalent circuit；
First equivalent circuit calculates and exports the Berger code of the switching input information；
The switching input coding circuit receives the Berger code of the switching output information, and calculates the switching output
The residue code of the Berger code of information obtains the first exports coding.
Optionally, second coding circuit includes function input coding circuit and the second equivalent circuit, the input institute
Function input information to the second coding circuit is stated to obtain the second exports coding and include:
It inputs the function and inputs information to function input coding circuit；
The function input coding circuit receives the function input information and exports the odd even of the function input information
Check bit；
Second equivalent circuit receives the parity check bit and to be calculated second according to the parity check bit defeated
It encodes out.
Optionally, second equivalent circuit receives the parity check bit and is calculated according to the parity check bit
Second exports coding includes:
Function signal is determined according to the parity check bit and function check position；
The second exports coding is obtained according to the Berger code that the function signal and catenation sequence calculate the function signal.
Optionally, the determination method of the function check position are as follows:
If the parity check bit is equal to preset function and matches tps gene, function check gene is equal to 0；
If the parity check bit matches tps gene not equal to preset function, function check gene is equal to 1.
Optionally, the Berger code for calculating the function signal according to the function signal and catenation sequence obtains
Two exports codings include:
The residue code for calculating catenation sequence obtains function residue check gene；
The second exports coding is obtained according to the function residue check gene and the function signal.
The beneficial effect of electronic cell self checking method provided by the invention is: electronic cell provided by the invention is from procuratorial organ
Method establishes embryo based on residue code and Berger code relationship in basic logic and arithmetical operation between operand and number of results
Mathematical model between electronic cell input/output signal.Single failure is detected by residue code, Berger code detects multidigit list
To failure, the input of embryo's electronic cell is handled to obtain check information.By the way that detection circuit is arranged, realize to embryo's electricity
The output of daughter cell is handled to obtain check bit, is compared the two and is obtained detection coding, thus according to detection coding completion to embryo
The coding self-test of tire electronic cell.
Detailed description of the invention
It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to embodiment or description of the prior art
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only of the invention some
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the structural schematic diagram for the electronic cell self-checking circuit that one embodiment of the invention provides；
Fig. 2 is the flow diagram for the electronic cell self checking method that one embodiment of the invention provides；
Fig. 3 be another embodiment of the present invention provides electronic cell self-checking circuit structural schematic diagram；
Fig. 4 another embodiment of the present invention provides electronic cell self checking method flow diagram；
Fig. 5 is the flow diagram for the electronic cell self checking method that yet another embodiment of the invention provides；
Fig. 6 is the structural schematic diagram for the electronic cell self-checking circuit that yet another embodiment of the invention provides；
Fig. 7 is the flow diagram for the electronic cell self checking method that further embodiment of this invention provides；
Fig. 8 is the flow diagram for the electronic cell self checking method that further embodiment of this invention provides；
Fig. 9 is the flow diagram for the electronic cell self checking method that further embodiment of this invention provides；
Figure 10 is the flow diagram for the electronic cell self checking method that further embodiment of this invention provides；
Figure 11 is the flow diagram for the electronic cell self checking method that further embodiment of this invention provides；
Figure 12 is the flow diagram for the electronic cell self checking method that further embodiment of this invention provides；
Figure 13 is the structural schematic diagram that the function that one embodiment of the invention provides inputs coding circuit.
Specific embodiment
In order to which technical problems, technical solutions and advantages to be solved are more clearly understood, tie below
Accompanying drawings and embodiments are closed, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only
To explain the present invention, it is not intended to limit the present invention.
Referring to FIG. 1, Fig. 1 is the structural schematic diagram for the electronic cell self-checking circuit that one embodiment of the invention provides.The electricity
Road mainly includes address generating module code detection circuits 10, input/output module code detection circuits 20 and TRC cascade electricity
Road 30.
10 primary recipient of address generating module code detection circuits, two class inputs information: the gene memory module of electronic cell
The information of the address generating module output end output of the first check information and electronic cell of storage.Wherein, address generates mould
10 output end of block coding detection circuit is connected to the input terminal of TRC cascade circuit.
20 primary recipient of input/output module code detection circuits, two class inputs information: the second verification of higher level's module input
The information of the input/output module output end of information and electronic cell output.Wherein, input/output module code detection circuits
20 output ends are connected to the input terminal of TRC cascade circuit.
Please also refer to Fig. 1 and Fig. 2, Fig. 2 is that the process for the electronic cell self checking method that one embodiment of the invention provides is shown
It is intended to.This method comprises:
S101: the first coding of electronic cell address generating module is determined based on residue code.
In the present embodiment, address generating module code detection circuits 10 can be according to the defeated of electronic cell address generating module
Information obtains the first check bit of address generating module out, further according to the first school of the first check bit sum gene memory module storage
It tests information and determines the first coding.
S102: the second coding of electronic cell input/output module is determined based on Berger code and residue code.
In the present embodiment, input/output module code detection circuits 20 can be raw according to the output information of input/output module
At the second check bit, the second coding is determined further according to the second check information of the second check bit sum higher level's module input.
S103: the first coding of input and the second coding to the first TRC cascade circuit obtain the indicating fault letter of electronic cell
Breath.
In the present embodiment, TRC cascade circuit 30 is the first TRC cascade circuit, mainly for detection of the ratio of coding
Compared with the comparison that that is, first coding is encoded with second, TRC cascade circuit has the function of totally self-checking, and there is no logics to shield, and only leans on certainly
Body input can self-test, when the failure indication information of output is " 00 " or " 11 ", illustrate system there are failure, indicating fault letter
When breath is " 01 " or " 10 ", system worked well.
As can be seen from the above description, electronic cell self checking method provided in an embodiment of the present invention is based on basic logic and arithmetic is transported
Residue code and Berger code relationship in calculation between operand and number of results, establish embryo's electronic cell input/output signal it
Between mathematical model.Single failure is detected by residue code, Berger code detects multidigit unidirectional fault, to embryo's electronic cell
Input is handled to obtain check information.By the way that detection circuit is arranged, realization handle to the output of embryo's electronic cell
To check bit, compare the two and obtain detection coding, thus the coding self-test according to detection coding completion to embryo's electronic cell.
A kind of specific embodiment party please also refer to Fig. 3 and Fig. 4, as electronic cell detection method provided by the invention
Formula, on the basis of the above embodiments, step S101 can be described in detail are as follows:
S201: the first check information of electronic cell address generating module is generated based on residue code.
In the present embodiment, it is known that residue code obtains check bit by carrying out modulo operation to information bit, then the first verification
Information is to carry out modulo operation by the input information to electronic cell address generating module to obtain, and pass through gene memory module
It is stored.
S202: the address output information of input address generation module to residue code checker obtains the first check bit.
In the present embodiment, the output information of electronic cell address generating module can be input to residue code checker 101,
Residue code checker 101 carries out the output information the first check bit is calculated.
S203: the first check information of input and the first check bit to the 2nd TRC cascade circuit obtain the first coding.
In the present embodiment, the first check information is input to TRC cascade circuit 102, residue code school by gene memory module
Device is tested by the first check bit being calculated also input value TRC cascade circuit 102, then TRC cascade circuit 102 believes the first verification
Breath and the first check bit are compared the first coding of output.Wherein, TRC cascade circuit 102 is the 2nd TRC cascade circuit.
Referring to FIG. 5, Fig. 5 is the flow diagram for the electronic cell detection method that yet another embodiment of the invention provides,
On the basis of above-described embodiment, step S202 can be described in detail are as follows:
S301: the address output information of input address generation module to residue code checker.
S302: the residue code that residue code checker calculates address output information obtains the first check bit.
In the present embodiment, address generating module includes row address and column address two parts, it is practical by two into 1 adder
Composition.When there is single failure in embryo's electronic cell, the output end of address generating module is not in multiple failures, i.e., only
Have a bit address information output error, thus can the output directly to address generating module carry out residue code code detection.
It is known that the addition rule of residue code are as follows: the mould of the sum of several codes is equal to the mould of the sum of mould of each code,
I.e.
A in formula (1)iFor code word, m is mould.
The multiplication rule of residue code are as follows: the mould of the product of several codes is equal to the mould of the product of the mould of each code, i.e.,
A in formula (2)iFor code word, m is mould.
When the mould of residue code self checking method is odd number, may be implemented to detect single error in code.For the ease of inspection
The design of slowdown monitoring circuit, can be used least cost residue code detection method, i.e. mould m is 2d- 1, it, will after generating the first check information
First check information is stored in gene memory module by way of radix-minus-one complement, passes through TRC circuit with the first check bit when self-test
It is compared.
The present embodiment detects the residue code of address generating module output by taking (0,14) cell in 16 × 16 arrays as an example
It is illustrated.Assuming that cell output coordinate is (1,15), mould 3, then d=2, the binary form of output coordinate are
00011111, the binary form of output coordinate is divided into one group and be added for every d from low to high, insufficient position adds 0 polishing, so
Modulus afterwards.When there are carry, carry is eliminated and adds 1, i.e. 00+01+11+11=01+11+11=01+11=in lowest order
01.That is, the first check bit is 01, at this time by 01 compared with the check information stored in gene memory module, if gene
The check information of memory module storage is 10, then illustrates that address generating module is without failure.When carrying out actual circuit design,
Residue code checker can cascade to obtain by multiple full adders.
A kind of specific reality please also refer to Fig. 6 and Fig. 7, as electronic cell detection method provided in an embodiment of the present invention
Mode is applied, on the basis of the above embodiments, step S102 can be described in detail are as follows:
S401: the second check information of electronic cell input/output module is generated based on Berger code and residue code.
In the present embodiment, Berger code obtains check bit by the number of " 0 " or " 1 " in statistics code word, if check bit
Digit is more, can obtain final verification position to the resulting check bit modulus of Berger by way of residue code modulo operation.The
Two check informations are to carry out Berger code by the input information to input/output module to obtain with residue code combined coding, by defeated
Block encoding is supplied to TRC cascade circuit 205 out.
S402: input information to the coding circuit for inputting input/output terminal obtains the second check bit.
In the present embodiment, three inputs and fuction output phase of the output end of input/output module with other directions
Even, if the output being connected with same input is divided into one group, w group can be divided into altogether, output there are four every group,
In, w is defined as the width of input/output module.When the output of the output end linkage function of input/output module, input and output mould
The output end of block plays fuction output.When the output end of input/output module connects the output in other directions, input defeated
The output end of module plays switching output out.Since switching output is different with the connection relationship of fuction output, the two etc.
Valence operation is also just different.
Therefore, the present embodiment can be provided separately bi-conditional operation circuit and obtain the second check bit.With reference to Fig. 6, switching is inputted
Information input is to the first bi-conditional operation circuit 201, at the first bi-conditional operation circuit 201, switching input block encoding circuit 202
The first exports coding is obtained after reason.Function signal is inputted into information input to function and inputs coding circuit 203, inputs and compiles through function
The second exports coding is obtained after code circuit 203, the processing of the second bi-conditional operation circuit 204.It is defeated according to the first exports coding and second
Available second check bit is encoded out.
S403: the second check information of input and the second check bit to the 3rd TRC cascade circuit obtain the second coding.
In the present embodiment, the second check information and the second check bit TRC cascade circuit 205 is input to be compared
To the second coding, the second coding is the output of TRC cascade circuit 205.Wherein, TRC cascade circuit 205 is the 3rd TRC grades
Join circuit.
Fig. 6 and Fig. 8 is please referred to, Fig. 8 is the process signal for the electronic cell detection method that further embodiment of this invention provides
Figure, on the basis of the above embodiments, step S402 can be described in detail are as follows:
S501: input switching input information to the first coding circuit obtains the first exports coding.
S502: input function input information to the second coding circuit obtains the second exports coding.
In the present embodiment, the first coding circuit i.e. the first bi-conditional operation circuit 201, switching input block encoding circuit
The circuit of 202 compositions, by switching input information input to available first exports coding of the first coding circuit.Second coding electricity
Function is inputted information input to the by the circuit of road, that is, function input coding circuit 203, the second bi-conditional operation circuit 204 composition
Available second exports coding of two coding circuits.Wherein, the first exports coding is defeated by switching input block encoding circuit 202
Out, the second exports coding is exported by the second bi-conditional operation circuit 204.
S503: the second check bit is determined according to the first exports coding and the second exports coding.
In the present embodiment, on the basis of the above embodiments, the first exports coding and the second exports coding are input to
The second check bit can be obtained in TRC circuit.
Fig. 6 and Fig. 9 is please referred to, Fig. 9 is the process signal for the electronic cell detection method that further embodiment of this invention provides
Figure, on the basis of the above embodiments, step S501 can be described in detail are as follows:
S601: input switching input information to the first equivalent circuit.
S602: the first equivalent circuit calculates and exports the Berger code of switching input information.
In the present embodiment, with the B in Berger code1For the calculation method of code, to the Berger of switching input circuit
Code detection is illustrated.Wherein, B1The number of " 1 " in code i.e. statistics code word.
For the n position binary operation number in basic logic and arithmetical operation: X=(xn,xn-1,…,x1) and Y=(yn,
yn-1,…,y1), operation result S=(sn,sn-1,…,s1) Berger code check information B (S) and operand Berger code
Check information B (X) and B (Y) meet particular kind of relationship, are illustrated by taking logic and operation as an example.Assuming that operand X=0, operand
Y=1, then the two carries out the number of results S=0 of step-by-step and operation.The Berger code check code of operand X is 0, operand Y's
Berger code check code is 1, and the Berger code check code of number of results S is 0, in addition, operand X and operand Y is carried out or operation
The Berger code check code for obtaining result is 1, then their Berger code is full for operand X, operand Y and number of results S
The following relational expression of foot
B (S)=B (X)+B (Y)-B (X | Y)
Due to the property of basic logic and arithmetical operation, in operation, there is biographies for the number of " 0 " or " 1 " in code word
Therefore, between operand and number of results the rule passed is constantly present fixed Berger code relationship.Embryo's electronic cell it is defeated
It is equivalent to number of results out, input is equivalent to an operand, as long as constructing defeated using another gene constructed operand is configured
The equivalent circuit for entering output relation can realize the Berger code self-test of circuit.
In the present embodiment, the first bi-conditional operation circuit 202 in the first equivalent circuit, that is, Fig. 6, the bi-conditional operation done
Are as follows:
Switching output is analyzed first.For an input terminal, it may be by the output end of switching connection 0 to
3.Therefore, one group of switching output can be carried out bi-conditional operation conversion, be regarded as 4 inputs respectively with 4 companies
Connect sequence be multiplied sum again as a result, specific flow path switch is as follows:
The Berger code relational expression of known multiplication are as follows:
B (S)=B (X) × B (Y)-B (C) (3)
For input an i, X=000i, catenation sequence Y=y4y3y2y1(yn=0,1), it is known that B (X)=i, B (C)=0,
Then
B(Si)=i × B (Y) (4)
S in formula (4)iThe input i and corresponding number of results of catenation sequence Y, the corresponding number of results of every group of 4 inputs it
Be exactly the corresponding output of the group.
For example, one group of input W1in, N1in, E1in and S1in are that 0101, W1in is connected with output N1out and E1out,
N1in is connected with output S1out, and E1in is connected with output W1out, and S1in does not connect output end, then output W1out,
N1out, E1out and S1out are 0001.Switching is equivalent to arithmetical operation, i.e., W1in is multiplied with catenation sequence 0110, N1in
It is multiplied with catenation sequence 0001, E1in is multiplied with catenation sequence 1000, and S1in is multiplied with catenation sequence 0000, is added again later
Number of results is 0001.Then number of results 0001 is the output organized for this.
That is, the conversion process of equal value of the first bi-conditional operation circuit 202 is to calculate the process of the above results number 0001.
Wherein, it for catenation sequence (referred to herein as the first catenation sequence), according to figure 6 first can be obtained with tps gene, first
It is the first bi-conditional operation circuit 202 of input with tps gene with tps gene, it comprises be input to the first bi-conditional operation circuit 202
Configuration information.Such as W1in, connect with output N1out and E1out, it is not connect with output S1out and W1out, then
For with input sequence for the circuit of WNES for, the catenation sequence of W1in is 0110, similarly, E1in and output W1out phase
Even, then the catenation sequence of E1in is 1000.
S603: switching input coding circuit receives the Berger code of switching output information, and calculates switching output information
The residue code of Berger code obtains the first exports coding.
In the present embodiment, on the basis of the above embodiments, number of results of the switching input coding circuit to aforementioned output
The modulo operation of 0001 progress residue code obtains the first exports coding.
Fig. 6 and Figure 10 is please referred to, Figure 10 is that the process for the electronic cell detection method that further embodiment of this invention provides is shown
It is intended to, on the basis of the above embodiments, step S502 can be described in detail are as follows:
S701: input function inputs information to function and inputs coding circuit.
S702: function inputs the parity check bit of coding circuit receive capabilities input information and output function input information.
In the present embodiment, parity check bit of the function input coding circuit for computing function input information, it is main
By being formed with gate array and XOR gate array.For example, can refer to Figure 13, it is assumed that input/output module width be 2, W1out and
E1out linkage function signal, LUT input port is S1in, S2in, E1in and W2in, by 8 input signals S1in, S2in,
E1in, E2in, N1in, N2in, W1in and W2in are input to function signal input coding circuit, function signal input coding circuit
By being formed with gate array and XOR gate, wherein and the number of door and the input terminal number of XOR gate it is identical, be equal to input and output
The number of module input.
Wherein, MNC (7)~MNC (0) is that function signal inputs screening-gene, and T is the value after coding, i.e. function input letter
The parity check bit of breath.It is responsible for screening W2in~S1in input signal with gate array, when function signal input screening-gene is corresponding
Input port when being LUT input port, it is 1 that function signal, which inputs screening-gene, and otherwise function signal input screening-gene is
0, since LUT input port is S1in, S2in, E1in and W2in at this time, so MNC is 10010011.Signal warp after screening
XOR gate processing is crossed, parity check bit T is obtained.
S703: the second equivalent circuit receives parity check bit and the second exports coding is calculated according to parity check bit.
In the present embodiment, the second equivalent circuit is substantially carried out both sides conversion of equal value.First, pass through function check base
Because the parity bit of function input information is converted to function signal, second is the calculating of function signal Berger code.
In the present embodiment, every group of LUT inputs a corresponding function check gene, and function check gene and parity check bit pass through
The result for crossing XOR operation is identical as function signal.Therefore, can by by function input information parity check bit and function school
It tests gene exclusive or and obtains function signal X.
The Berger code of function signal X is calculated, with the B in Berger code1For the calculation method of code, to function number
The Berger code detection for entering circuit is illustrated:
Function signal is connected with 0 to 4n output of input/output module, therefore, referring to the Berger of switching input circuit
The detection circuit part of second equivalent circuit is designed as the multiplying with a 4n catenation sequence by code detection method, thus
Obtain the Berger code check information of each group.For exporting W1out, N1out, E1out and S1out, as N1out and S1out
When the input of switching is 0 and W1out and E1out linkage function signal, if the value of function signal X is 1 at this time, export
W1out, N1out, E1out and S1out are that 1010, Berger code check information is 10.The catenation sequence of function signal is
1010, utilize function signal to carry out bi-conditional operation, it is known that B (X)=1, B (Y)=10, B (C)=0, then the second exports coding B (S)
Are as follows: B (S)=B (X) × B (Y)-B (C).
Wherein, the catenation sequence (referred to herein as the second catenation sequence) of function signal, can the second configuration according to figure 6
Gene obtains.For example, second is the second bi-conditional operation circuit 204 of input with tps gene with tps gene, it comprises be input to
The configuration information of second bi-conditional operation circuit 204.For example, be connected for function signal X with W1out and E1out, then for
With input sequence for the circuit of WNES for, the corresponding catenation sequence of function signal X be 1010.
The second equivalent circuit in the present embodiment is the second bi-conditional operation circuit 204 of Fig. 6.
Figure 11 is please referred to, Figure 11 is the flow diagram for the electronic cell detection method that further embodiment of this invention provides,
On the basis of the above embodiments, step S703 can be described in detail are as follows:
S801: function signal is determined according to parity check bit and function check position.
In the present embodiment, determine function signal i.e. by parity bit and function according to parity check bit and function check position
Energy check bit exclusive or obtains function signal.
S802: the second exports coding is obtained according to the Berger code of function signal and catenation sequence computing function signal.
In the present embodiment, the second output is obtained according to the Berger code of function signal and catenation sequence computing function signal
Coding obtains the second exports coding B (S) according to formula B (S)=B (X) × B (Y)-B (C).Wherein, X is function signal, and Y is
Catenation sequence, B (C)=0.
Optionally, as a kind of specific embodiment of electronic detection methods provided in an embodiment of the present invention, function check
The determination method of position are as follows:
If parity check bit is equal to preset function and matches tps gene, function check gene is equal to 0.
If parity check bit matches tps gene not equal to preset function, function check gene is equal to 1.
In the present embodiment, for example, function input information is 0000, then parity check bit is 0.If preset configuration gene is
0, then function check gene is 0, if preset configuration gene is 1, function check gene is 0.It is 1110 that function, which inputs information, then
Parity check bit is 1.If preset configuration gene is 0, function check gene is 1, if preset configuration gene is 1, function school
Testing gene is 1.
Optionally, Figure 12 is please referred to, Figure 12 is the process for the electronic cell detection method that further embodiment of this invention provides
Schematic diagram, on the basis of the above embodiments, step S802 can be described in detail are as follows:
S901: the residue code for calculating catenation sequence obtains function residue check gene.
S902: the second exports coding is obtained according to function residue check gene and function signal.
In the present embodiment, catenation sequence is the catenation sequence of function signal, can be remaining by carrying out to catenation sequence
Code modulo operation obtains function residue check gene, shortens catenation sequence digit.Further according to the catenation sequence and function after shortening
Signal obtains the second exports coding.Catenation sequence i.e. after B (S)=B (X) × B (Y)-B (C), the desirable shortening of X, i.e., by function
Residue check gene carries out the operation of Berger code as X.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and step, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and soft
The interchangeability of part generally describes each exemplary composition and step according to function in the above description.These function
It can be implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Professional skill
Art personnel can use different methods to achieve the described function each specific application, but this realization should not be recognized
It is beyond the scope of this invention.
It is apparent to those skilled in the art that for convenience of description and succinctly, the mould of foregoing description
The specific work process of block and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed module and method can pass through it
Its mode is realized.For example, the apparatus embodiments described above are merely exemplary, for example, the division of unit, only
A kind of logical function partition, there may be another division manner in actual implementation, for example, multiple units or components can combine or
Person is desirably integrated into another system, or some features can be ignored or not executed.In addition, it is shown or discussed it is mutual it
Between coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING or communication link of device or unit
It connects, is also possible to electricity, mechanical or other form connections.
Unit may or may not be physically separated as illustrated by the separation member, shown as a unit
Component may or may not be physical unit, it can and it is in one place, or may be distributed over multiple networks
On unit.It can select some or all of unit therein according to the actual needs to realize the mesh of the embodiment of the present invention
's.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, is also possible to two or more units and is integrated in one unit.It is above-mentioned integrated
Unit both can take the form of hardware realization, can also realize in the form of software functional units.
More than, only a specific embodiment of the invention, but scope of protection of the present invention is not limited thereto, and it is any to be familiar with
Those skilled in the art in the technical scope disclosed by the present invention, can readily occur in various equivalent modifications or substitutions,
These modifications or substitutions should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be wanted with right
Subject to the protection scope asked.
Claims (10)
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