CN110672995A - A power cable oscillating wave partial discharge detection circuit and its detection method - Google Patents

Abstract

The invention provides a power cable oscillating wave partial discharge detection circuit and a detection method, including a pulse generating circuit, a pulse transformer, several IGBT trigger circuits, IGBTs, a voltage equalizing circuit, a detection circuit and a cable to be tested, and the output of the pulse generating circuit The terminal is electrically connected to the primary side of the pulse transformer, the secondary side of the pulse transformer is electrically connected to the input terminal of each IGBT trigger circuit, the output terminal of the IGBT trigger circuit is electrically connected to the gate of the IGBT, and the drain of each IGBT is electrically connected. A voltage equalizing circuit is connected in parallel with the source; the drains and sources of the adjacent IGBTs are connected in series; the drains of the first-end IGBTs in series with the sources of the end IGBTs are connected in parallel with a detection circuit and a cable to be tested. The pulse generating circuit of the present invention generates a pulse signal to drive the pulse transformer for energy transfer, the IGBT applies a test voltage to the cable under test; the measuring circuit measures the discharge signal of the cable under test after the IGBT is turned off.

Description

A power cable oscillating wave partial discharge detection circuit and its detection method

technical field

The invention relates to the field of power equipment, in particular to a power cable oscillating wave partial discharge detection circuit and a detection method thereof.

Background technique

The power industry is a basic industry, and the failure of power cables will bring huge losses to power companies and power users. With the continuous transformation of my country's urban power grid, XLPE power cables have been widely used due to their corrosion resistance and high strength. However, after a period of operation, operation failures are prone to occur, mainly due to the dendritic aging breakdown of the insulation of the cable body and the discharge of accessories due to ingress of moisture.

The partial discharge source inside the power cable insulation system can be regarded as a point pulse signal source, and electromagnetic waves are generated by the discharge, which propagate along the cable and can be detected. Usually, the non-destructive testing of power cables adopts DC excitation oscillating wave voltage withstand voltage test (OWTS). The cable to be tested is charged through a series inductance and reaches the preset voltage, and then the switch is quickly turned on to perform AC discharge, so that the tested cable is discharged. The cable and the inductor resonate in series, thereby exciting the partial discharge signal at the defect of the cable for detection, which can avoid the damage of the cable by the traditional detection method. However, the commonly used switches are not suitable for the high-speed operation of oscillating switches. IGBT (Insulated Gate Bipolar Transistor) has become the preferred device for high-voltage switches due to its advantages of fast conduction speed and low driving power. IGBT itself has limited withstand voltage and high-voltage conditions. It needs to be used in series. If the trigger signals of each IGBT are inconsistent, the turn-on and turn-off times of each device will be asynchronous, resulting in unbalanced withstand voltage of the IGBTs at all levels in series, which is easy to damage the IGBT.

SUMMARY OF THE INVENTION

In view of this, the present invention proposes a power cable oscillating wave partial discharge detection circuit and a detection method with balanced voltages in series with multi-stage IGBTs and consistent trigger signals.

The technical scheme of the present invention is realized as follows:

In one aspect, the present invention provides a power cable oscillating wave partial discharge detection circuit, comprising a pulse generating circuit (1), a pulse transformer (2), several IGBT trigger circuits (3), IGBTs, a voltage equalizing circuit (4), a detection circuit The circuit (5) and the cable to be tested (6), the output end of the pulse generating circuit (1) is electrically connected with the primary side of the pulse transformer (2), and the secondary side of the pulse transformer (2) is respectively connected with each IGBT trigger circuit ( 3) The input terminal of the IGBT is electrically connected, the output terminal of the IGBT trigger circuit (3) is electrically connected to the gate of the IGBT, and a voltage equalizing circuit (4) is connected in parallel between the drain and source of each IGBT; The drain electrode and the source electrode are connected in series; a detection circuit (5) and a cable to be tested (6) are connected in parallel between the drain electrode of the first-end IGBT and the source electrode of the end IGBT which are connected in series;

The pulse generating circuit (1) outputs a pulse signal with an adjustable duty cycle, and the pulse signal is boosted by the pulse transformer (2) and then input to the IGBT trigger circuit (3) on the secondary side of the pulse transformer (2);

The IGBT trigger circuit (3) receives the boosted pulse signal, and inputs the pulse signal to the gate of the IGBT to keep the IGBT on or off, and each IGBT in the on state performs DC charging on the cable to be tested (6);

The voltage equalizing circuit (4) reduces the gate voltage change rate of the IGBTs, so that the driving signals of the IGBTs are synchronized;

After the detection circuit (5) turns off the IGBT, the cable to be tested (6) and the detection circuit (5) resonate in series, and the detection voltage (5) detects the discharge signal of the cable to be tested (6).

On the basis of the above technical solutions, preferably, the pulse generating circuit (1) includes a pulsed high-voltage power supply, a first transistor Q1, a second transistor Q2 and a third transistor Q3, and the output of the pulsed high-voltage power supply The pulse signal is input to the gate of the first triode Q1, the collector of the first triode Q1 is electrically connected to the base of the second triode Q2, and the collector of the second triode Q2 is electrically connected to the third triode The gate electrode of the transistor Q3 is electrically connected, and the emitter electrode and the collector electrode of the third transistor Q3 are respectively electrically connected to the primary side of the pulse transformer (2).

Further preferably, a D trigger, an AND gate and a PMW signal generating circuit are provided between the second transistor Q2 and the third transistor Q3; the collector of the second transistor Q2 and the D trigger of the D trigger are provided. The port is electrically connected, the input end of the PMW signal generating circuit is respectively electrically connected with the CP port of the D flip-flop and the first input end of the AND gate, and the output end of the D flip-flop is electrically connected with the second input end of the AND gate; The output end of the AND gate is electrically connected to the gate of the third transistor Q3.

Further preferably, the PMW signal generating circuit includes the first operational amplifier U1, the second operational amplifier U2, the third operational amplifier U3, the fourth operational amplifier U4 and a NAND gate; the inverting input terminal of the first operational amplifier U1 It is electrically connected to the +2V excitation voltage, and the non-inverting input terminal of the first operational amplifier U1 is electrically connected to the +3.3V voltage; the output terminal of the first operational amplifier U1 is electrically connected to the non-inverting input terminal of the second operational amplifier U2, and the first operational amplifier U1 is electrically connected to the non-inverting input terminal of the second operational amplifier U2. The non-inverting input terminals of the third operational amplifier U3 and the fourth operational amplifier U4 are electrically connected to the +3.3V voltage, and the inverting input terminal of the fourth operational amplifier U4 is respectively connected to the output terminal of the third operational amplifier U3 and the output terminal of the fourth operational amplifier U4 The output terminal is electrically connected; the output terminal of the fourth operational amplifier U4 is also electrically connected to the inverting input terminal of the third operational amplifier U3; the third operational amplifier U3 is electrically connected to the inverting input terminal of the second operational amplifier U2; The output terminal of the second operational amplifier U2 is electrically connected to the first input terminal of the NAND gate, the second input terminal of the NAND gate is grounded, and the output terminal of the NAND gate is respectively connected to the CP port of the D flip-flop and the first input terminal of the AND gate. An input terminal is electrically connected.

On the basis of the above technical solutions, preferably, the IGBT trigger circuit (3) includes a rectifier bridge and an RC parallel discharge unit, and the first input end and the second input end of the rectifier bridge are respectively connected to the secondary side of the pulse transformer (2). The sides are electrically connected, and the RC parallel discharge unit is connected in parallel with the first output terminal and the second output terminal of the rectifier bridge; the source and drain electrodes of adjacent IGBTs are connected in series with each other.

Further preferably, the RC parallel discharge unit includes a capacitor C5, a resistor R15 and a resistor R16, and the two ends of the capacitor C5 and the resistor R16 are respectively connected in parallel between the first output end and the second output end of the rectifier bridge; The terminal is connected in parallel between the connection point of the capacitor C5 and the resistor R16 and the first output terminal of the rectifier bridge.

Further preferably, the voltage equalizing circuit (4) includes a zener diode D1, a resistor R17, a resistor R18 and a capacitor C6. The two ends of R17 are connected in parallel; the Zener diode D1 is connected in antiparallel between the first output terminal and the second output terminal of the rectifier bridge; The anodes of diode D1 are connected in parallel.

On the basis of the above technical solutions, preferably, the detection circuit (5) includes an inductance L1, a high voltage divider, a coupling capacitor C8 and a detection impedance R21, and one end of the inductance L1 is connected to the drain current of the head-end IGBT in series with each other. One end of the high voltage divider, one end of the resistor R21 and one end of the cable to be tested (6) are all electrically connected to the other end of the inductor L1, and the high voltage divider is electrically connected to the source of the terminal IGBT in series with each other. ; The other end of the coupling capacitor C8 is connected in series with the resistor R21 and then grounded, and the other end of the cable (6) to be tested is grounded.

Further preferably, the high-voltage divider includes a resistor R19, a resistor R20 and a capacitor C7, the resistor R19 and the resistor R20 are connected in series and connected to the drain of the first-end IGBT and the source of the end IGBT in series with each other, and the capacitor C7 is connected in parallel. across resistor R20.

On the other hand, the present invention also provides a detection method for a power cable oscillating wave partial discharge detection circuit, comprising the following steps:

S1: disconnect both ends of the cable to be tested (6) from the power grid, and arrange the power cable oscillating wave partial discharge detection circuit and external equipment such as partial discharge locator and industrial computer at the testing site;

S2: The pulse signal is sent by the pulsed high-voltage power supply, and the pulse generation circuit (1) performs signal conditioning on the pulse signal, and is input into the second input end of the AND gate through the D port of the D flip-flop, and the PMW square wave output by the PMW signal generation circuit The signal is input to the CP port of the D flip-flop and the first input end of the AND gate to generate a new pulse signal that is the same as the rising edge of the PMW square wave, and input to the third transistor Q3, the third transistor Q3 will generate a new pulse signal. After the pulse signal is amplified, a high-frequency square wave signal is formed on the primary side of the pulse transformer (2);

S3: The pulse transformer (2) forms a high-frequency square wave signal on the primary side and transmits it to the secondary side;

S4: Each IGBT trigger circuit (3) on the secondary side of the pulse transformer (2) shapes the high-frequency square wave signal, and is stored by the RC parallel discharge unit; the shaped square wave signal triggers the gate of the IGBT, and when the square wave After the wave signal disappears, the RC parallel discharge unit discharges to maintain the continuous conduction of the IGBT, and the delay is turned off; the Zener diode D1 in the voltage equalizing circuit (4) limits the gate trigger voltage, so that each IGBT is triggered synchronously; the resistor R17 Realize the voltage equalization function, so that the voltage between the source and drain of the IGBT changes smoothly to achieve dynamic voltage equalization; it is detected under no-load conditions, and the background signal is measured;

S5: Connect to the cable to be tested (6), when the IGBTs connected in series are turned on, charge the cable to be tested (6) after dividing the voltage by the inductance L1 and the high voltage divider. When the charging is completed and the IGBT is turned off, The cable (6) is discharged to the outside, and the coupling capacitor C8 couples the partial discharge of the cable (6) to be tested to the capacitor, and forms a detection loop with the resistor R21, and forms a pulse current in the loop, and the pulse current is determined by the capacitor C8. The measurement point between the resistor R21 and the resistance R21 is led out, and the measurement point is connected with the partial discharge locator and the industrial computer to measure;

S6: After obtaining the measurement result, restore the normal connection between the cable to be tested (6) and the power grid.

A power cable oscillating wave partial discharge detection circuit and a detection method thereof provided by the present invention have the following beneficial effects compared with the prior art:

(1) The pulse generating circuit of the present invention generates a pulse signal to drive the pulse transformer to carry out energy transfer, intermittently triggers and turns off the IGBT, so that the IGBT applies a test voltage to the cable to be tested; after the IGBT is turned off, the measurement circuit measures the signal of the discharge of the cable to be tested. , to realize the detection of partial discharge of the cable under test;

(2) The pulse generation circuit sends out an adjustable pulse signal; with the assistance of the D flip-flop and the PMW signal generation circuit, the frequency of the pulse signal can be changed to better realize the oscillation process;

(3) The IGBT trigger circuit provides the gate trigger voltage of the IGBT on the one hand, and stores energy on the other hand to prolong its turn-on time;

(4) The voltage equalizing circuit can limit the gate voltage of the IGBT to prevent it from being turned on inappropriately, and can also equalize the voltage between the source and drain of the series connected IGBTs at all levels to prevent the IGBT from being damaged by overvoltage;

(5) The detection circuit detects the instantaneous pulse signal generated when the cable under test is partially discharged for further analysis.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to these drawings without creative efforts.

1 is a system structure block diagram of a power cable oscillating wave partial discharge detection circuit and a detection method thereof according to the present invention;

2 is a wiring diagram of a pulse generating circuit of a power cable oscillating wave partial discharge detection circuit and a detection method thereof according to the present invention;

3 is a wiring diagram of a PMW signal generating circuit in a pulse generating circuit of a power cable oscillating wave partial discharge detection circuit and a detection method thereof according to the present invention;

4 is a wiring diagram of an IGBT trigger circuit, an IGBT and a voltage equalizing circuit of a power cable oscillating wave partial discharge detection circuit and a detection method thereof according to the present invention;

5 is a wiring diagram of a detection circuit of a power cable oscillating wave partial discharge detection circuit and a detection method thereof according to the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

As shown in FIG. 1, the present invention provides a power cable oscillating wave partial discharge detection circuit, including a pulse generating circuit 1, a pulse transformer 2, several IGBT trigger circuits 3, IGBTs, a voltage equalizing circuit 4, a detection circuit 5 and a circuit to be tested Cable 6, wherein the output end of the pulse generating circuit 1 is electrically connected to the primary side of the pulse transformer 2, the secondary side of the pulse transformer 2 is electrically connected to the input ends of each IGBT trigger circuit 3, and the output end of the IGBT trigger circuit 3 is electrically connected It is electrically connected to the gate of the IGBT, and a voltage equalizing circuit 4 is connected in parallel between the drain and source of each IGBT; the drain and source of adjacent IGBTs are connected in series; A detection circuit 5 and a cable to be tested 6 are connected in parallel between the sources;

The pulse generating circuit 1 outputs a pulse signal with an adjustable duty cycle, and the pulse signal is boosted by the pulse transformer 2 and then input to the IGBT trigger circuit 3 on the secondary side of the pulse transformer 2;

The IGBT trigger circuit 3 receives the boosted pulse signal, and inputs the pulse signal into the gate of the IGBT to keep the IGBT on or off, and each IGBT in the on state performs DC charging on the cable 6 to be tested;

The voltage equalizing circuit 4 reduces the gate voltage change rate of the IGBT, so that the driving signals of each IGBT are synchronized;

After the detection circuit 5 turns off the IGBT, the cable under test 6 and the detection circuit 5 resonate in series, and the detection voltage 5 detects the discharge signal of the cable under test 6 .

The pulse generating circuit 1 of the present invention sends out a pulse signal as an excitation source of a signal, and the ability of the signal is amplified by the pulse transformer 2 and output to each IGBT trigger circuit 3, so that the IGBT is continuously turned on and off. The pulse signal sent by the pulse generating circuit 1 can be realized by a common pulse high-voltage power supply product on the market.

As shown in FIG. 1, the pulse generating circuit 1 of the present invention includes a pulsed high-voltage power supply, a first transistor Q1, a second transistor Q2 and a third transistor Q3, and the pulse signal output by the pulsed high-voltage power supply is input to the first three transistors The gate of the transistor Q1, the collector of the first transistor Q1 is electrically connected to the base of the second transistor Q2, and the collector of the second transistor Q2 is electrically connected to the gate of the third transistor Q3. The emitter and collector of the third transistor Q3 are electrically connected to the primary side of the pulse transformer 2 respectively. The first transistor Q1 and the second transistor Q2 can regulate the pulse signal sent by the pulsed high-voltage power supply, and then amplified by the third transistor Q3 and input to the primary side of the pulse transformer 2, which is boosted by the pulse transformer 2 output.

As shown in FIG. 1 in conjunction with FIG. 2 , a D flip-flop, an AND gate and a PMW signal generating circuit are arranged between the second transistor Q2 and the third transistor Q3; the collector of the second transistor Q2 is connected to the D flip-flop The D port of the device is electrically connected, the input terminal of the PMW signal generating circuit is electrically connected to the CP port of the D flip-flop and the first input terminal of the AND gate, and the output terminal of the D flip-flop is electrically connected to the second input terminal of the AND gate. The output terminal of the AND gate is electrically connected to the gate of the third transistor Q3. The PMW signal generating circuit sends out a high-frequency square wave signal, and the high-frequency square wave signal is input into the D flip-flop and the AND gate respectively, so that the pulse signal output by the pulsed high-voltage power supply is further mixed with the high-frequency square wave signal, and the PMW signal generating circuit can be adjusted The duty cycle of the high frequency square wave signal can further change the frequency of the pulse signal.

Specifically, the output end of the pulsed high-voltage power supply is electrically connected to one end of the resistor R1, and the other end of the resistor R1 is electrically connected to one end of the resistor R2, one end of the resistor R3 and the base of the first transistor Q1; The emitter of the transistor Q1 is connected in parallel with the other end of the resistor R3 and then grounded; the other end of the resistor R2 is connected in parallel with the collector of the first transistor Q1 and is electrically connected to one end of the resistor R4; the other end of the resistor R4 is electrically connected to the first end of the resistor R4 The base of the second transistor Q2 is electrically connected; the emitter of the second transistor Q2 is electrically connected to the +12V power supply, the collector of the second transistor Q2 is electrically connected to one end of the resistor R5 and the D port of the D flip-flop The other end of the resistor R5 is grounded; the output end of the D flip-flop is electrically connected with the second input end of the AND gate; the input end of the PMW signal generating circuit is respectively connected with the CP port of the D flip-flop and the first input end of the AND gate. The input terminal is electrically connected; the output terminal of the AND gate is electrically connected to one end of the resistor R6, and the other end of the resistor R6 is electrically connected to the base of the third transistor Q3; the collector of the third transistor Q3 is electrically connected to the emitter The pole is connected in parallel with both ends of the capacitor C1 and the primary side of the pulse transformer 2; the collector of the third transistor Q3 is also electrically connected to the +12V power supply through the resistor R7.

As shown in FIG. 3 , the PMW signal generating circuit includes a first operational amplifier U1, a second operational amplifier U2, a third operational amplifier U3, a fourth operational amplifier U4 and a NAND gate; the inverting input terminal of the first operational amplifier U1 and the The +2V excitation voltage is electrically connected, and the non-inverting input terminal of the first operational amplifier U1 is electrically connected to the +3.3V voltage; the output terminal of the first operational amplifier U1 is electrically connected to the non-inverting input terminal of the second operational amplifier U2, and the third operational amplifier U1 is electrically connected to the non-inverting input terminal. The non-inverting input terminals of the operational amplifier U3 and the fourth operational amplifier U4 are electrically connected to the +3.3V voltage, and the inverting input terminal of the fourth operational amplifier U4 is respectively connected to the output terminal of the third operational amplifier U3 and the output of the fourth operational amplifier U4 The terminal is electrically connected; the output terminal of the fourth operational amplifier U4 is also electrically connected to the inverting input terminal of the third operational amplifier U3; the third operational amplifier U3 is electrically connected to the inverting input terminal of the second operational amplifier U2; The output terminal of the two operational amplifiers U2 is electrically connected to the first input terminal of the NAND gate, the second input terminal of the NAND gate is grounded, and the output terminal of the NAND gate is respectively connected to the CP port of the D flip-flop and the first input terminal of the AND gate. The input terminal is electrically connected.

Among them, the non-inverting input terminal of the first operational amplifier U1 is provided with a filter circuit composed of a resistor R9 and a capacitor C2 in parallel, and the non-inverting input terminal of the first operational amplifier U1 is also electrically connected to the +3.3V power supply through a capacitor R8; The inverting input end of the amplifier U1 is electrically connected to one end of the resistor R10, one end of the capacitor C3 and one end of the resistor R11 respectively; the other end of the resistor R10 is electrically connected to the +2V power supply; the other end of the capacitor C3 is electrically connected to the first operational amplifier The output terminal of U1 is electrically connected; the other end of the resistor R11 is electrically connected to the output terminal of the second operational amplifier U2; the output terminal of the first operational amplifier U1 is electrically connected to the non-inverting input terminal of the second operational amplifier U2; The operational amplifier U1 and its peripheral components together form an error amplifier, the +2V power supply is used as the excitation signal input by the first operational amplifier U1, and the +3.3V power supply is used as the reference voltage input by the first operational amplifier U1. The non-inverting input terminal of the third operational amplifier U3 is electrically connected to the +3.3V power supply; the inverting input terminal of the third operational amplifier U3 is electrically connected to one end of the resistor R12 and one end of the capacitor C4 respectively, and the other end of the resistor R12 is respectively connected to The output end of the fourth operational amplifier U4 is electrically connected to one end of the resistor R13; the non-inverting input end of the fourth operational amplifier U4 is electrically connected to the +3.3V power supply; the inverting input end of the fourth operational amplifier U4 is electrically connected to the other end of the resistor R13. One end is electrically connected, and a resistor R14 is connected in parallel between the output end of the third operational amplifier U3 and the inverting input end of the fourth operational amplifier U4. The output terminal of the third operational amplifier U3 is electrically connected to the inverting input terminal of the second operational amplifier U2. The output terminal of the second operational amplifier U2 is electrically connected to the first input terminal of the NAND gate, and the second input terminal of the NAND gate is grounded. The third operational amplifier U3 and the fourth operational amplifier U4 constitute a triangular wave generator. The second operational amplifier U2 outputs a square wave signal with an adjustable duty cycle, and the duty cycle is adjusted by the inverting input of the first operational amplifier U1. terminal input control. In the present invention, the first operational amplifier U1 and the third operational amplifier U3 are selected from OPA2365, which are single-power operational amplifiers and use a +5V single power supply. The first operational amplifier U1 and the third operational amplifier U3 can be integrated into one chip, which can reduce the volume of the chip. The second operational amplifier U2 and the third operational amplifier U3 can use the TLV3502 comparator, which is also powered by a +5V single power supply. The second operational amplifier U2 and the third operational amplifier U3 can be integrated in the same TLV3502 to further reduce the size of the chip.

As shown in FIG. 4 , the IGBT trigger circuit 3 includes a rectifier bridge and an RC parallel discharge unit. The first input end and the second input end of the rectifier bridge are electrically connected to the secondary side of the pulse transformer 2 respectively, and the RC parallel discharge unit is connected to the rectifier. The first output terminal and the second output terminal of the bridge are connected in parallel; the sources and drains of adjacent IGBTs are connected in series. The rectifier bridge can process the boosted pulse signal to obtain a pulsating DC voltage, which is sent to the subsequent RC parallel discharge unit and IGBT. The components of each IGBT trigger circuit 3 are preferably products of the same type from the same manufacturer and the same batch, and their performances are relatively close.

The RC parallel discharge unit includes a capacitor C5, a resistor R15 and a resistor R16. Both ends of the capacitor C5 and the resistor R16 are connected in parallel between the first output end and the second output end of the rectifier bridge respectively; both ends of the resistor R15 are connected in parallel with the capacitor C5. and between the connection point of the resistor R16 and the first output terminal of the rectifier bridge. The RC parallel discharge unit can continue to discharge after the pulse transformer 2 is powered off to maintain the conduction of the IGBT. Because the IGBT gate requires a certain amount of energy to turn on, but the energy required to maintain the IGBT conduction is small, the discharge circuit can be formed by the RC parallel discharge unit to realize the continuous conduction of the IGBT until the discharge process ends.

As shown in Figure 4, the voltage equalizing circuit 4 includes a Zener diode D1, a resistor R17, a resistor R18 and a capacitor C6. The resistor R17 is connected to the source and drain of the IGBT respectively. The resistor R18 and the capacitor C6 are connected in series with the resistor R17. The two ends are connected in parallel; the Zener diode D1 is connected in reverse parallel between the first output terminal and the second output terminal of the rectifier bridge, the gate of the IGBT is also connected in parallel with the negative electrode of the Zener diode D1, and the source of the IGBT is connected to the Zener diode D1. The positive poles are connected in parallel. The voltage equalizing circuit 4 can buffer the variation of the circuit voltage to achieve the effect of equalizing the variation of the voltage.

As shown in FIG. 5 , the detection circuit 5 includes an inductance L1, a high-voltage divider, a coupling capacitor C8 and a detection impedance R21. One end of the inductance L1 is electrically connected to the drain of the head-end IGBT in series with each other, and one end of the high-voltage divider is electrically connected to each other. , One end of the resistor R21 and one end of the cable 6 to be tested are electrically connected to the other end of the inductor L1, and the high-voltage divider is electrically connected to the source of the terminal IGBT in series; the coupling capacitor C8 is connected in series with the other end of the resistor R21. After the grounding, the other end of the cable 6 to be tested is grounded.

Among them, the high-voltage divider includes resistor R19, resistor R20 and capacitor C7. After resistor R19 and resistor R20 are connected in series, they are connected to the drain of the first-end IGBT and the source of the end IGBT in series with each other. The capacitor C7 is connected in parallel with the resistor R20. both ends.

The detection method of the power cable oscillating wave partial discharge detection circuit of the present invention includes the following steps:

S1: Disconnect both ends of the cable 6 to be tested from the power grid, and arrange the power cable oscillating wave partial discharge detection circuit and external equipment such as partial discharge locator and industrial computer at the testing site;

S2: The pulse signal is sent by the pulse high-voltage power supply, and the pulse generation circuit 1 performs signal conditioning on the pulse signal, and is input into the second input terminal of the AND gate through the D port of the D flip-flop, and the PMW square wave signal output by the PMW signal generation circuit is input. In the CP port of the D flip-flop and the first input terminal of the AND gate, a new pulse signal that is the same as the rising edge of the PMW square wave is generated, and input to the third transistor Q3, the third transistor Q3 converts the new pulse signal After the signal is amplified, a high-frequency square wave signal is formed on the primary side of the pulse transformer 2;

S3: The pulse transformer 2 forms a high-frequency square wave signal on the primary side and transmits it to the secondary side;

S4: Each IGBT trigger circuit 3 on the secondary side of the pulse transformer 2 shapes the high-frequency square wave signal, and the RC parallel discharge unit stores energy; the shaped square wave signal triggers the gate of the IGBT, and when the square wave signal disappears , the RC parallel discharge unit discharges to maintain the continuous conduction of the IGBT, and the delay is turned off; the Zener diode D1 in the voltage equalizing circuit 4 limits the gate trigger voltage, so that the IGBTs are triggered synchronously; the resistor R17 realizes the voltage equalizing function, making The voltage between the IGBT source and drain changes smoothly to achieve dynamic voltage equalization; detection is performed under no-load conditions, and the background signal is measured;

S5: Connect to the cable 6 to be tested. When the IGBTs connected in series are turned on, they are charged to the cable 6 to be tested after dividing the voltage by the inductor L1 and the high voltage divider. Discharge, the coupling capacitor C8 couples the partial discharge of the cable under test 6 to the capacitor, and forms a detection loop with the resistor R21, and forms a pulse current in the loop, and the pulse current is measured by the capacitor C8 and the resistor R21. Lead out, the measurement point is connected with the partial discharge locator and the industrial computer to measure;

S6: After obtaining the measurement result, restore the normal connection between the cable 6 to be tested and the power grid.

In the above detection method, the partial discharge locator can use the 560 type partial discharge locator of Switzerland HAEFELY Company. The industrial computer can be a PC. According to the off-line method of time domain reflectometry commonly used in the field by the partial discharge locator, when partial discharge occurs, the partial discharge pulse signal will propagate along the cable 6 under test from two opposite directions, and the two pulses will reach the partial discharge locator. There will be a time difference at the test end of the cable. Since the material and length of the cable are basically determined, the position of the partial discharge can be calculated from the time difference to determine the position of the partial discharge.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the present invention. within the scope of protection.

Claims (10)

1. A power cable oscillatory wave partial discharge detection circuit is characterized in that: the device comprises a pulse generating circuit (1), a pulse transformer (2), a plurality of IGBT trigger circuits (3), IGBTs, a voltage-sharing circuit (4), a detection circuit (5) and a cable (6) to be detected, wherein the output end of the pulse generating circuit (1) is electrically connected with the primary side of the pulse transformer (2), the secondary side of the pulse transformer (2) is electrically connected with the input end of each IGBT trigger circuit (3), the output end of the IGBT trigger circuit (3) is electrically connected with the gate pole of the IGBT, and the voltage-sharing circuit (4) is connected in parallel between the drain electrode and the source electrode of each IGBT; the drain electrodes and the source electrodes of the adjacent IGBTs are connected in series; a detection circuit (5) and a cable (6) to be detected are connected in parallel between the drain electrode of the head end IGBT and the source electrode of the tail end IGBT which are connected in series;

the pulse generating circuit (1) outputs a pulse signal with adjustable duty ratio, and the pulse signal is boosted by the pulse transformer (2) and then input into the IGBT trigger circuit (3) on the secondary side of the pulse transformer (2);

the IGBT trigger circuit (3) receives the boosted pulse signal, inputs the pulse signal into a gate pole of the IGBT, maintains the on or off of the IGBT, and each IGBT in the on state carries out direct current charging on the cable (6) to be tested;

the voltage equalizing circuit (4) reduces the change rate of the gate voltage of the IGBT, so that the driving signals of the IGBTs are synchronous;

after the IGBT of the detection circuit (5) is turned off, the cable (6) to be detected and the detection circuit (5) generate series resonance, and the detection voltage (5) detects a discharge signal applied to the cable (6) to be detected.

2. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 1, wherein: the pulse generating circuit (1) comprises a pulse high-voltage power supply, a first triode Q1, a second triode Q2 and a third triode Q3, wherein a pulse signal output by the pulse high-voltage power supply is input into a gate electrode of the first triode Q1, a collector electrode of the first triode Q1 is electrically connected with a base electrode of the second triode Q2, a collector electrode of the second triode Q2 is electrically connected with a gate electrode of the third triode Q3, and an emitter electrode and a collector electrode of the third triode Q3 are respectively electrically connected with a primary side of a pulse transformer (2).

3. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 2, wherein: a D trigger, an AND gate and a PMW signal generating circuit are arranged between the second triode Q2 and the third triode Q3; the collector of the second triode Q2 is electrically connected with the D port of the D trigger, the input end of the PMW signal generating circuit is respectively electrically connected with the CP port of the D trigger and the first input end of the AND gate, and the output end of the D trigger is electrically connected with the second input end of the AND gate; the output end of the AND gate is electrically connected with the gate of the third triode Q3.

4. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 3, wherein: the PMW signal generating circuit comprises a first operational amplifier U1, a second operational amplifier U2, a third operational amplifier U3, a fourth operational amplifier U4 and a NAND gate; the inverting input terminal of the first operational amplifier U1 is electrically connected to the +2V driving voltage, and the non-inverting input terminal of the first operational amplifier U1 is electrically connected to the +3.3V voltage; the output end of the first operational amplifier U1 is electrically connected with the non-inverting input end of the second operational amplifier U2, the non-inverting input ends of the third operational amplifier U3 and the fourth operational amplifier U4 are electrically connected with +3.3V voltage, and the inverting input end of the fourth operational amplifier U4 is electrically connected with the output end of the third operational amplifier U3 and the output end of the fourth operational amplifier U4 respectively; the output end of the fourth operational amplifier U4 is also electrically connected with the inverting input end of the third operational amplifier U3; the third operational amplifier U3 is electrically connected to the inverting input terminal of the second operational amplifier U2; the output end of the second operational amplifier U2 is electrically connected to the first input end of the nand gate, the second input end of the nand gate is grounded, and the output ends of the nand gate are respectively electrically connected to the CP port of the D flip-flop and the first input end of the and gate.

5. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 1, wherein: the IGBT trigger circuit (3) comprises a rectifier bridge and an RC parallel discharge unit, a first input end and a second input end of the rectifier bridge are respectively and electrically connected with the secondary side of the pulse transformer (2), and the RC parallel discharge unit is connected with a first output end and a second output end of the rectifier bridge in parallel; the source and drain of adjacent IGBTs are connected in series with each other.

6. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 5, wherein: the RC parallel discharge unit comprises a capacitor C5, a resistor R15 and a resistor R16, and two ends of the capacitor C5 and two ends of the resistor R16 are respectively connected between a first output end and a second output end of the rectifier bridge in parallel; two ends of the resistor R15 are connected in parallel between the capacitor C5 and the connection point of the resistor R16 and the first output end of the rectifier bridge.

7. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 5, wherein: the voltage-sharing circuit (4) comprises a voltage-stabilizing diode D1, a resistor R17, a resistor R18 and a capacitor C6, wherein the resistor R17 is respectively connected between the source and the drain of the IGBT, and the resistor R18 and the capacitor C6 are connected in series and then connected with two ends of the resistor R17 in parallel; the voltage stabilizing diode D1 is connected in reverse parallel between the first output end and the second output end of the rectifier bridge, the gate of the IGBT is also connected in parallel with the cathode of the voltage stabilizing diode D1, and the source of the IGBT is connected in parallel with the anode of the voltage stabilizing diode D1.

8. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 1, wherein: the detection circuit (5) comprises an inductor L1, a high-voltage divider, a coupling capacitor C8 and a detection impedance R21, one end of the inductor L1 is electrically connected with the drain electrode of the head-end IGBT which is mutually connected in series, one end of the high-voltage divider, one end of a resistor R21 and one end of a cable to be detected (6) are electrically connected with the other end of the inductor L1, and the high-voltage divider is electrically connected with the source electrode of the tail-end IGBT which is mutually connected in series; the coupling capacitor C8 is connected with the other end of the resistor R21 in series and then grounded, and the other end of the cable (6) to be tested is grounded.

9. A power cable oscillatory wave partial discharge detection circuit in accordance with claim 8, wherein: the high-voltage divider comprises a resistor R19, a resistor R20 and a capacitor C7, wherein the resistor R19 and the resistor R20 are connected in series and then are connected in parallel to the drain electrode of the head end IGBT and the source electrode of the tail end IGBT which are mutually connected in series, and the capacitor C7 is connected in parallel to two ends of the resistor R20.

10. A detection method of a power cable oscillation wave partial discharge detection circuit is characterized by comprising the following steps: the method comprises the following steps:

s1: two ends of a cable (6) to be tested are separated from a power grid, and a power cable oscillation wave partial discharge detection circuit, a partial discharge locator, an industrial personal computer and other external equipment are arranged on a detection site;

s2: a pulse high-voltage power supply sends out a pulse signal, a pulse generating circuit (1) conditions the pulse signal, the pulse signal is input into a second input end of an AND gate through a D port of a D trigger, a PMW square wave signal output by the PMW signal generating circuit is input into a CP port of the D trigger and a first input end of the AND gate, a new pulse signal which is the same as the rising edge of the PMW square wave is generated and input into a third triode Q3, and a high-frequency square wave signal is formed on the primary side of a pulse transformer (2) after the new pulse signal is amplified by a third triode Q3;

s3: the pulse transformer (2) forms a high-frequency square wave signal on the primary side and transmits the high-frequency square wave signal to the secondary side;

s4: each IGBT trigger circuit (3) on the secondary side of the pulse transformer (2) shapes the high-frequency square wave signal, and the RC parallel discharge unit stores energy; triggering the gate pole of the IGBT by the shaped square wave signal, and discharging by an RC parallel discharge unit to maintain the continuous conduction of the IGBT and delay the turn-off when the square wave signal disappears; a voltage stabilizing diode D1 in the voltage equalizing circuit (4) limits the gate trigger voltage to ensure that each IGBT is synchronously triggered; the resistor R17 realizes a voltage-sharing function, so that the voltage between the source electrode and the drain electrode of the IGBT can be changed smoothly to realize dynamic voltage sharing; detecting under the condition of no load, and measuring a background signal;

s5: the method comprises the following steps that a cable (6) to be measured is connected, when each IGBT connected in series is conducted, the IGBT is charged to the cable (6) to be measured after voltage division through an inductor L1 and a high-voltage divider, when charging is finished and the IGBT is turned off, the cable (6) to be measured discharges outwards, a coupling capacitor C8 couples partial discharge of the cable (6) to be measured to the capacitor, the capacitor and a resistor R21 form a detection loop, pulse current is formed in the loop, the pulse current is led out from a measuring point between the capacitor C8 and the resistor R21, and the measuring point is connected with a partial discharge locator and an industrial personal computer and is used for measurement;

s6: and after the measurement result is obtained, the normal connection between the cable (6) to be measured and the power grid is recovered.

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