CN112201687A - Groove MOSFET device with NPN sandwich gate structure - Google Patents

Groove MOSFET device with NPN sandwich gate structure Download PDF

Info

Publication number
CN112201687A
CN112201687A CN202011192757.7A CN202011192757A CN112201687A CN 112201687 A CN112201687 A CN 112201687A CN 202011192757 A CN202011192757 A CN 202011192757A CN 112201687 A CN112201687 A CN 112201687A
Authority
CN
China
Prior art keywords
type
region
gate structure
trench
npn
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202011192757.7A
Other languages
Chinese (zh)
Inventor
李泽宏
赵一尚
胡汶金
林泳浩
李伟聪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vanguard Semiconductor Co Ltd
Original Assignee
Vanguard Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vanguard Semiconductor Co Ltd filed Critical Vanguard Semiconductor Co Ltd
Priority to CN202011192757.7A priority Critical patent/CN112201687A/en
Publication of CN112201687A publication Critical patent/CN112201687A/en
Priority to PCT/CN2021/115533 priority patent/WO2022088925A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/83FETs having PN junction gate electrodes
    • H10D30/831Vertical FETs having PN junction gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/111Field plates
    • H10D64/117Recessed field plates, e.g. trench field plates or buried field plates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/63Vertical IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

本发明公开一种NPN三明治栅结构的沟槽MOSFET器件,包括元胞结构,所述元胞结构包括从下至上依次层叠的漏极金属、N+衬底、N型漂移区、源极金属;所述N型漂移区的上表面一侧形成沟槽栅极结构,沟槽栅极结构包括从上至下依次设置的N+Poly栅极、P型轻掺杂区、N型源极接触区;所述N型漂移区的上表面另一侧设有紧邻沟槽栅极结构的P型基区;所述P型基区的上表面设有相互接触的N型重掺杂区和P型重掺杂区;所述沟槽栅极结构的下表面、侧面以及上表面均设有氧化层,用于隔离N型漂移区、P型基区、N型重掺杂区以及源极金属。本发明在SGT MOSFET的基础上改进,进一步改善功率MOSFET器件的开关特性。

Figure 202011192757

The invention discloses a trench MOSFET device with an NPN sandwich gate structure, comprising a cell structure including a drain metal, an N+ substrate, an N-type drift region and a source metal sequentially stacked from bottom to top; A trench gate structure is formed on one side of the upper surface of the N-type drift region, and the trench gate structure includes an N+Poly gate, a P-type lightly doped region, and an N-type source contact region sequentially arranged from top to bottom; The other side of the upper surface of the N-type drift region is provided with a P-type base region adjacent to the trench gate structure; the upper surface of the P-type base region is provided with an N-type heavily doped region and a P-type heavily doped region in contact with each other. Doping region; the lower surface, side surface and upper surface of the trench gate structure are provided with oxide layers for isolating the N-type drift region, the P-type base region, the N-type heavily doped region and the source metal. The invention improves on the basis of the SGT MOSFET, and further improves the switching characteristics of the power MOSFET device.

Figure 202011192757

Description

Groove MOSFET device with NPN sandwich gate structure
Technical Field
The invention relates to the technical field of power semiconductor devices, in particular to a trench MOSFET device with an NPN sandwich gate structure.
Background
With the development of power electronic systems, power semiconductor devices are widely applied to important fields such as transportation, military defense, energy conversion and the like, and become important research hotspots in the academic world gradually. The power MOS device is an important component of a power semiconductor device, and has the advantages of high input impedance, high switching speed, low transient loss and the like, so that the power MOS device plays a leading role in a low-voltage power switching circuit. Due to application requirements, power MOSFET devices in low voltage applications are gradually beginning to develop along the trends of reducing device switching power consumption, increasing device current capability, and enhancing device reliability.
In order to improve the withstand voltage of the device, the power MOSFET device has undergone continuous development from a lateral structure to a longitudinal structure, from a planar structure to a trench structure. The Trench structure has undergone the development from the conventional Trench Gate MOSFET device to the step Oxide Trench MOSFET (RSO MOSFET) that reduces the surface electric field, and then to the Split-Gate Trench MOSFET (SGT MOSFET). The traditional groove gate MOSFET device mainly forms a gate electrode through deep groove etching and polysilicon deposition, and compared with the traditional plane gate, the traditional groove gate MOSFET device can effectively reduce the on-resistance of the device and improve the breakdown voltage of the device. The RSO MOSFET device is further optimized in a mode that the groove extends into the epitaxial layer drift region on the basis of the traditional groove gate MOSFET, the gate electrode extending into the drift region plays a role of an in-vivo field plate, the current carriers in the drift region are subjected to auxiliary depletion, and therefore the electric field of the drift region is effectively optimized, the RSO MOSFET device can achieve higher concentration of the drift region on the premise of the same breakdown voltage, and therefore the RSO MOSFET device has lower specific on-resistance. However, although the RSO MOSFET can achieve lower static loss, the RSO MOSFET has a large gate capacitance due to its large gate area, resulting in a large switching power loss when applied to a switching circuit.
In order to further optimize the performance of the trench-gate MOSFET, an SGT MOSFET device is proposed based on the conventional trench-gate MOSFET and RSO MOSFET, and the structural diagram is shown in fig. 1. Compared with the traditional groove gate MOSFET, the groove of the SGT MOSFET is deeper; compared with an RSO MOSFET, the grid electrode and the shielding grid of the SGT MOSFET are isolated through a medium, and meanwhile, the shielding grid electrode of the device is in short circuit with the source electrode in the three-dimensional front-back direction through the layout. The SGT MOSFET structure has two directional improvements over the two structures mentioned above: on one hand, the shielding grid can be used as an in-vivo field plate buried in a body to perform auxiliary depletion on a current carrier of the drift region, so that the depletion capability of the drift region of the device is effectively improved, and the electric field distribution of the drift region is optimized, so that the SGT MOSFET is ensured to have lower specific on-resistance on the premise of the same breakdown voltage; on the other hand, the overlapping area between the grid electrode and the drain electrode of the device is greatly reduced due to the existence of the shielding grid, so that the interelectrode capacitance between the grid electrode and the drain electrode can be effectively shielded, the grid-drain capacitance of the device is greatly reduced, the switching speed of the power MOSFET device is improved to a certain extent, and the switching loss of the device is reduced. However, the existing structure can convert the gate-drain capacitance into the source-drain capacitance, so that the input capacitance of the device is increased; secondly, the electric field distribution of the drift region of the structure still has certain heterogeneity, so that the improvement effect of the structure on the on-resistance is weakened; meanwhile, the structure needs to be subjected to deposition of an oxide layer for many times in the process preparation, so that certain process complexity is increased.
Disclosure of Invention
The invention aims to provide a trench MOSFET device with an NPN sandwich gate structure, which is improved on the basis of an SGT MOSFET and further improves the switching characteristic of a power MOSFET device.
In order to realize the purpose, the following technical scheme is adopted:
a trench MOSFET device with an NPN sandwich gate structure comprises a cell structure, wherein the cell structure comprises drain metal, an N + substrate, an N-type drift region and source metal which are sequentially stacked from bottom to top; a groove grid structure is formed on one side of the upper surface of the N-type drift region, and the groove grid structure comprises an N + Poly grid, a P-type lightly doped region and an N-type source contact region which are sequentially arranged from top to bottom; a P-type base region adjacent to the trench gate structure is arranged on the other side of the upper surface of the N-type drift region; the upper surface of the P-type base region is provided with an N-type heavily doped region and a P-type heavily doped region which are mutually contacted, and the N-type heavily doped region is arranged close to the trench gate structure; and the lower surface, the side surface and the upper surface of the trench gate structure are respectively provided with an oxide layer for isolating the N-type drift region, the P-type base region, the N-type heavily doped region and the source metal.
Preferably, the oxide layer between the side surfaces of the P-type lightly doped region and the N-type source contact region and the N-type drift region is a thick oxide layer, and the oxide layer on the side surface of the N + Poly gate is a thin oxide layer.
Preferably, the N-type source contact region is connected with the source metal.
The N + Poly grid, the P-type lightly doped region and the N-type source contact region jointly form an NPN sandwich structure in the groove, the auxiliary effect on the depletion of the drift region is enhanced, and meanwhile the influence between the grids and the shields of the drain electrode can be further reduced, so that the grid-drain capacitance of the device is reduced.
Compared with the traditional shielded gate trench MOSFET, the method effectively reduces the deposition times of the oxide layer in the trench gate, simplifies the layout design steps of the device and improves the design efficiency.
By adopting the scheme, the invention has the beneficial effects that:
the invention provides a trench MOSFET device with an NPN sandwich gate structure on the basis of the traditional shielded gate trench MOSFET structure, which utilizes the NPN sandwich structure in a trench gate to: on one hand, the depletion of the drift region can be realized, and the realization of higher doping concentration under the condition that the withstand voltage is not influenced is ensured, so that the specific on-resistance and the static loss of the device are reduced; on the other hand, the structure can also reduce the overlapping between the grid and the drain, thereby reducing the grid leakage capacitance, and simultaneously providing other current paths for the displacement current, thereby reducing the charging influence of the displacement current on the grid, effectively reducing the charging phenomenon of grid charges, and realizing faster switching speed and smaller switching loss.
Drawings
FIG. 1 is a schematic diagram of a prior art shielded gate trench MOSFET device in a lateral cross-sectional configuration;
FIG. 2 is a schematic cross-sectional view of the present invention;
wherein the figures identify the description:
1-N type heavily doped region, 2-P type heavily doped region,
3-P type base region, 4-N type drift region,
5-N + substrate, 6-drain metal,
7-source metal, 8-N + Poly gate,
9-P type lightly doped region, 10-N type source contact region,
11-oxide layer.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
In order to further improve the static characteristics and the switching characteristics of the device and reduce the complexity of the process, the invention provides a trench MOSFET device with an NPN sandwich gate structure based on the existing SGT MOSFET structure, as shown in fig. 2. The main improvement of the structure is that: on one hand, the depletion of the drift region is further assisted by utilizing the depletion of a PN junction in the groove gate, and the electric field distribution in the drift region is optimized; on the other hand, the junction capacitance of the PN junction is utilized to further shield the grid electrode and the drain electrode, so that smaller grid-drain capacitance is realized, the switching speed of the device is improved, and the switching loss of the device is reduced.
The technical scheme of the invention is described in detail in the following with the accompanying drawings:
referring to fig. 2, the invention provides a trench MOSFET device with an NPN sandwich gate structure, which includes a cell structure, where the cell structure includes a drain metal 6, an N + substrate 5, an N-type drift region 4, and a source metal 7, which are sequentially stacked from bottom to top; a trench gate structure is formed on one side of the upper surface of the N-type drift region 4, and the trench gate structure comprises an N + Poly gate 8, a P-type lightly doped region 9 and an N-type source contact region 10 which are sequentially arranged from top to bottom; the other side of the upper surface of the N-type drift region 4 is provided with a P-type base region 3 adjacent to the trench gate structure; the upper surface of the P-type base region 3 is provided with an N-type heavily doped region 1 and a P-type heavily doped region 2 which are mutually contacted, and the N-type heavily doped region 1 is arranged close to the trench gate structure; and the lower surface, the side surface and the upper surface of the trench gate structure are respectively provided with an oxide layer 11 for isolating the N-type drift region 4, the P-type base region 3, the N-type heavily doped region 1 and the source metal 7.
An oxide layer 11 between the side surfaces of the P-type lightly doped region 9 and the N-type source contact region 10 and the N-type drift region 4 is a thick oxide layer, and an oxide layer 11 on the side surface of the N + Poly gate 8 is a thin oxide layer. The N-type source contact region 10 is connected to the source metal 7.
The principle of the invention is as follows: on the basis of an SGT MOSFET structure, an NPN sandwich structure is arranged in a groove to further optimize the effect of a shielding gate, wherein an N-type heavily doped region 1 in the NPN structure is led out as a poly gate, an N-type lightly doped region is floated, and an N-type source contact region 10 is connected with a source. Compared with the traditional SGT MOSFET device, the Trench MOSFET device (Split-Gate MOSFET with NPN Sandwich, SSGT MOSFET) with the NPN Sandwich structure enhances the shielding effect between the grid and the drain, greatly reduces the grid-drain capacitance of the device, and simultaneously leads the source-drain capacitance of the new structure to be far smaller than the source-drain capacitance of the traditional SGT MOSFET device due to the existence of smaller junction capacitance in the Trench grid NPN Sandwich structure in the new structure, and leads the output capacitance of the new structure to be far smaller than the output capacitance of the traditional structure due to the improvement of the grid-drain capacitance and the source-drain capacitance by the NPN Sandwich structure, thereby effectively improving the switching speed and the switching loss of the device. Meanwhile, the NPN sandwich structure in the groove gate realizes the improvement from the in-vivo resistance field plate to the in-vivo junction field plate, and can enhance the auxiliary effect of the groove structure on depletion, thereby further optimizing the internal electric field and the on-resistance of the drift region.
In summary, on the basis of the conventional shielded Gate Trench MOSFET structure, a Trench MOSFET device (a Split-Gate Trench MOSFET with an NPN Sandwich, SSGT MOSFET) having an NPN Sandwich structure is provided in a Trench, so that the electric field and specific on-resistance of the drift region in the body can be further optimized while the Gate-drain capacitance and the source-drain capacitance of the device are reduced, thereby achieving faster switching speed and lower static loss and switching loss.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (3)

1.一种NPN三明治栅结构的沟槽MOSFET器件,包括元胞结构,其特征在于,所述元胞结构包括从下至上依次层叠的漏极金属、N+衬底、N型漂移区、源极金属;所述N型漂移区的上表面一侧形成沟槽栅极结构,沟槽栅极结构包括从上至下依次设置的N+Poly栅极、P型轻掺杂区、N型源极接触区;所述N型漂移区的上表面另一侧设有紧邻沟槽栅极结构的P型基区;所述P型基区的上表面设有相互接触的N型重掺杂区和P型重掺杂区,且N型重掺杂区紧邻沟槽栅极结构设置;所述沟槽栅极结构的下表面、侧面以及上表面均设有氧化层,用于隔离N型漂移区、P型基区、N型重掺杂区以及源极金属。1. a trench MOSFET device of an NPN sandwich gate structure, comprising a cell structure, characterized in that the cell structure comprises drain metal, N+ substrate, N-type drift region, source electrode stacked sequentially from bottom to top metal; a trench gate structure is formed on one side of the upper surface of the N-type drift region, and the trench gate structure includes an N+Poly gate, a P-type lightly doped region, and an N-type source electrode arranged in sequence from top to bottom contact region; the other side of the upper surface of the N-type drift region is provided with a P-type base region adjacent to the trench gate structure; the upper surface of the P-type base region is provided with an N-type heavily doped region and The P-type heavily doped region and the N-type heavily doped region are disposed adjacent to the trench gate structure; the lower surface, side surfaces and upper surface of the trench gate structure are provided with oxide layers for isolating the N-type drift region , P-type base region, N-type heavily doped region and source metal. 2.根据权利要求1所述的NPN三明治栅结构的沟槽MOSFET器件,其特征在于,所述P型轻掺杂区、N型源极接触区的侧面与N型漂移区之间的氧化层为厚氧化层,N+Poly栅极侧面的氧化层为薄氧化层。2 . The trench MOSFET device with NPN sandwich gate structure according to claim 1 , wherein the oxide layer between the P-type lightly doped region, the side surface of the N-type source contact region and the N-type drift region is 2 . It is a thick oxide layer, and the oxide layer on the side of the N+Poly gate is a thin oxide layer. 3.根据权利要求1所述的NPN三明治栅结构的沟槽MOSFET器件,其特征在于,所述N型源极接触区与源极金属相连接。3 . The trench MOSFET device with an NPN sandwich gate structure according to claim 1 , wherein the N-type source contact region is connected to a source metal. 4 .
CN202011192757.7A 2020-10-30 2020-10-30 Groove MOSFET device with NPN sandwich gate structure Pending CN112201687A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202011192757.7A CN112201687A (en) 2020-10-30 2020-10-30 Groove MOSFET device with NPN sandwich gate structure
PCT/CN2021/115533 WO2022088925A1 (en) 2020-10-30 2021-08-31 Trench mosfet device having npn sandwich gate structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011192757.7A CN112201687A (en) 2020-10-30 2020-10-30 Groove MOSFET device with NPN sandwich gate structure

Publications (1)

Publication Number Publication Date
CN112201687A true CN112201687A (en) 2021-01-08

Family

ID=74012188

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011192757.7A Pending CN112201687A (en) 2020-10-30 2020-10-30 Groove MOSFET device with NPN sandwich gate structure

Country Status (2)

Country Link
CN (1) CN112201687A (en)
WO (1) WO2022088925A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114284339A (en) * 2021-12-10 2022-04-05 无锡先瞳半导体科技有限公司 Shielding gate groove type field effect transistor of step type substrate region and preparation method thereof
WO2022088925A1 (en) * 2020-10-30 2022-05-05 深圳市威兆半导体有限公司 Trench mosfet device having npn sandwich gate structure
CN115513280A (en) * 2022-10-31 2022-12-23 广州安海半导体股份有限公司 Trench silicon carbide MOSFET structure and fabrication method
WO2023124902A1 (en) * 2021-12-31 2023-07-06 无锡华润上华科技有限公司 Trench dmos device and manufacturing method therefor

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115394835B (en) * 2022-08-31 2025-12-12 瑞能半导体科技股份有限公司 Trench silicon carbide transistor and its manufacturing method
CN116093163B (en) * 2023-03-29 2025-10-03 电子科技大学 A shielded gate trench MOSFET
CN117855282B (en) * 2024-02-22 2024-05-24 深圳天狼芯半导体有限公司 Low voltage shielded gate MOSFET and its preparation method and chip
CN118472043A (en) * 2024-07-10 2024-08-09 深圳天狼芯半导体有限公司 Semiconductor device and method for manufacturing the same
CN119170650B (en) * 2024-11-07 2025-03-21 江西萨瑞微电子技术有限公司 A trench type power device and a method for manufacturing the same
CN120091608B (en) * 2025-03-24 2025-11-18 重庆邮电大学 MOSFET device with electric field and carrier modulation

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6566708B1 (en) * 2000-11-17 2003-05-20 Koninklijke Philips Electronics N.V. Trench-gate field-effect transistors with low gate-drain capacitance and their manufacture
CN109037071A (en) * 2018-07-19 2018-12-18 厦门芯代集成电路有限公司 A kind of preparation method of shield grid power device
CN109390333A (en) * 2017-08-04 2019-02-26 艾普凌科有限公司 Semiconductor device
CN109920854A (en) * 2019-03-07 2019-06-21 中国科学院半导体研究所 MOSFET devices
CN212967710U (en) * 2020-10-30 2021-04-13 深圳市威兆半导体有限公司 Groove MOSFET device with NPN sandwich gate structure

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5700027B2 (en) * 2012-12-07 2015-04-15 トヨタ自動車株式会社 Semiconductor device
KR102004768B1 (en) * 2013-08-30 2019-07-29 삼성전기주식회사 Power semiconductor device
CN112201687A (en) * 2020-10-30 2021-01-08 深圳市威兆半导体有限公司 Groove MOSFET device with NPN sandwich gate structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6566708B1 (en) * 2000-11-17 2003-05-20 Koninklijke Philips Electronics N.V. Trench-gate field-effect transistors with low gate-drain capacitance and their manufacture
CN109390333A (en) * 2017-08-04 2019-02-26 艾普凌科有限公司 Semiconductor device
CN109037071A (en) * 2018-07-19 2018-12-18 厦门芯代集成电路有限公司 A kind of preparation method of shield grid power device
CN109920854A (en) * 2019-03-07 2019-06-21 中国科学院半导体研究所 MOSFET devices
CN212967710U (en) * 2020-10-30 2021-04-13 深圳市威兆半导体有限公司 Groove MOSFET device with NPN sandwich gate structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022088925A1 (en) * 2020-10-30 2022-05-05 深圳市威兆半导体有限公司 Trench mosfet device having npn sandwich gate structure
CN114284339A (en) * 2021-12-10 2022-04-05 无锡先瞳半导体科技有限公司 Shielding gate groove type field effect transistor of step type substrate region and preparation method thereof
WO2023124902A1 (en) * 2021-12-31 2023-07-06 无锡华润上华科技有限公司 Trench dmos device and manufacturing method therefor
CN115513280A (en) * 2022-10-31 2022-12-23 广州安海半导体股份有限公司 Trench silicon carbide MOSFET structure and fabrication method

Also Published As

Publication number Publication date
WO2022088925A1 (en) 2022-05-05

Similar Documents

Publication Publication Date Title
CN112201687A (en) Groove MOSFET device with NPN sandwich gate structure
CN113130627A (en) Silicon carbide fin-shaped gate MOSFET integrated with channel diode
CN109244136B (en) Bottom Schottky Contact SiC MOSFET Devices
CN114927561B (en) A silicon carbide MOSFET device
WO2019157818A1 (en) Igbt chip having composite gate structure comprising dummy gate
CN111211174B (en) SGT-MOSFET semiconductor device
CN216213475U (en) Shielding gate groove type power MOSFET device
CN118136676B (en) A silicon carbide metal-oxide field effect transistor and a power device
CN107994072A (en) A kind of carrier storage layer IGBT device with shield grid
CN112164721A (en) SGT MOSFET device with bidirectional ESD protection capability
CN110504313B (en) A lateral trench type insulated gate bipolar transistor and its preparation method
CN212967710U (en) Groove MOSFET device with NPN sandwich gate structure
CN213026134U (en) Shielding grid MOSFET device integrated with NPN punch-through triode
CN110534575A (en) A kind of VDMOS device
CN212659542U (en) Semiconductor power device with buried conductive medium channel region split gate structure
CN108767001B (en) Trench IGBT device with shielding gate
CN201804866U (en) Reverse conducting SOI LIGBT device unit
CN101872771B (en) Reverse-conducting SOI LIGBT component unit
CN112186028B (en) A shielded gate MOSFET device with integrated NPN punch-through transistor
CN213184301U (en) SGT MOSFET device with bidirectional ESD protection capability
CN113193043B (en) Trench gate IGBT device with diode clamping carrier storage layer
CN212810309U (en) Planar split gate IGBT semiconductor power device
CN108461536B (en) A bidirectional trench gate charge storage IGBT and method of making the same
CN111293168B (en) IGBT device and its manufacturing method
CN119092545B (en) SOI lateral power semiconductor device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20210108

RJ01 Rejection of invention patent application after publication