CN112433556A

CN112433556A - Improved band-gap reference voltage circuit

Info

Publication number: CN112433556A
Application number: CN201910791124.9A
Authority: CN
Inventors: 谢程益; 王野; 于翔
Original assignee: SG Micro Beijing Co Ltd
Current assignee: SG Micro Beijing Co Ltd
Priority date: 2019-08-26
Filing date: 2019-08-26
Publication date: 2021-03-02

Abstract

An improved bandgap reference voltage circuit can generate PTAT current without requiring additional operational amplifiers, thereby helping to reduce costs, reduce power consumption and improve accuracy, and is characterized in that the bandgap reference voltage output terminal is included, so that the The bandgap reference voltage output terminal is respectively connected to the drain of the fourth PMOS transistor, one end of the second resistor, and one end of the third resistor, the other end of the third resistor is connected to the ground terminal, and the other end of the second resistor The collector of the third NPN triode and the drain of the third PMOS transistor are respectively connected, the emitter of the third NPN triode is connected to the ground terminal, and the base and the collector of the third NPN triode are connected to the first after being interconnected. The base of the NPN transistor, the base of the second NPN transistor, and the output terminal of the start-up circuit, the input terminal of the start-up circuit and the source of the third PMOS transistor and the source of the fourth PMOS transistor are all connected supply voltage terminal.

Description

Improved band-gap reference voltage circuit

Technical Field

The invention relates to a band-gap reference voltage source technology, in particular to an improved band-gap reference voltage circuit, which is characterized in that a closed loop system formed by 3 PMOS (P-channel metal oxide semiconductor) tubes and 3 NPN (negative-positive-negative) triodes and a third NPN triode are connected in a diode mode to provide base voltage for the rest NPN triodes, and the PTAT (proportional to absolute temperature) current can be generated without an additional operational amplifier, so that the cost is reduced, the power consumption is reduced, and the precision is improved.

Background

The bandgap reference voltage source is widely used due to its advantages of being not affected by power supply, temperature and process parameters, however, in low power supply voltage application, the conventional bandgap reference source (generally 1.2V) is limited, and therefore, a low voltage bandgap reference source (low voltage bandgap reference source, the low voltage is 1.2V lower than the conventional bandgap reference source) needs to be applied. However, most of the commonly used low-voltage bandgap reference voltage source structures have large power consumption and complex circuit structures. A typical low-voltage bandgap reference voltage source generates a bandgap reference voltage by combining a positive/negative temperature coefficient voltage or a positive/negative temperature coefficient current, which both require an additional operational amplifier to generate a positive temperature coefficient voltage (i.e., a positive temperature coefficient Δ V)_BE). The operational amplifier forces the emitter potentials of the two PNP transistors to be the same, thereby generating the delta V with positive temperature coefficient_BE. Such an operational amplifier increases system power consumption and circuit area, and the offset of the operational amplifier itself affects the accuracy of the output bandgap reference voltage. For example, the equivalent input offset voltage (Vos) of the operational amplifier is amplified by several times and appears at the output terminal (VBG, bandgap reference voltage), which affects the circuit performance. The inventor believes that if a closed loop system formed by 3 PMOS transistors and 3 NPN transistors and a third NPN transistor are connected in a diode form to provide a base voltage to the remaining NPN transistors, a PTAT current (proportional to absolute temperature) can be generated without an additional operational amplifier, thereby contributing to cost reduction, power consumption reduction, and accuracy improvement. In view of the above, the present inventors have completed the present invention.

Disclosure of Invention

Aiming at the defects or shortcomings in the prior art, the invention provides an improved band-gap reference voltage circuit, a closed-loop system formed by 3 PMOS (P-channel metal oxide semiconductor) tubes and 3 NPN triodes and a third NPN triode are connected in a diode mode to provide base voltage for the rest NPN triodes, so that PTAT (proportional to absolute temperature) current can be generated without an additional operational amplifier, and the cost is reduced, the power consumption is reduced and the precision is improved.

The technical scheme of the invention is as follows:

an improved band-gap reference voltage circuit is characterized by comprising a band-gap reference voltage output end, wherein the band-gap reference voltage output end is respectively connected with a drain electrode of a fourth PMOS tube, one end of a second resistor and one end of a third resistor, the other end of the third resistor is connected with a grounding terminal, the other end of the second resistor is respectively connected with a collector electrode of a third NPN triode and a drain electrode of the third PMOS tube, an emitter electrode of the third NPN triode is connected with the grounding terminal, a base electrode of the third NPN triode and a collector electrode of the third NPN triode are respectively connected with a base electrode of the first NPN triode, a base electrode of the second NPN triode and an output end of a starting circuit, and an input end of the starting circuit, a source electrode of the third PMOS tube and a source electrode of the fourth PMOS tube are respectively connected with a.

And the source electrode of the second NPN triode is connected with a grounding end through a first resistor.

And the source electrode of the first NPN triode is connected with a grounding end.

The area of the first NPN triode is 1: n, n is an integer greater than 1.

And the collector electrode of the first NPN triode is connected with the drain electrode of a first PMOS (P-channel metal oxide semiconductor) tube, and the source electrode of the first PMOS tube is connected with the power supply voltage end.

And the collector electrode of the second NPN triode is connected with the drain electrode of a second PMOS (P-channel metal oxide semiconductor) tube, and the source electrode of the second PMOS tube is connected with the power supply voltage end.

The grid electrode of the fourth PMOS tube is interconnected with the grid electrode of the second PMOS tube and the grid electrode of the first PMOS tube, and the drain electrode of the first PMOS tube is interconnected with the grid electrode.

And the grid electrode of the third PMOS tube is interconnected with the drain electrode of the second PMOS tube.

The first PMOS tube and the second PMOS tube are the same pair tube, the first NPN triode and the second NPN triode have different emitter region-base region areas, collector current I1 flowing into the first NPN triode is equal to collector current I2 flowing into the second NPN triode, and when the first NPN triode and the second NPN triode work under unequal current densities, the voltage difference of base electrode and emitter electrode can be in direct proportion to absolute temperature, so that the collector current I2 of the second NPN triode is second PTAT current.

The current flowing out of the drain electrode of the fourth PMOS tube is fourth current I4, and the I4 is first PTAT current.

The invention has the following technical effects: the improved band-gap reference voltage circuit provided by the invention uses the NPN transistor, can generate positive temperature coefficient voltage without using additional operational amplifier clamp, has better offset characteristic of the circuit structure, and has the characteristics of low voltage, low power consumption, low cost, high precision and the like. In the aspect of offset, the main influence of the offset index in the improved structure is the matching degree of the PMOS transistor, and very accurate current replication can be realized through reasonable layout, so that high-precision output is obtained. Compared with the prior art, the invention simplifies the operational amplifier in the original structure, reduces the power consumption, saves the circuit area, simultaneously improves the precision of the output band-gap reference voltage and realizes the CMOS low-voltage band-gap reference voltage circuit or the band-gap reference voltage source with low cost, low power consumption and high precision by improving the circuit structure, combining the voltages of positive/negative temperature coefficients and replacing the PNP transistor with the NPN transistor.

Drawings

Fig. 1 is a schematic diagram of an improved bandgap reference voltage circuit embodying the present invention.

The reference numbers are listed below: vcc-supply voltage; GND-ground; VBG-band gap reference voltage output end or band gap reference voltage; q1-a first NPN transistor; q2-a second NPN transistor; q3-third NPN triode; m1-first PMOS tube; m2-second PMOS tube; m3-third PMOS tube; m4-fourth PMOS tube; r1 — first resistance; r2 — second resistance; r3 — third resistance; i1 — a first current or a collector current of a first NPN triode; i2-a second current or collector current of a second NPN triode; i3 — third current; i4 — fourth current or PTAT current (proportional to absolute temperature); i is_R1-a first resistance through which a current flows; i is_R2-a second resistance through which a current flows; i is_R3-a third resistance through which a current flows; 1: n-represents the area ratio of Q1 to Q2 (or the ratio of the number of triodes of the two).

Detailed Description

The invention is described below with reference to the accompanying drawing (fig. 1).

Fig. 1 is a schematic diagram of an improved bandgap reference voltage circuit embodying the present invention. As shown in fig. 1, an improved bandgap reference voltage circuit includes a bandgap reference voltage output terminal VBG, where the bandgap reference voltage output terminal VBG is connected to a drain of a fourth PMOS transistor M4, one end of a second resistor R2, and one end of a third resistor R3, the other end of the third resistor R3 is connected to a ground terminal GND, the other end of the second resistor R2 is connected to a collector of a third NPN transistor Q3 and a drain of a third PMOS transistor M3, an emitter of the third NPN transistor Q3 is connected to the ground terminal GND, a base of the third NPN transistor Q3 and a collector of the third NPN transistor Q3 are connected to a base of a first NPN transistor Q1, a base of the second NPN transistor Q2, and an output terminal of a start circuit, and an input terminal of the start circuit, a source of the third PMOS transistor M3, and a source of the fourth PMOS transistor M4 are connected to a power supply voltage terminal Vcc. The source of the second NPN transistor Q2 is connected to the ground GND through a first resistor R1. The source of the first NPN triode Q1 is connected to the ground GND. The area of the first NPN transistor Q1 is 1: n, n is an integer greater than 1. The collector of the first NPN triode Q1 is connected to the drain of the first PMOS transistor M1, and the source of the first PMOS transistor M1 is connected to the power supply voltage terminal Vcc. The collector of the second NPN triode Q2 is connected to the drain of the second PMOS transistor M2, and the source of the second PMOS transistor M2 is connected to the power supply voltage terminal Vcc. The grid electrode of the fourth PMOS tube M4 and the grid electrode of the second PMOS tube M2 and the grid electrode of the first PMOS tube M1 are interconnected, and the drain electrode and the grid electrode of the first PMOS tube M1 are interconnected. The gate of the third PMOS transistor M3 is interconnected with the drain of the second PMOS transistor M2. The first PMOS transistor M1 and the second PMOS transistor M2 are the same pair transistor, the first NPN transistor Q1 and the second NPN transistor Q2 have different emitter-base area, and the collector current I1 flowing into the first NPN transistor Q1 and the collector current I flowing into the second NPN transistor Q2 flow into the same pair transistorCollector currents I2 of the diode Q2 are equal, and when the first NPN triode Q1 and the second NPN triode Q2 work under unequal current densities, the voltage difference of base-emitter voltages is in direct proportion to absolute temperature, and delta V is_BE＝V_Tln, where n is an area ratio multiple of the second NPN transistor Q2 and the first NPN transistor Q1, VT is a thermoelectric potential, and Δ VBE is a voltage difference between a base voltage and an emitter voltage of the Q1 and the Q2, so that the collector current I2 of the second NPN transistor is a second PTAT current. The current flowing out of the drain electrode of the fourth PMOS tube is fourth current I4, and the I4 is first PTAT current.

Referring to fig. 1, NPN transistors Q1 and Q2 have different emitter base areas, and the first PMOS transistor M1 and the second PMOS transistor M2 are the same pair transistor, so that I1 is equal to I2, and transistors Q1 and Q2 operate at unequal current densities, so that the difference in base emitter voltages is proportional to absolute temperature. V_BE1＝R1*I_R1+V_BE2Neglecting the base current of the transistor, i.e.

I2 is PTAT current. I4 is replicated by a current mirror, also a PTAT current. The voltage at the two ends of the R2 is a band-gap reference voltage VBG and a base emitter voltage V of a third NPN triode Q3_BEThen, I_R2In which contains V_BEAn item. I is_R3As I4 and I_R2The current component has a positive temperature coefficient term and a negative temperature coefficient term at the same time, and the ideal temperature coefficient can be obtained by reasonably setting the resistance value.

I_R3＝I₄-I_R2 (10)

It is pointed out here that the above description is helpful for the person skilled in the art to understand the invention, but does not limit the scope of protection of the invention. Any such equivalent, modified and/or simplified implementations as described above, e.g., implementations using other oscillator regulation circuits, etc., without departing from the spirit of the present invention, are intended to fall within the scope of the present invention.

Claims

1. An improved bandgap reference voltage circuit is characterized in that, comprising a bandgap reference voltage output terminal, the bandgap reference voltage output terminal is respectively connected to the drain of the fourth PMOS tube, one end of the second resistor, and the first One end of the three resistors, the other end of the third resistor is connected to the ground terminal, and the other end of the second resistor is connected to the collector of the third NPN transistor and the drain of the third PMOS transistor, respectively. The emitter is connected to the ground terminal, and the base and collector of the third NPN triode are connected to the base of the first NPN triode, the base of the second NPN triode, and the output end of the start-up circuit, respectively. The input terminal of the third PMOS transistor and the source of the fourth PMOS transistor are all connected to the power supply voltage terminal.

2 . The improved bandgap reference voltage circuit according to claim 1 , wherein the source of the second NPN transistor is connected to the ground terminal through a first resistor. 3 .

3 . The improved bandgap reference voltage circuit according to claim 2 , wherein the source of the first NPN transistor is connected to the ground terminal. 4 .

4 . The improved bandgap reference voltage circuit according to claim 3 , wherein the ratio of the area of the first NPN triode to the area of the second NPN triode is 1:n, where n is an integer greater than 1. 5 .

5. The improved bandgap reference voltage circuit according to claim 4, wherein the collector of the first NPN transistor is connected to the drain of the first PMOS transistor, and the source of the first PMOS transistor is connected to the the power supply voltage terminal.

6. The improved bandgap reference voltage circuit according to claim 5, wherein the collector of the second NPN transistor is connected to the drain of the second PMOS transistor, and the source of the second PMOS transistor is connected to the the power supply voltage terminal.

7. The improved bandgap reference voltage circuit according to claim 6, wherein the gate of the fourth PMOS transistor, the gate of the second PMOS transistor and the gate of the first PMOS transistor interconnection, and the drain and gate of the first PMOS transistor are interconnected.

8. The improved bandgap reference voltage circuit according to claim 7, wherein the gate of the third PMOS transistor is interconnected with the drain of the second PMOS transistor.

9 . The improved bandgap reference voltage circuit according to claim 8 , wherein the first PMOS transistor and the second PMOS transistor are the same pair of transistors, and the first NPN transistor and the second PMOS transistor are the same pair of transistors. 10 . The two NPN transistors have different emitter-base areas, and the collector current I1 flowing into the first NPN transistor is equal to the collector current I2 flowing into the second NPN transistor. The NPN transistor works under unequal current densities so that the base-emitter voltage difference is proportional to the absolute temperature, so that the collector current I2 of the second NPN transistor is the second PTAT current.

10 . The improved bandgap reference voltage circuit according to claim 9 , wherein the current flowing from the drain of the fourth PMOS transistor is a fourth current I4 , and the I4 is the first PTAT current. 11 .