CN114123761A

CN114123761A - Control circuit and method for reducing electromagnetic interference

Info

Publication number: CN114123761A
Application number: CN202010906663.5A
Authority: CN
Inventors: 张科; 王富中
Original assignee: Galaxycore Shanghai Ltd Corp
Current assignee: Galaxycore Shanghai Ltd Corp
Priority date: 2020-09-01
Filing date: 2020-09-01
Publication date: 2022-03-01

Abstract

Embodiments of the present invention provide a control circuit and method for reducing electromagnetic interference. The control circuit includes: a bias unit, a driving unit, a plurality of switch tubes, and a flying capacitor; the driving unit is coupled to the bias unit; One end is connected to the flying capacitor; the bias unit is adapted to generate a bias voltage or bias current; the drive unit is adapted to receive a control signal, bias voltage or bias current, and output a first voltage, wherein the first voltage is used for Control the opening or closing of the plurality of switch tubes; the second end of some of the plurality of switch tubes is suitable for inputting the second voltage; the second end of at least one switch tube in the plurality of switch tubes is suitable for outputting the third voltage Voltage. The technical solutions of the embodiments of the present invention can reduce the electromagnetic interference generated by the flying capacitor during the charging and discharging process, and reduce the area of the control circuit without affecting the driving capability of the charge pump.

Description

Control circuit and method for reducing electromagnetic interference

Technical Field

The invention relates to the field of circuit design, in particular to a control circuit and a method for reducing electromagnetic interference.

Background

A Charge Pump (Charge Pump) may provide a bias voltage for a display driving chip of a liquid crystal display panel in an electronic device; it may comprise one booster cell or a cascade of multiple booster cells, each of which may boost the output voltage relative to its input voltage, e.g. to twice.

The boosting unit comprises a plurality of switching tubes and Flying capacitors (Flying capacitors); the boosting process of the charge pump is the process of flying capacitor energy transfer.

Fig. 1 illustrates a booster cell in a charge pump. The boosting unit 10 comprises four switching tubes S1, S2, S3 and S4 and a flying capacitor Cfly, wherein one end of each of the switching tubes S1 and S2 is connected with one end of the flying capacitor Cfly, the other end of each of the switching tubes S1 and S2 is connected with an input voltage V1 and an output voltage V2, one end of each of the switching tubes S3 and S4 is connected with the other end of the flying capacitor Cfly, and the other end of each of the switching tubes S3 and S4 is connected with a ground and the input voltage V1.

The energy transfer process of the flying capacitor Cfly includes a charging process and a discharging process. During charging, the switching tubes S1 and S3 are closed, and S2 and S4 are opened, and the flying capacitor Cfly is charged by the input voltage V1 and charged to V1; during the discharge process, the switching tubes S1 and S3 are opened and S2 and S4 are closed, and the input voltage V1 and the flying capacitor Cfly charge the output terminal simultaneously, so that the output voltage V2 is equal to twice the input voltage V1.

However, during the energy transfer, strong Electromagnetic Interference (EMI) is generated, which affects the operation of related elements in the electronic device.

Disclosure of Invention

The invention solves the technical problem that the charge pump generates stronger electromagnetic interference and the like in the process of energy transfer.

To solve the above technical problem, an embodiment of the present invention provides a control circuit for reducing electromagnetic interference, including: a biasing unit; a drive unit; a plurality of switching tubes; and a flying capacitor; the driving unit is coupled to the bias unit; the first ends of the switch tubes are connected with the flying capacitor; the bias unit is suitable for generating a bias voltage or a bias current; the driving unit is suitable for receiving a control signal, a bias voltage or a bias current and outputting a first voltage, wherein the first voltage is used for controlling the opening or closing of the plurality of switching tubes; the second ends of part of the switch tubes in the plurality of switch tubes are suitable for inputting a second voltage; the second end of at least one of the plurality of switching tubes is adapted to output a third voltage.

Optionally, the bias unit includes at least one bias unit, the driving unit includes a plurality of driving units, and the at least one bias unit provides a bias voltage or a bias current to the plurality of driving units.

Alternatively, the bias voltage or bias current may be continuously adjusted and/or discretely adjusted.

Optionally, the bias unit includes at least one switch, an input terminal of the at least one switch receives a control voltage or a control current, respectively, and an output terminal of the at least one switch is connected to the driving unit.

Optionally, the rate of change of voltage of the rise or fall of the first voltage is controllable.

Alternatively, the rate of change of the voltage applied to the flying capacitor may be controlled by a plurality of switching tubes.

Optionally, the driving unit comprises a plurality of driving units, each of the plurality of driving units driving at least one switching tube.

Optionally, at least one of the plurality of driving units comprises a first PMOS transistor, a first NMOS transistor, a first variable current source, a second variable current source, an input terminal, and an output terminal; the input end is used for receiving a control signal; the output end is used for outputting a first voltage.

Optionally, the gates of the first PMOS transistor and the first NMOS transistor are both connected to the input terminal to receive the control signal, the drains of the first PMOS transistor and the first NMOS transistor are both connected to the output terminal to output the first voltage, the source of the first PMOS transistor is connected to the power voltage through the first variable current source, and the source of the first NMOS transistor is connected to the ground through the second variable current source.

Optionally, the bias unit provides bias voltages to the at least one driving unit, the bias voltages including a first bias voltage and a second bias voltage provided to the first variable current source and the second variable current source, respectively; wherein at least one of the first bias voltage and the second bias voltage is continuously adjustable.

Optionally, the bias unit provides a bias voltage to each of the driving units, respectively, the bias voltage comprising a first bias voltage and a second bias voltage provided to a first variable current source and a second variable current source of each of the driving units, respectively; wherein at least one of the first bias voltages is continuously adjustable and at least one of the second bias voltages is continuously adjustable.

Optionally, the bias unit comprises a low dropout regulator, an input terminal of which receives the adjustable control voltage, and an output terminal of which is connected to the first variable current source or the second variable current source.

Optionally, the bias unit includes a first low dropout regulator and a second low dropout regulator, an input terminal of the first low dropout regulator receives the adjustable first control voltage, an output terminal of the first low dropout regulator is connected to the first variable current source of the driving unit, an input terminal of the second low dropout regulator receives the adjustable second control voltage, and an output terminal of the second low dropout regulator is connected to the second variable current source.

Optionally, the low dropout regulator includes an operational amplifier, a first resistor and a second resistor, wherein a non-inverting terminal of the operational amplifier receives the adjustable control voltage, an inverting terminal of the operational amplifier is connected to a second terminal of the first resistor and a first terminal of the second resistor, the first terminal of the first resistor is connected to an output terminal of the operational amplifier for providing the bias voltage, and the second terminal of the second resistor is grounded.

Optionally, the low dropout regulator includes an operational amplifier, a first resistor, a second resistor, a first switch and a second switch, wherein a non-inverting terminal of the operational amplifier receives the adjustable control voltage, an inverting terminal of the operational amplifier is connected to a second terminal of the first resistor and a first terminal of the second resistor, a first terminal of the first resistor is connected to an output terminal of the operational amplifier for providing the bias voltage, a second terminal of the second resistor is grounded, a first terminal of the first switch is connected to the power supply voltage, a second terminal of the first switch is connected to the output terminal of the operational amplifier, a first terminal of the second switch is connected to the output terminal of the operational amplifier, and a second terminal of the second switch is connected to ground.

Optionally, the bias unit provides a bias current to the at least one drive unit, the bias current comprising a first bias current and a second bias current provided to a first variable current source and a second variable current source of the drive unit, respectively, wherein at least one of the first bias current and the second bias current is continuously adjustable.

Optionally, the bias unit provides bias currents to each of the driving units, respectively, the bias currents comprising a first bias current and a second bias current provided to a first variable current source and a second variable current source of each of the driving units, respectively, wherein at least one of the first bias currents is continuously adjustable and at least one of the second bias currents is continuously adjustable.

Optionally, the control current provided to the bias unit is regulated by a current mirror.

Optionally, the bias unit includes a MOS transistor, an input terminal of which receives the adjustable control current, and an output terminal of which is connected to the first variable current source or the second variable current source.

Optionally, the bias unit includes a second PMOS transistor and a second NMOS transistor, an input end of the second PMOS transistor receives the adjustable first control current, and an output end of the second PMOS transistor is connected to the first variable current source, and an input end of the second NMOS transistor receives the adjustable second control current, and an output end of the second NMOS transistor is connected to the second variable current source.

The embodiment of the present invention further provides a method for reducing electromagnetic interference by the control circuit, including: receiving a bias voltage or a bias current; receiving a control signal; receiving a second voltage; a third voltage is output based on the control signal, the bias voltage or bias current, and the second voltage.

Optionally, outputting the third voltage based on the control signal, the bias voltage or the bias current, and the second voltage comprises: determining a first voltage based on the control signal, the bias voltage, or the bias current; controlling the opening or closing time of the plurality of switching tubes based on the first voltage; controlling a rate of change of the voltage across the flying capacitor based on the time of opening or closing of the plurality of switching tubes and the second voltage; and outputting the third voltage.

Compared with the prior art, the technical scheme of the embodiment of the invention can reduce the electromagnetic interference generated by the flying capacitor in the charging and discharging processes, does not influence the driving capability of the charge pump, and simultaneously reduces the area of the control circuit.

Drawings

FIG. 1 is a schematic diagram of a boosting unit in the prior art;

FIG. 2 is a schematic diagram of a control circuit according to an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a driving unit according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of a control circuit including a voltage control type bias unit in the embodiment of the present invention;

fig. 5 is a schematic structural diagram of a control circuit including a current-controlled bias unit in the embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a continuously adjustable bias unit according to an embodiment of the present invention;

fig. 7 and 8 are schematic structural diagrams of a discretely adjustable bias unit in an embodiment of the present invention, which respectively show structures for generating bias signals BP and BN;

FIG. 9 is a schematic diagram of a configuration of continuously and discretely adjustable bias units in an embodiment of the invention;

FIG. 10 is a flow chart of a method of reducing EMI in an embodiment of the present invention.

Detailed Description

The switching tube of the charge pump or the boosting unit has switching frequency fs, and the flying capacitor can complete one-time charging and discharging process in one period (1/fs); the voltage at the flying capacitor is ideally a square wave, and according to equation (1), very large transient current pulses are generated at the rising and falling edges of the square wave, which may cause electromagnetic interference to the relevant elements in the electronic device.

I＝C*dV/dt (1)

Where I, C and V are the current, capacitance and voltage parameters of the flying capacitor, respectively.

The frequency spectrum of the transient current pulse is distributed at the frequency point of M & ltfs & gt (M is an integer greater than or equal to 1). For example, for a switching frequency fs in the operating range of 1KHz to 1MHz, the corresponding frequency spectrum may generate strong electromagnetic interference to electronic devices, especially components operating in the low-intermediate frequency portion thereof.

In an embodiment of the present invention, the control circuit includes a bias unit and a driving unit, the bias unit may generate a bias voltage or a bias current, the driving unit may receive a control signal, the bias voltage or the bias current, and output a first voltage for controlling the plurality of switching tubes to be opened or closed, and the plurality of switching tubes are connected to the flying capacitor, and the opening or closing of the plurality of switching tubes (e.g., the time Δ t for opening or closing thereof) may be controlled by changing a change rate (e.g., a rising voltage change rate, a falling voltage change rate) of the first voltage to adjust a change rate (i.e., dV/dt) of the voltage of the flying capacitor during charging or discharging, so that electromagnetic interference generated thereby may be selectively reduced.

In the embodiment of the invention, the voltage change rate of the flying capacitor in the charging or discharging process can be reduced without reducing the size of the switching tubes or reducing the number of the switching tubes, and the electromagnetic interference generated by the flying capacitor can be reduced, because the driving capability of the switching tubes is reduced in this way, the output voltage of the charge pump is reduced; the change rate of the voltage of the flying capacitor in the charging or discharging process can be adjusted through the biasing unit and the driving unit, so that the electromagnetic interference generated by the flying capacitor is selectively reduced, wherein the size of the switching tube or the number of the switching tubes is not reduced, and the driving capability of the switching tube and the output voltage of the charge pump are not reduced.

In the embodiment of the present invention, the rate of change of the voltage of the flying capacitor during the charging or discharging process can be adjusted without driving each of the plurality of switching tubes by the plurality of driving units, which can reduce the electromagnetic interference generated thereby because this manner employs a plurality of driving units for each switching tube, increasing the area of the driving unit or the driving circuit; the change rate of the voltage of the flying capacitor in the charging or discharging process can be adjusted through the biasing unit and the driving units, so that the electromagnetic interference generated by the flying capacitor can be selectively reduced, wherein each driving unit drives at least one switching tube instead of a plurality of driving units driving one switching tube, so that the number of the driving units can be reduced, and the area of a control circuit can be reduced.

In an embodiment of the present invention, a plurality of bias units may not be provided to supply bias voltages or bias currents to a plurality of driving units, respectively; instead, only one bias unit may be provided, which provides bias voltages or bias currents to the plurality of driving units, respectively, so that the number of bias units may be reduced, and thus the area of the control circuit may be reduced.

In embodiments of the present invention, the bias voltage or bias current may be adjusted not only discretely, but also continuously. The change rate of the voltage of the flying capacitor in the charging or discharging process can be adjusted to a more accurate value by discretely adjusting the bias voltage or the bias current, so that the electromagnetic interference generated by high change rate can be avoided, and the performance reduction caused by small change rate can be avoided; the change rate of the voltage of the flying capacitor in the charging or discharging process can be adjusted to an accurate numerical value by continuously adjusting the bias voltage or the bias current, so that the requirements of reducing the electromagnetic interference and the performance reduction of the charge pump can be more effectively met, namely, the problem of strong electromagnetic interference caused by large voltage change rate of the flying capacitor is solved, and the problem of slow charging and discharging of the flying capacitor and performance reduction of the charge pump caused by small voltage change rate of the flying capacitor is solved.

In the description of the present invention, components having the same name have the same or similar functions, positional relationships, and connection relationships; signals having the same or similar labels have the same or similar functions, transmitting means and receiving means.

In order to make the above objects, features and advantages of the embodiments of the present invention more comprehensible, specific embodiments accompanied with figures are described in detail below.

Fig. 2 illustrates a control circuit for reducing electromagnetic interference in an embodiment of the present invention. The control circuit 100 includes a bias unit 110, a driving unit 120, a plurality of switching tubes 130, and a flying capacitor 140.

The control circuit 100 may be disposed within an electronic device.

Specifically, the electronic device may be a device including a display panel (e.g., a liquid crystal display panel), for example, a mobile terminal device such as a mobile phone, a notebook computer, a tablet computer, and the like. The driving chip of the display panel may include the control circuit 100.

The bias unit 110 may generate a bias signal, which may be a bias voltage or a bias current; the driving unit 120 is coupled to the bias unit 110 to receive the bias signal, and the driving unit 120 may also receive a control signal.

The bias signal may change the bias operating point of the driving unit 120, and thus the driving capability of the boost unit of the charge pump (i.e., change the first voltage output by the boost unit).

The bias signals may include bias signals BP and BN respectively provided to PMOS transistors and NMOS transistors in the driving unit 120. The driving unit 120 may include a plurality of driving units, such as a plurality of driving units 1, … …, a plurality of driving units N (N is an integer greater than or equal to 1) shown in fig. 2. The bias signals may include bias signals BP1, BP2, … …, BPN respectively provided to PMOS transistors in each drive unit, and bias signals BN1, BN2, … …, BNN respectively provided to NMOS transistors in each drive unit.

In the embodiment of the present invention, a bias signal may not be separately provided to each of the driving units 120 through a plurality of bias units, but only one bias unit may be provided, which separately provides a bias voltage to each driving unit, thereby reducing the area of the control circuit 100.

The first end of each of the plurality of switching tubes 130 is connected to the flying capacitor 140, wherein the second end of some of the switching tubes may input a second voltage, and the second end of at least one of the other switching tubes may output a third voltage. The voltage change rate of the flying capacitor 140 can be controlled by the plurality of switch tubes 130, and the opening or closing of each switch tube (e.g., the opening or closing time Δ t) of the plurality of switch tubes 130 can be controlled by the first voltage output by the driving unit 120.

Each of the driving units 120 drives at least one switching tube. As shown in fig. 2, each driving unit may correspond to only one switching tube. The number of the driving units 1 may be multiple, and the output voltage of each driving unit 1 drives one switching tube, for example, the output voltage of a first driving unit 1 may drive the switching tube M11, and the output voltage of a second driving unit 1 may drive the switching tube M12; the output voltages of the plurality of driving units 1 may drive the switching tubes M11, … …, M1i, respectively (i is an integer greater than or equal to 1). The number of the driving units N may be multiple, and the output voltage of each driving unit N drives one switching tube, for example, the output voltage of a first driving unit N may drive the switching tube MN1, and the output voltage of a second driving unit N may drive the switching tube MN 2; the output voltages of the plurality of driving units N can drive the switching tubes MN1, … …, MNj, respectively (j is an integer greater than or equal to 1).

In some embodiments, the plurality of switching tubes 130 and the flying capacitor 140 may form one boost unit. For example, the boost unit may include a switch transistor M11, a switch transistor M12, a switch transistor M21, a switch transistor M22, and a flying capacitor 140. The boost unit needs two driving units 1 to drive the switch tube M11 and the switch tube M12 respectively, and two driving units 2 to drive the switch tube M21 and the switch tube M22 respectively. If a plurality of stages of boosting are required, a plurality of boosting units are required, and a corresponding number of driving

units

1, 2, …, and N need to be arranged. The combination of multiple boost units may form a charge pump with a certain driving capability.

The opening or closing of each of the plurality of switching tubes 130 (e.g., the opening or closing time Δ t thereof) may be controlled by the first voltage output by the driving unit 120.

During the charging process of the flying capacitor 140, a part of the switching tubes may be turned on, so that the second voltage charges the flying capacitor 140; during the discharging process of the flying capacitor 140, a part of the switching tubes and at least one switching tube may be opened, so that the second voltage and the flying capacitor 140 are connected in series to output a third voltage.

Fig. 3 illustrates one of the driving units 120. The driving

units

200 and 250 comprise a first variable current source 201, a second variable current source 202, a first PMOS transistor 203, a first NMOS transistor 204, input terminals VIN, VIN1, VIN2 and an output terminal VOUT; the first variable current source 201 and the second variable current source 202 are respectively regulated by bias signals BP and BN, an input terminal VIN is configured to receive a control signal, and an output terminal VOUT is configured to output a first voltage.

In some embodiments, as shown in fig. 3a, the gates of the first PMOS transistor 203 and the first NMOS transistor 204 may be connected to the input terminal VIN.

In other embodiments, as shown in fig. 3b, the gates of the first PMOS transistor 203 and the first NMOS transistor 204 may be connected to the first input terminal VIN1 and the second input terminal VIN2, respectively.

The gates of the first PMOS transistor 201 and the first NMOS transistor 202 are both connected to the input terminal VIN to receive the control signal, the drains of the first PMOS transistor 201 and the first NMOS transistor 202 are both connected to the output terminal VOUT to output the first voltage, and the sources of the first PMOS transistor and the first NMOS transistor 202 are connected to the power voltage VDD and the ground through the first variable current source 201 and the second variable current source 202, respectively.

In a specific implementation, the control signal or the bias signal can be continuously or discretely adjusted to change the change rate of the first voltage (for example, to reduce the rising slope and/or the falling slope of the first voltage) so as to control the opening or closing of the switching tube (for example, the opening or closing time Δ t), so that the change rate of the voltage of the flying capacitor in the charging or discharging process can be adjusted (for example, the change rate dV/dt of the voltage is reduced), and the electromagnetic interference generated by the flying capacitor can be reduced.

The discretely adjusting bias signal may be discretely adjusting bias voltages such that the bias voltages are 1, 2, … …, and 2 of a certain voltage^KIn addition, the bias currents may be adjusted discretely so that the bias currents are 1, 2, … …, and 2 of a certain current^KDoubling; wherein K is an integer greater than 1.

Fig. 4 illustrates a specific control circuit. The control circuit 300 includes a bias unit 310 and a driving unit 320 of a voltage control type, and further includes a plurality of switching tubes and flying capacitors (not shown).

The bias unit 310 includes Low Dropout regulators (LDOs) 311, 312, whose input terminals receive adjustable control voltages VBP, VBN and output terminals provide bias signals BP, BN; the bias signals BP and BN are signals respectively provided to the PMOS transistor and the NMOS transistor of the driving unit 320, and the control voltages VBP and VBN are signals respectively adjusting the bias signals BP and BN.

As shown in fig. 4, the low dropout

linear regulators

311, 312 comprise operational amplifiers, the non-inverting terminals of which receive the adjustable control voltages VBP, VBN, respectively, and the inverting terminals of which are connected to the output terminals of the operational amplifiers, respectively, and the output terminals of which provide the bias signals BP, BN.

The driving unit 320 includes a first variable current source 321 and a second variable current source 322, which may be respectively illustrated as a PMOS transistor and an NMOS transistor in fig. 4. Similar to the first variable current source 201 and the second variable current source 202 shown in fig. 3, the first variable current source 321 and the second variable current source 322 each receive a bias signal.

Specifically, the first variable current source 321 and the second variable current source 322 are connected to the output terminals of the low dropout

linear regulators

311, 312 to receive the bias signals BP, BN.

In the example of fig. 4, the control voltages VBP, VBN include a first control voltage VBP and a second control voltage VBN; the bias signal is a bias voltage including a first bias voltage BP and a second bias voltage BN respectively provided to the first variable current source 321 and the second variable current source 322.

In a specific implementation, the bias unit 310 includes a first low dropout regulator 311 and a second low dropout regulator 312, an input terminal of the first low dropout regulator 311 receives the adjustable first control voltage VBP, an output terminal of the first low dropout regulator is connected to the first variable current source 321 of the driving unit to output the first bias voltage BP, an input terminal of the second low dropout regulator 312 receives the adjustable second control voltage VBN, and an output terminal of the second low dropout regulator is connected to the second variable current source 322 to output the second bias voltage BN.

The bias unit 310 may provide a bias voltage to at least one of the plurality of driving units. As shown in fig. 4, the bias voltage includes a first bias voltage BP and a second bias voltage BN respectively provided to the first variable current source 321 and the second variable current source 322.

The bias unit 310 may, for example, continuously vary at least one of the first control voltage VBP and the second control voltage VBN to make a corresponding one of the first bias voltage BP and the second bias voltage BN continuously adjustable, which may enable a change rate of the first voltage output by the driving unit 320 to be adjusted, for example, to control the opening or closing of the switching tube (e.g., the time Δ t for opening or closing thereof) by reducing a rising slope and/or a falling slope of the first voltage, so as to adjust a change rate of the voltage of the flying capacitor during the charging or discharging process (e.g., to reduce the change rate dV/dt of the voltage), and thus may reduce the electromagnetic interference generated by the flying capacitor.

The bias unit 310 may also provide a bias voltage to each of the plurality of driving units, respectively. The bias voltage includes a plurality of first bias voltages BP and a plurality of second bias voltages BN respectively provided to the first variable current source and the second variable current source in each driving unit.

The bias unit 310 may, for example, continuously change at least one of the first control voltages VBP and at least one of the second control voltages VBN to continuously adjust a corresponding one of the first bias voltages BP and a corresponding one of the second bias voltages BN, so that a rate of change of the first voltage output by the driving unit 320 may be adjusted, for example, by reducing a rising slope and/or a falling slope of the first voltage to control opening or closing of the switching tube (e.g., an opening or closing time Δ t thereof), so as to adjust a rate of change of the voltage of the flying capacitor during charging or discharging (e.g., reduce a rate of change dV/dt of the voltage), thereby reducing electromagnetic interference generated by the flying capacitor.

One or more of the control voltages VBP, VBN may be used to adjust not only the bias voltages BP, BN, but also the Slew Rate (Slew Rate, SR) of the operational amplifiers in the low dropout

linear regulators

311, 312 to meet specific operational requirements.

Fig. 5 illustrates another specific control circuit. The control circuit 400 includes a bias unit 410 and a driving unit 420 of a current control type, and further includes a plurality of switching tubes and flying capacitors (not shown).

The bias unit 410 includes MOS transistors 411 and 412, whose input terminals receive adjustable control currents IBP and IBN, and output terminals provide bias signals BP and BN; the bias signals BP and BN are signals respectively provided to the PMOS transistor and the NMOS transistor of the driving unit 420, and the control currents IBP and IBN are signals respectively adjusting the bias signals BP and BN.

The driving unit 420 includes a first variable current source 421 and a second variable current source 422, as shown in the PMOS transistor and the NMOS transistor in the driving unit 420 in fig. 5. Similar to the first variable current source 201 and the second variable current source 202 shown in fig. 3, the first variable current source 421 and the second variable current source 422 each receive a bias signal.

Specifically, the first variable current source 421 and the second variable current source 422 are both connected to the output ends (gate ends) of the MOS transistors 411 and 412 to receive the bias signals BP and BN.

In the embodiment of fig. 5, the control currents IBP, IBN are control currents, which include a first control current IBP and a second control current IBN; the bias signal is a bias current including a first bias current BP and a second bias current BN respectively provided to the first variable current source 421 and the second variable current source 422.

In a specific implementation, the control currents IBP, IBN may be regulated by a current mirror, e.g., by adjusting the control currents IBP, IBN of its output by the input current of the current mirror.

In a specific implementation, the bias unit 410 includes a PMOS transistor 411 and an NMOS transistor 412, the PMOS transistor 411 has an input end receiving the adjustable first control current IBP, and an output end connected to the first variable current source 421 to output the first bias current BP, the NMOS transistor 412 has an input end receiving the adjustable second control current IBN, and an output end connected to the second variable current source 422 to output the second bias current BN.

The bias unit 410 may provide a bias current to at least one of the plurality of driving units. As shown in fig. 5, the bias current includes a first bias current BP and a second bias current BN respectively provided to the first variable current source 421 and the second variable current source 422.

The bias unit 410 may, for example, continuously vary at least one of the first control current IBP and the second control current IBN to continuously adjust a corresponding one of the first bias current BP and the second bias current BN, so that a rate of change of the first voltage output by the driving unit 420 may be adjusted, for example, by reducing a rising slope and/or a falling slope of the first voltage to control opening or closing of the switching tube (e.g., a time Δ t of opening or closing thereof), so as to adjust a rate of change of the voltage of the flying capacitor during charging or discharging (e.g., reduce a rate of change dV/dt of the voltage), thereby reducing electromagnetic interference generated by the flying capacitor.

The bias unit 410 may also provide a bias current to each of the plurality of driving units, respectively. The bias current includes a plurality of first bias currents BP and a plurality of second bias currents BN respectively provided to the first variable current source and the second variable current source in each of the driving units.

The bias unit 410 may, for example, continuously vary at least one of the first control currents IBP and at least one of the second control currents IBN to continuously adjust a corresponding one of the first bias currents BP and a corresponding one of the second bias currents BN, so that a rate of change of the first voltage output by the driving unit 420 may be adjusted, for example, by reducing a rising slope and/or a falling slope of the first voltage to control opening or closing of the switching tube (e.g., an opening or closing time Δ t thereof), so as to adjust a rate of change of the voltage of the flying capacitor during charging or discharging (e.g., reduce a rate of change dV/dt of the voltage), thereby reducing electromagnetic interference generated by the flying capacitor.

The following description is given in conjunction with specific embodiments.

In the first embodiment, as shown in fig. 6, the bias unit 500 includes a low dropout regulator including an operational amplifier 510, a first resistor (R1)521, and a second resistor (R2) 522.

The operational amplifier 510 may be of the type A, B or AB, and has an in-phase terminal receiving the adjustable control voltages VBP and VBN, an inverted terminal connected to the second terminal of the first resistor 521 and the first terminal of the second resistor 522, the first terminal of the first resistor 521 connected to the output terminal of the operational amplifier 510 for providing the bias voltages BP and BN, and the second terminal of the second resistor 522 connected to ground.

The bias voltages BP, BN can be calculated by the following equations:

BP＝VBP*(1+R1/R2) (2)

BN＝VBN*(1+R1/R2) (3)

according to equation (2), the bias voltage BP can be continuously adjusted by any combination of the control voltage VBP, the first resistor 521, and the second resistor 522.

Similarly, the bias voltage BN can be continuously adjusted by any combination of the control voltage VBN, the first resistor 521 and the second resistor 522 according to equation (3).

By continuously adjusting the bias voltages BP and BN, the rate of change of the first voltage output by the driving unit can be adjusted, for example, by decreasing the rising slope and/or the falling slope of the first voltage to control the opening or closing of the switching tube (e.g., the time Δ t of the opening or closing), so that the rate of change of the voltage of the flying capacitor during the charging or discharging process can be adjusted (e.g., the rate of change dV/dt of the voltage is decreased), and the electromagnetic interference generated by the flying capacitor can be reduced.

By continuously adjusting the bias voltages BP and BN, the change rate of the voltage of the flying capacitor in the charging or discharging process can be adjusted to an accurate value, so that the requirements of reducing the electromagnetic interference and the performance reduction of the charge pump can be more effectively met, namely, the problem of strong electromagnetic interference caused by large voltage change rate of the flying capacitor is solved, and the problem of slow charging and discharging of the flying capacitor and the performance reduction of the charge pump caused by small voltage change rate of the flying capacitor is solved.

In a second embodiment, as shown in fig. 7 and 8, the bias unit 600 comprises at least one switch, the input terminal of which receives a control voltage or a control current, respectively, and the output terminal of which is connected to the driving unit.

The bias unit 600 may be a voltage control type bias unit.

The bias unit 600 may include at least one switch SW11, SW21, … …, SWN1, the input terminals of which may receive control voltages VBP _1, VBP _2, … …, VBP _ N, respectively, and the on and off of which may be controlled by a timing control circuit or a digital register such that one of the switches is closed and the remaining switches are open, thereby providing the control voltage to the output terminal as the bias voltage BP of the PMOS transistor in the driving unit.

The control voltages VBP _1, VBP _2, … …, VBP _ N can be 1, 2, … …, 2 of a certain voltage^KMultiple (K is large)An integer at 1) so that the bias voltage BP can be discretely adjusted.

The bias unit 600 further includes at least one switch SW12, SW22, … …, and SWN2, the input terminals of which can receive control voltages VBN _1, VBN _2, … …, and VBN _ N, respectively, and the on and off of which can be controlled by a timing control circuit or a digital register, such that one of the switches is closed and the other switches are open, thereby providing the control voltage to the output terminal as the bias voltage BN of the NMOS transistor in the driving unit.

The control voltages VBN _1, VBN _2, … …, and VBN _ N may be 1, 2, … …, and 2 of a certain voltage^KMultiple (K is an integer greater than 1) so that the bias voltage BN can be discretely adjusted.

Since the control voltages VBP _1, VBP _2, … …, VBP _ N may be unequal to each other, discrete adjustment of the bias voltage BP may be achieved; since the control voltages VBN _1, VBN _2, … …, VBN _ N may be unequal to each other, a discrete adjustment of the bias voltage BN may be achieved.

The bias unit 600 may also be a current control type bias unit.

The bias unit 600 includes at least one switch SW11, SW21, … …, and SWN1, the input terminals of which can receive control currents IBP _1, IBP _2, … …, and IBP _ N, respectively, and the on and off of which can be controlled by a timing control circuit or a digital register, such that one of the switches is closed and the other switches are open, thereby providing the control current to the output terminal as the bias current BP for driving the PMOS transistor in the unit.

The control currents IBP _1, IBP _2, … … and IBP _ N may be 1, 2, … … and 2 of a certain current^KMultiple (K is an integer greater than 1) so that the bias current BP can be discretely adjusted.

The bias unit 600 further includes at least one switch SW12, SW22, … …, and SWN2, the input terminals of which can receive control currents IBN _1, IBN _2, … …, and IBN _ N, respectively, and the on and off of which can be controlled by a timing control circuit or a digital register, such that one of the switches is closed and the other switches are open, thereby providing the control current to the output terminal as the bias current BN driving the NMOS transistor in the unit.

The control currents IBN _1, IBN _2, … … and IBN _ N may be 1, 2, … … and 2 of a certain current^KMultiple (K is an integer greater than 1) so that the bias current BN can be discretely adjusted.

Since the control currents IBP _1, IBP _2, … …, IBP _ N may be unequal to each other, a discrete adjustment of the bias current BP may be achieved; since the control currents IBN _1, IBN _2, … …, IBN _ N may not be equal to each other, a discrete adjustment of the bias current BN may be achieved.

By discretely adjusting the bias voltage or the bias current BP, BN, the rate of change of the first voltage output by the driving unit can be adjusted, for example, by decreasing the rising slope and/or the falling slope of the first voltage to control the opening or closing of the switching tube (e.g., the opening or closing time Δ t), so that the rate of change of the voltage of the flying capacitor during the charging or discharging process can be adjusted (e.g., the rate of change dV/dt of the voltage is decreased), and the electromagnetic interference generated by the flying capacitor can be reduced.

In the third embodiment, as shown in fig. 9, the bias unit 700 includes a low dropout regulator including an operational amplifier 710, a first resistor (R1)711 and a second resistor (R2)712, a first switch 721 and a second switch 722.

The operational amplifier 710 may be of the type A, B or AB, with its non-inverting terminal receiving the adjustable control voltages VBP, VBN, its inverting terminal connected to the second terminal of the first resistor 711 and the first terminal of the second resistor 712, the first terminal of the first resistor 711 connected to the output terminal of the operational amplifier 710 for providing the bias voltages BP, BN, and the second terminal of the second resistor 712 connected to ground.

The first switch 721 has a first terminal connected to the power supply voltage VDD, a second terminal connected to the output terminal of the operational amplifier 710, a first terminal connected to the output terminal of the operational amplifier 710, and a second terminal connected to ground.

In case one, the first switch 721 and the second switch 722 are both off, the bias voltages BP, BN can be calculated by the following equations:

BP＝VBP*(1+R1/R2) (4)

BN＝VBN*(1+R1/R2) (5)

according to equation (4), the bias voltage BP can be continuously adjusted by any combination of the control voltage VBP, the first resistor 711, and the second resistor 712.

Similarly, the bias voltage BN can be continuously adjusted by any combination of the control voltage VBN, the first resistor 711 and the second resistor 712 according to equation (5).

In case two, the first switch 721 is closed and the second switch 722 is open, the bias voltages BP, BN are connected to the supply voltage VDD, which is VDD.

In case three, the first switch 721 is open and the second switch 722 is closed, the bias voltages BP, BN are connected to ground, which is zero in magnitude.

According to the cases one to three, the bias voltages BP, BN can be discretely adjusted to VDD, zero, and voltages as calculated by the equations (4) and (5).

By discretely adjusting the bias voltages BP and BN, the rate of change of the first voltage output by the driving unit can be adjusted, for example, by reducing the rising slope and/or the falling slope of the first voltage to control the opening or closing of the switching tube (e.g., the opening or closing time Δ t), so that the rate of change of the voltage of the flying capacitor during the charging or discharging process can be adjusted (e.g., the rate of change dV/dt of the voltage is reduced), and the electromagnetic interference generated by the flying capacitor can be reduced.

According to case one, the bias voltages BP, BN can be continuously adjusted as calculated by equations (4) and (5).

Although only two

switches

721, 722 are shown in the third embodiment, each connected to a supply voltage VDD and ground, it should be understood that in other embodiments, multiple switches, each connected to a different voltage, may be included.

Specifically, when the switches are all off, the bias voltages BP and BN can be calculated by equations (4) and (5), thereby realizing continuous adjustment of the bias voltages BP and BN; when one of the switches is closed and the remaining switches are open, the bias voltages BP, BN are equal to the voltage to which the one switch is connected, thereby enabling discrete adjustment of the bias voltages BP, BN.

Fig. 10 is a flow chart of a method for reducing emi in an embodiment of the invention. The method 800 comprises:

step 810, receiving a bias voltage or a bias current;

step 820, receiving a control signal;

step 830, receiving a second voltage;

in step 840, a third voltage is output based on the control signal, the bias voltage or bias current, and the second voltage.

In the execution of step 810, the driving unit may receive a bias voltage or a bias current generated by the bias unit.

In a specific implementation, the driving unit may include a first variable current source and a second variable current source that receive a bias voltage or a bias current, respectively.

In the performance of step 820, the drive unit may receive a control signal.

In a specific implementation, the drive unit may comprise an input which receives the control signal.

In the execution of step 830, some of the plurality of switching tubes may receive the second voltage.

In specific implementation, during the charging process of the flying capacitor, part of the switching tubes can be opened, so that the second voltage charges the flying capacitor; during the discharge of the flying capacitor, part of the switching tubes and at least one of the switching tubes may be opened so that the second voltage is connected in series with the flying capacitor 140 to provide the output voltage to the output terminal.

In the execution of step 840, the driving unit may output a first voltage based on the control signal, the bias voltage or the bias current received by the driving unit, wherein the first voltage is used for controlling the opening or closing of the plurality of switching tubes (e.g., the time Δ t for opening or closing thereof); some of the plurality of switching tubes input the second voltage, and at least one of the plurality of switching tubes may output a third voltage based on the first voltage and the second voltage.

In a specific implementation, the third voltage may be output based on the time of opening or closing of the plurality of switching tubes controlled by the first voltage, and based on the time of opening or closing of the plurality of switching tubes and the rate of change of the voltage across the second voltage control flying capacitor.

In a specific implementation, the change rate of the first voltage may be changed (e.g., a rising slope and/or a falling slope of the first voltage is decreased) to control the opening or closing of the plurality of switching tubes, so that the change rate of the voltage of the flying capacitor during the charging or discharging process may be adjusted (e.g., the change rate dV/dt of the voltage is decreased), and thus the electromagnetic interference generated by the flying capacitor may be reduced.

The method for reducing electromagnetic interference in the embodiment of the present invention may be implemented based on the control circuit described above with reference to fig. 2 to 9, and therefore, the execution of each step in the method and the relationship between them may also refer to the description about the control circuit, which is not described herein again.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A control circuit for reducing electromagnetic interference, comprising:

a biasing unit; a drive unit; a plurality of switching tubes; and a flying capacitor;

the driving unit is coupled to the biasing unit;

the first ends of the switch tubes are connected with the flying capacitor;

the bias unit is suitable for generating a bias voltage or a bias current;

the driving unit is suitable for receiving a control signal, the bias voltage or the bias current and outputting a first voltage, wherein the first voltage is used for controlling the opening or closing of the plurality of switching tubes;

the second ends of part of the switch tubes in the plurality of switch tubes are suitable for inputting a second voltage;

the second end of at least one of the plurality of switching tubes is adapted to output a third voltage.

2. The control circuit of claim 1, wherein the bias unit comprises at least one bias unit, wherein the drive unit comprises a plurality of drive units, and wherein the at least one bias unit provides the bias voltage or the bias current to the plurality of drive units.

3. The control circuit of claim 1, wherein the bias voltage or the bias current is continuously adjustable and/or discretely adjustable.

4. The control circuit of claim 1, wherein the bias unit comprises at least one switch, an input terminal of the at least one switch receives a control voltage or a control current, respectively, and an output terminal of the at least one switch is connected to the driving unit.

5. The control circuit of claim 1, wherein a rate of change of voltage of the rise or fall of the first voltage is controllable.

6. The control circuit of claim 1, wherein a rate of change of voltage acting on the flying capacitor is controllable by the plurality of switching tubes.

7. The control circuit of claim 1, wherein the driving unit comprises a plurality of driving units, each driving unit of the plurality of driving units driving at least one switching tube.

8. The control circuit of claim 7, wherein at least one of the plurality of driving units comprises a first PMOS transistor, a first NMOS transistor, a first variable current source, a second variable current source, an input terminal, and an output terminal; the input end is used for receiving the control signal; the output end is used for outputting the first voltage.

9. The control circuit of claim 8, wherein the gates of the first PMOS transistor and the first NMOS transistor are connected to the input terminal for receiving the control signal, the drains of the first PMOS transistor and the first NMOS transistor are connected to the output terminal for outputting the first voltage, the source of the first PMOS transistor is connected to a power supply voltage through the first variable current source, and the source of the first NMOS transistor is connected to ground through the second variable current source.

10. The control circuit of claim 8, wherein the bias unit provides the bias voltage to the at least one driving unit, the bias voltage comprising a first bias voltage and a second bias voltage provided to the first variable current source and the second variable current source, respectively; wherein at least one of the first bias voltage and the second bias voltage is continuously adjustable.

11. The control circuit of claim 10, wherein the bias unit provides the bias voltage to each of the driver units, the bias voltage comprising the first bias voltage and the second bias voltage provided to the first variable current source and the second variable current source of each of the driver units, respectively; wherein at least one of the first bias voltages is continuously adjustable and at least one of the second bias voltages is continuously adjustable.

12. The control circuit of claim 10, wherein the bias unit comprises a low dropout regulator having an input receiving an adjustable control voltage and an output connected to the first variable current source or the second variable current source.

13. The control circuit of claim 10, wherein the bias unit comprises a first low dropout regulator and a second low dropout regulator, wherein an input of the first low dropout regulator receives an adjustable first control voltage, and an output of the first low dropout regulator is connected to the first variable current source of the driving unit, and an input of the second low dropout regulator receives an adjustable second control voltage, and an output of the second low dropout regulator is connected to the second variable current source.

14. The control circuit of claim 12, wherein the low dropout regulator comprises an operational amplifier, a first resistor and a second resistor, wherein a non-inverting terminal of the operational amplifier receives the adjustable control voltage, an inverting terminal of the operational amplifier is connected to a second terminal of the first resistor and a first terminal of the second resistor, a first terminal of the first resistor is connected to an output terminal of the operational amplifier for providing the bias voltage, and a second terminal of the second resistor is connected to ground.

15. The control circuit of claim 12, wherein the low dropout regulator comprises an operational amplifier, a first resistor, a second resistor, a first switch and a second switch, wherein a non-inverting terminal of the operational amplifier receives an adjustable control voltage, an inverting terminal of the operational amplifier is connected to a second terminal of the first resistor and a first terminal of the second resistor, a first terminal of the first resistor is connected to an output terminal of the operational amplifier for providing the bias voltage, a second terminal of the second resistor is grounded, a first terminal of the first switch is connected to a power supply voltage, a second terminal of the first switch is connected to an output terminal of the operational amplifier, and a first terminal of the second switch is connected to an output terminal of the operational amplifier and a second terminal of the second switch is connected to ground.

16. The control circuit of claim 8, wherein the bias unit provides the bias current to the at least one driver unit, the bias current comprising a first bias current and a second bias current provided to the first variable current source and the second variable current source of the driver unit, respectively, wherein at least one of the first bias current and the second bias current is continuously adjustable.

17. The control circuit of claim 16, wherein the bias unit provides the bias current to each of the driver units, respectively, the bias current comprising the first bias current and the second bias current provided to the first variable current source and the second variable current source of each of the driver units, respectively, wherein at least one of the first bias current is continuously adjustable and at least one of the second bias current is continuously adjustable.

18. The control circuit of claim 16, wherein the control current provided to the bias unit is regulated by a current mirror.

19. The control circuit of claim 16, wherein the bias unit comprises a MOS transistor having an input terminal receiving the adjustable control current and an output terminal connected to the first variable current source or the second variable current source.

20. The control circuit of claim 16, wherein the bias unit comprises a second PMOS transistor and a second NMOS transistor, wherein an input terminal of the second PMOS transistor receives the adjustable first control current, and an output terminal of the second PMOS transistor is connected to the first variable current source, and an input terminal of the second NMOS transistor receives the adjustable second control current, and an output terminal of the second NMOS transistor is connected to the second variable current source.

21. A method of reducing electromagnetic interference by a control circuit according to any of claims 1 to 20, comprising:

receiving the bias voltage or the bias current;

receiving the control signal;

receiving the second voltage;

outputting the third voltage based on the control signal, the bias voltage or the bias current, and the second voltage.

22. The method of claim 21, wherein outputting the third voltage based on the control signal, the bias voltage or the bias current, and the second voltage comprises:

determining the first voltage based on the control signal, the bias voltage, or the bias current;

controlling the opening or closing time of the plurality of switching tubes based on the first voltage;

controlling a rate of change of voltage on the flying capacitor based on the time of opening or closing of the plurality of switching tubes and the second voltage;

and outputting the third voltage.