CN122000705A - Dual-circular polarization flat-panel array antenna and processing method thereof - Google Patents

Abstract

The invention discloses a dual-circular polarized flat panel array antenna and a processing method thereof, which relate to the field of flat panel array antennas and are used for realizing miniaturization, low-cost design and processing of the dual-circular polarized flat panel array antenna. In the dual-circular polarization flat panel array antenna, a radiation unit array is connected with an input port array of a dual-circular polarizer array, a first output port array of the dual-circular polarizer array is respectively connected with each output port of a first sealed microstrip power division network, a second output port array of the circular polarizer array is respectively connected with each output port of a second sealed microstrip power division network so as to realize conversion from a waveguide to a microstrip line, and a public port of the first sealed microstrip power division network and a public port of the second sealed microstrip power division network are respectively connected with a waveguide port so as to realize conversion from the microstrip line to the waveguide. The invention has the characteristics of low cost, miniaturization, convenient assembly and the like.

Description

Dual-circular polarization flat-panel array antenna and processing method thereof

Technical Field

The invention relates to the technical field of flat panel array antennas, in particular to a dual circularly polarized flat panel array antenna and a processing method thereof.

Background

In the design of the planar antenna, the dual-polarization high-frequency planar antenna usually adopts a waveguide horn array, and the dual-circular polarization array antenna usually uses a partition plate type circular polarizer to cooperate with a waveguide network to process a broadband dual-circular polarization array, wherein the waveguide network mainly uses the bandwidth of a ridge waveguide network to be the widest.

The planar antenna is thicker due to the complete adoption of the waveguide network structure, and basically can be manufactured only by a milling process, so that the planar antenna is high in cost and heavy in weight. In addition, due to the adoption of the waveguide network structure, the array interval is large, and side lobes can be reduced only by adopting a cross or round hole mode and the like so as to improve the antenna performance. Doing so in turn reduces the bandwidth of the antenna.

Broadband ultra-thin antennas are currently a bottleneck in industry development. In order to reduce the thickness of the flat-panel array antenna, a known mode is to use a dual-linear polarized array antenna to be matched with a waveguide bridge to realize a dual-circular polarized array antenna, but for a large-scale array, the mode is difficult to ensure the phase consistency of two waveguide networks, so that the axial ratio data of the circular polarized network is poor, and the fundamental problem cannot be solved.

Disclosure of Invention

The invention aims to provide a dual circular polarization flat panel array antenna and a processing method thereof, aiming at all or part of the problems, so as to realize miniaturization, low-cost design and processing of the dual circular polarization flat panel array antenna.

The technical scheme adopted by the invention is as follows:

A dual circular polarization flat panel array antenna comprises a radiation unit array, a dual circular polarizer array, a first sealed microstrip power division network, a second sealed microstrip power division network and two waveguide ports;

The first output port array of the double circular polarizer array is respectively connected with each output port of the first sealed microstrip power division network, the second output port array of the circular polarizer array is respectively connected with each output port of the second sealed microstrip power division network so as to realize conversion from a waveguide to a microstrip line, and the public port of the first sealed microstrip power division network and the public port of the second sealed microstrip power division network are respectively connected with one waveguide port so as to realize conversion from the microstrip line to the waveguide.

Optionally, the first sealed microstrip power division network comprises a first sealed cavity and a first microstrip power divider, wherein the first microstrip power divider is sealed in the first sealed cavity;

The second sealed microstrip power division network comprises a second sealed cavity and a second microstrip power divider, and the second microstrip power divider is sealed in the second sealed cavity.

Optionally, the first sealing cavity and the second sealing cavity are disposed on opposite sides of the isolation board, and the first sealing cavity and the second sealing cavity share the isolation board to achieve sealing.

Optionally, the first sealing cavity includes a first sealing plate, the first sealing plate and a first side of the isolation plate are abutted to form the first sealing cavity, and the first microstrip power divider is sandwiched between the first sealing plate and the first side of the isolation plate;

the second sealed cavity comprises a second sealing plate, the second sealing plate is in butt joint with the second side of the isolation plate to form the second sealed cavity, and the second microstrip power divider is clamped between the second sealing plate and the second side of the isolation plate.

Optionally, the first sealing cavity is arranged on the first side of the isolation plate and/or the first sealing plate, and the second sealing cavity is arranged on the second side of the isolation plate and/or the second sealing plate.

Optionally, the first sealing plate is integrally connected with the bottom of the dual circular polarizer array, and the two waveguide ports are arranged on the second sealing plate.

Optionally, the first microstrip power divider is arranged on a first dielectric substrate, the second microstrip power divider is arranged on a second dielectric substrate, and the first dielectric substrate and the second dielectric substrate have the same structure.

Optionally, the first microstrip power divider and the second microstrip power divider are formed by connecting multistage microstrip two power dividers step by step.

Optionally, the first sealed cavity comprises a first rectangular waveguide corresponding to a public port of the first microstrip power divider and a second rectangular waveguide array corresponding to each output port of the first microstrip power divider respectively;

The second sealed cavity comprises a third rectangular waveguide corresponding to the public port of the second microstrip power divider and a fourth rectangular waveguide array corresponding to each output port of the second microstrip power divider respectively.

In a second aspect, the present application further provides a method for processing a dual circularly polarized flat panel array antenna, which includes:

A radiation unit array is arranged on the radiation layer;

a double circular polarizer array is arranged on the top of the circular polarization layer;

Processing a first sealing plate at the bottom of the circularly polarized layer;

A first sealing cavity is formed in the bottom of the first sealing plate and/or the top of the isolation plate;

a second sealing cavity is formed at the top of the second sealing plate and/or the bottom of the isolation plate;

Two waveguide ports are formed in the second sealing plate;

Preparing a first microstrip power divider and a second microstrip power divider respectively;

Clamping the first microstrip power divider between the bottom of the first sealing plate and the top of the isolation plate; clamping the second microstrip power divider between the bottom of the isolation plate and the top of the second sealing plate;

And screwing the second sealing plate, the isolation plate, the circular polarization layer and the radiation layer into a whole.

In summary, due to the adoption of the technical scheme, the beneficial effects of the invention are as follows:

In addition, the double circular polarizer array feed source is combined, the space between antenna array units is reduced, and the possibility is provided for amplitude and phase shaping of the antenna while the antenna wire grating valve is not required to be depressed by a cross or a round hole. According to the dual-circular polarized flat array antenna, the circular polarized layer, the isolation plate and the second sealing plate are obtained through double-sided milling of the metal material, the microstrip power divider is obtained through etching and the like of the dielectric substrate (such as 5880 base material), all the layered structures are stacked layer by layer, the assembly of the flat array antenna can be completed through screwing, the processing through a welding process is not needed, and the convenience of the assembly is improved. In addition, the isolation plate and the two dielectric substrates can be designed into standard components, the front and the back of the isolation plate can be processed by the same production line, the first dielectric substrate and the second dielectric substrate can be processed by the other production line, the front and the back of the isolation plate are not required to be distinguished during assembly, the first dielectric substrate and the second dielectric substrate are not required to be distinguished, and the assembly efficiency can be greatly improved. Furthermore, through the design of double-sided slotting, when the first medium substrate and the second medium substrate are assembled, the front side and the back side of the medium substrate can be disregarded, and the assembly efficiency can be further improved.

Drawings

The invention will now be described by way of example and with reference to the accompanying drawings in which:

Fig. 1 is a top view of a dual circularly polarized planar array antenna.

Fig. 2 is a bottom view of a dual circularly polarized planar array antenna.

Fig. 3 is an exploded view of a dual circularly polarized planar array antenna.

Fig. 4 is a diagram of a radiation layer configuration.

Fig. 5 is a top view of a circularly polarized layer.

FIG. 6 is a diagram showing the structure of the bottom of the circularly polarized layer and the first sealing plate.

FIG. 7 is a schematic illustration of the sizing of circularly polarized layers in mm in one embodiment.

Fig. 8 is a structural view of a first dielectric substrate.

FIG. 9 is a schematic illustration of the sizing of a first dielectric substrate in mm in one embodiment.

Fig. 10 is a top view of the separator.

Fig. 11 is a view of the bottom of the separator.

Figure 12 is a schematic illustration of the sizing of the separator plate in mm in one embodiment.

Fig. 13 is a structural view of a second dielectric substrate.

Fig. 14 is a top view of the first seal plate.

FIG. 15 is a schematic illustration of the sizing of the first seal plate in one embodiment, all in mm.

Fig. 16 is a cross-sectional view taken along A-A in fig. 2.

Fig. 17 is a perspective view of the cross-sectional view of fig. 16.

Fig. 18 is a perspective sectional view taken along B-B in fig. 2.

Fig. 19 is a graph of simulating standing waves of a left-hand circularly polarized port and a right-hand circularly polarized port of a flat panel array antenna, and fig. 19 shows a graph of simulating standing waves of a left-hand circularly polarized port in subgraph (a) and a graph of simulating standing waves of a right-hand circularly polarized port in subgraph (b).

Fig. 20 is a gain pattern of a left-hand circularly polarized port and a right-hand circularly polarized port of a flat panel array antenna, and in fig. 20, a sub-graph (a) is a gain pattern of a left-hand circularly polarized port and a sub-graph (b) is a gain pattern of a right-hand circularly polarized port.

Fig. 21 is an axial ratio graph of a transceiving frequency band of a left-hand circular polarized port and a right-hand circular polarized port of a flat panel array antenna, wherein in fig. 21, a sub-graph (a) is an axial ratio graph of the left-hand circular polarized port, and a sub-graph (b) is an axial ratio graph of the right-hand circular polarized port.

In the figure, 1-a second sealing plate; 2-a second dielectric substrate; 3-separating plates; the dual-microstrip power divider comprises a 4-first dielectric substrate, a 5-circularly polarized layer, a 6-radiation layer, a 11-first waveguide port, a 12-second waveguide port, a 13-second cavity under a sealed cavity, a 14-fourth rectangular waveguide, a 15-second rectangular waveguide, a 21-second microstrip power divider, a 22-second microstrip power divider public port, a 23-second microstrip power divider output port, a 24-third via hole, a 25-fourth via hole, a 30-first side of an isolation plate, a 31-second side of the isolation plate, a 32-first cavity under a sealed cavity, a 33-first output waveguide, a 34-second transition waveguide, a 35-second input waveguide, a 36-first transition waveguide, a 37-second cavity under a sealed cavity, a 38-first sealed cavity, a 39-second sealed cavity, a 41-first microstrip power divider, a 42-first microstrip power divider public port, a 43-first microstrip power divider output port, a 44-first via hole, a 45-second via hole, a 51-double-second microstrip power divider, a 51-second microstrip output port, a circularly polarized array 51-first circularly polarized cavity, a circularly polarized array 51-second circularly polarized array 51-third circularly polarized cavity, a circularly polarized array 51-third circularly polarized array 51-fourth circularly polarized array 53-circularly polarized array 51-third circularly polarized waveguide, and a circularly polarized array 51-fourth circularly polarized array 53-circularly polarized isolation plate.

Detailed Description

All of the features disclosed in this specification, or all of the steps in a method or process disclosed, may be combined in any combination, except for mutually exclusive features and/or steps.

Any feature disclosed in this specification (including any accompanying claims, abstract) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. That is, each feature is one example only of a generic series of equivalent or similar features, unless expressly stated otherwise.

The embodiment of the application provides a dual circularly polarized planar array antenna, which comprises a radiation unit array, a dual circularly polarizer array 51, a first sealing microstrip power division network, a second sealing microstrip power division network and two waveguide ports, as shown in fig. 1-3.

The radiation element array is an array in which a plurality of radiation elements 61 are arranged. Each radiating element 61 is for receiving or transmitting a signal. As shown in fig. 4, the radiating element array may be formed on the radiating layer 6, and in fig. 4, the radiating element array is formed with 8 radiating elements 61.

In an alternative embodiment, as shown in fig. 4, the radiating element 61 adopts a stepped horn configuration. In addition, the stepped port surface of each layer adopts an inverted foot design, so that the processing difficulty is reduced while the wide-port signal receiving and transmitting is realized. And, between each radiation unit 61 of the radiation unit array, the grating lobe is pressed down without adopting the modes of cross or round hole to reduce the array unit spacing, and the spacing of 1.4 times to 2.2 times of wavelength between the traditional array units can be reduced to 0.8 times to 1.3 times of wavelength, so as to optimize/reduce the transverse size of the antenna.

The so-called double circular polarizer array 51 is formed by arranging a plurality of diaphragm type circular polarizers, each of which corresponds to the radiation unit 61 one by one. As shown in fig. 5, the dual circular polarizer array 51 may be disposed on the circular polarization layer 5. Each of the baffle-type circular polarizers is a three-port device, i.e., a circular polarizer input port 51a, a circular polarizer first output port 51b, and a circular polarizer second output port 51c. For example, the diaphragm type circular polarizer is a three-port type circular polarizer formed by designing a stepped and graded diaphragm 51d in the center of a rectangular waveguide. When receiving signals, the signals enter the baffle type circular polarizer from the circular polarizer input port 51a, and then left-hand circular polarization and right-hand circular polarization are realized, and the left-hand circular polarization signals and the right-hand circular polarization signals are respectively output by the circular polarizer first output port 51b and the circular polarizer second output port 51c. In contrast, when transmitting signals, the two paths of transmitting signals respectively enter the baffle type circular polarizer from the first output port 51b and the second output port 51c of the circular polarizer, and then are transmitted to the corresponding radiation unit 61 for transmission through the input port 51a of the circular polarizer.

All the baffle plate type circular polarizer input ports 51a arranged in an array form an input port array of the double circular polarizer array 51, all the circular polarizer first output ports 51b form a first output port array, and all the circular polarizer second output ports 51c form a second output port array.

The first sealing microstrip power division network/the second sealing microstrip power division network are both sealing microstrip structures, namely the microstrip structures are arranged in the sealing structures, and are not exposed outside. The sealing microstrip power division network structure can obtain lower power division loss and improve the antenna performance. In addition, more importantly, compared with the traditional pure waveguide network or ridge waveguide network design, the sealed microstrip power division network can greatly reduce the thickness of the antenna and optimize the longitudinal dimension of the antenna.

The radiating element array is connected to an input port array of the dual circular polarizer array 51. The first output port array of the double circular polarizer array 51 is respectively connected with each output port of the first sealed microstrip power division network, and the second output port array of the circular polarizer array is respectively connected with each output port of the second sealed microstrip power division network, so as to realize conversion from waveguide to microstrip line. The public port of the first sealing microstrip power division network and the public port of the second sealing microstrip power division network are respectively connected with a waveguide port so as to realize conversion from a microstrip line to a waveguide.

The first sealing microstrip power division network/the second sealing microstrip power division network are power division networks, and therefore all comprise a rear public port (a combining end) and a plurality of output ports (power division ends). The number of output ports should correspond to the number of radiating elements 61/diaphragm circular polarizers. When receiving signals, the signals are transmitted to all output ports of the first sealed microstrip public branch network through the first output port array of the double circular polarizer array 51, the signal transmission channels are converted into microstrip lines by waveguides, the signals are transmitted to all output ports of the second sealed microstrip public branch network through the second output port array of the double circular polarizer array 51, the signal transmission channels are also converted into microstrip lines by waveguides, the first sealed microstrip public branch network and the second sealed microstrip public branch network respectively output combined signals to corresponding waveguide ports (the first sealed microstrip public branch network is output to the first waveguide port 11, the second sealed microstrip public branch network is output to the second waveguide port 12), and the signal transmission channels are converted into waveguides by the microstrip lines. In contrast, when signals are transmitted, the signals are respectively input from two waveguide ports, the signals are respectively input to the public ports of the first sealing microstrip public branch network and the second sealing microstrip public branch network, the signal transmission channel is changed into a microstrip line from the waveguide, then, each output port of the first sealing microstrip public branch network respectively transmits the signals to the first output port corresponding to the double circular polarizer array 51, each output port of the second sealing microstrip public branch network respectively transmits the signals to the second output port corresponding to the double circular polarizer array 51, and the input port array of the double circular polarizer array 51 transmits the signals to the radiation unit array for transmission.

As an alternative embodiment, referring to fig. 6-8, the first sealed microstrip power divider network includes a first sealed cavity 38 and a first microstrip power divider 41, where the first microstrip power divider 41 is sealed within the first sealed cavity 38. Similarly, the second sealed microstrip power divider network comprises a second sealed cavity 39 and a second microstrip power divider 21, and the second microstrip power divider 21 is sealed in the second sealed cavity 39.

The first seal cavity 38 and the second seal cavity 39 are the seal structures described above, and seal the corresponding microstrip power splitters in the respective seal cavities.

Further, as an alternative embodiment, referring to FIGS. 6-18, the first sealed chamber 38 includes a first rectangular waveguide 54 corresponding to the first microstrip power divider common port 42 and an array of second rectangular waveguides 15 corresponding to respective output ports of the first microstrip power divider 41. The second sealed cavity 39 includes a third rectangular waveguide 55 corresponding to the second microstrip power divider common port 22 and an array of fourth rectangular waveguides 14 corresponding to the respective output ports of the second microstrip power divider 21. Each rectangular waveguide is used for fully converting the waveguide into a microstrip line or converting the microstrip line into the waveguide respectively.

As an alternative embodiment, as shown in fig. 8 and 9, the first microstrip power divider 41 and the second microstrip power divider 21 are each formed by connecting a plurality of stages of microstrip two power dividers in steps.

For example, as shown in fig. 8 and 9, assuming that the first microstrip power divider 41 and the second microstrip power divider 21 are all one-to-eight power dividers, the one microstrip power divider and the second microstrip power divider 21 respectively include 3-stage two power dividers, and are sequentially cascaded to complete one-to-two, two-to-four, and four-to-eight power dividers. And preferably, the first microstrip power divider 41 and the second microstrip power divider 21 are symmetrical with respect to the respective first stage second power divider.

In a specific embodiment, unlike the microstrip line design with equal width, as shown in fig. 9, the common ports of the first microstrip power divider 41 and the second microstrip power divider 21 are microstrip lines with equal widths, the output ports of the second microstrip power dividers are microstrip lines with gradually changed widths from small to large, and the final widths are equal to the widths of the common ports.

In addition, the common port and each output port of the first microstrip power divider 41 and the second microstrip power divider 21 are microstrip lines with gradually changed width steps, wherein the common port width is gradually changed from large to small, and the width of each output port is gradually changed from small to large.

The matching bandwidth can be adjusted by the graded microstrip line and the ports, and the antenna can have wider band sections by the matching adjustment of the multistage two-power divider.

As a preferred embodiment, as shown in fig. 6 to 15, the first sealed cavity 38 has a shape corresponding to the first microstrip power divider 41, and the second sealed cavity 39 has a shape corresponding to the second microstrip power divider 21. For example, the first microstrip power divider 41/the second microstrip power divider 21 are in a T-shaped position, and the first seal cavity 38/the second seal cavity 39 are correspondingly shaped as a T-shape. Therefore, although the processing (such as milling) workload can be increased to a certain extent, the corresponding microstrip power divider can be better restrained, the power dividing loss of the microstrip power divider can be further reduced, and the antenna performance can be greatly improved.

As mentioned above, the first microstrip power divider 41 and the second microstrip power divider 21 need to be sealed by using sealed cavities, and the first sealed cavity 38 and the second sealed cavity 39 need to be isolated from each other, so milling processing on different metal substrates is generally required to obtain the first sealed cavity 38 and the second sealed cavity 39 respectively. In an alternative embodiment, to further reduce the thickness of the antenna, as shown in fig. 10, 11 and 12, a first sealing cavity 38 and a second sealing cavity 39 are provided on opposite sides of the separation plate 3, and the first sealing cavity 38 and the second sealing cavity 39 share the separation plate 3 to achieve sealing. That is, the first seal chamber 38 and the second seal chamber 39 are partially or completely processed on the front and back sides (top and bottom) of the same partition plate 3, and by sharing the same partition plate 3, the thickness of the antenna is reduced as much as possible, and when the number of metal base material layers is reduced as much as possible, the difficulty of assembling the antenna is reduced, and the working stability of the antenna is improved.

In view of the high difficulty in machining the seal cavities directly into the separator plate 3, the first seal cavity 38 and the second seal cavity 39 are machined in two parts that combine to form the corresponding seal cavities.

Specifically, referring to fig. 3 and 6, the first seal cavity 38 includes a first seal plate 52, the first seal plate 52 and the first side 30 of the isolator plate interfacing to form the first seal cavity 38, the first microstrip power divider 41 sandwiched between the first seal plate 52 and the first side 30 of the isolator plate. Likewise, the second sealed cavity 39 comprises a second sealing plate 1, the second sealing plate 1 and the second side 31 of the separator plate being in butt joint to form the second sealed cavity 39, the second microstrip power divider 21 being sandwiched between the second sealing plate 1 and the second side 31 of the separator plate.

That is, the partition plate 3 forms only one part of the airtight first seal chamber 38/second seal chamber 39, and the other part is served by the corresponding first/second seal plate 1, and the partition plate 3 and the first/second seal plate 1 are butted to form the first seal chamber 38/second seal chamber 39, so that the first seal chamber 38/second seal chamber 39 can be manufactured easily. In addition, the first/second microstrip power divider 21 is sandwiched between the isolation plate 3 and the first/second sealing plate 1, which also facilitates the assembly of the first/second sealed microstrip power divider network.

For example, the first output waveguide 33, the first transition waveguide 36, the second input waveguide 35, and the second transition waveguide 34 are provided on the partition plate 3. The first output waveguide 33 is used for communicating the first microstrip power divider common port 42 with the first waveguide port 11, the second transition waveguide 34 is used for communicating the second microstrip power divider common port 22 with the third rectangular waveguide 55, the second input waveguide 35 is used for communicating the circular polarizer second output port 51c with the second microstrip power divider output port 23, and the first transition waveguide 36 is used for communicating the first microstrip power divider 41 output waveguide with the second rectangular waveguide 15.

As an alternative embodiment, as shown in fig. 8, 9 and 13, the first microstrip power divider 41 is disposed on the first dielectric substrate 4, and the second microstrip power divider 21 is disposed on the second dielectric substrate 2. That is, the first dielectric substrate 4 is sandwiched between the first side of the isolation board 3 and the first sealing board 52 to form a first sealed microstrip power distribution network, and the second dielectric substrate 2 is sandwiched between the second side 31 of the isolation board and the second sealing board 1 to form a second sealed microstrip power distribution network. The microstrip power divider with the plate-shaped design is convenient to produce and assemble.

In addition, as a preferred embodiment, the first dielectric substrate 4 and the second dielectric substrate 2 are identical in structure. The configurations are the same, that is, the configurations including the first microstrip power divider 41 and the second microstrip power divider 21 are the same, and the configurations other than the first microstrip power divider 41 and the second microstrip power divider 21 are the same, for example, when there are openings, the number, structure, and position of the openings are the same. Namely the first dielectric substrate 4 and the second dielectric substrate 2 are identical. Thus, only one production line is needed to produce the first microstrip power divider 41 and the second microstrip power divider 21 simultaneously, and as the two microstrip power dividers have the same structure, the two microstrip power dividers can be used as the first microstrip power divider 41 and the second microstrip power divider 21 respectively by arbitrarily selecting two dielectric substrates without distinction during assembly, and the assembly efficiency can be greatly improved only by assembling according to the required direction (such as bilateral symmetry), and meanwhile, the later maintenance is convenient.

For example, in addition to the first microstrip power divider 41, a first via 44 and a plurality of second vias 45 are formed on the first dielectric substrate 4. The first via hole 44 corresponds to the position of the second microstrip power divider common port 22 to communicate the third rectangular waveguide 55 with the second microstrip power divider common port 22, the second via hole 45 corresponds to the position of each second microstrip power divider output port 23 to communicate the second output port 51c of the circular polarizer with the second microstrip power divider output port 23, and the second dielectric substrate 2 is provided with a third via hole 24 and a plurality of fourth via holes 25 in addition to the second microstrip power divider 21. The third via hole 24 corresponds to the first microstrip power divider common port 42 in position to communicate the first microstrip power divider common port 42 with the first waveguide port 11, and the fourth via hole 25 corresponds to the first microstrip power divider output port 43 in position to communicate the first microstrip power divider output port 43 with the second rectangular waveguide 15.

Machining the complete first 38/second 39 seal cavities on the spacer plate 3 and the first 52/second seal plate 1 provides various alternative embodiments:

in the first mode, the groove body structure of the first sealing cavity 38/the second sealing cavity 39 is only arranged on the isolation plate 3.

The first seal chamber 38 is open at the first side 30 of the spacer, and the first seal plate 52 seals (in a planar configuration) the first side 30 of the spacer to form the complete first seal chamber 38. The first microstrip power divider 41 is sandwiched therebetween to form a first sealed microstrip power divider network.

Similarly, the second seal chamber 39 is formed on the second side 31 (opposite/opposite to the first side) of the partition plate, and the second seal plate 1 seals the second side 31 of the partition plate (in a planar structure) to form a complete second seal chamber 39. The second microstrip power divider 21 is sandwiched between the two to form a second sealed microstrip power divider network.

The groove structures of the first seal chamber 38 and the second seal chamber 39 are only arranged on the first seal plate 1 and the second seal plate 1.

The first seal chamber 38 is open to the first seal plate 52, and the first side 30 of the spacer plate seals the first seal plate 52 (in a planar configuration) to form the complete first seal chamber 38. The first microstrip power divider 41 is sandwiched therebetween to form a first sealed microstrip power divider network.

Similarly, the second sealing chamber 39 is formed on the second sealing plate 1, and the second side 31 of the partition plate seals the second sealing plate 1 (in a planar structure) to form a complete second sealing chamber 39. The second microstrip power divider 21 is sandwiched between the two to form a second sealed microstrip power divider network.

In the third mode, the groove body structure of the first sealing cavity 38/the second sealing cavity 39 is simultaneously arranged on the isolation plate 3 and the first/the second sealing plate 1.

As shown in fig. 3 and fig. 6-16, in this manner, the first seal cavity 38 is formed on the first side 30 of the isolation board and the first seal plate 52, the first side 30 of the isolation board and the first seal plate 52 are formed with groove structures of the first seal cavity 38, and the depths of the grooves of the first seal cavity 38 on the first side 30 of the isolation board and the first seal plate 52 may be equal or different. Preferably both of the slot depths are independently capable of accommodating the first microstrip power divider 41. For example, a first seal cavity upper cavity 53 is formed on the first seal plate 52, a first seal cavity lower cavity 32 is formed on the first side 30 of the isolation plate, and the first seal cavity upper cavity 53 and the first seal cavity lower cavity 32 are in butt joint (sandwiching the first dielectric substrate or the first microstrip power divider 41) to form the first seal cavity 38.

The second sealing cavity 39 is formed on the second side 31 of the isolation plate and the second sealing plate 1, the second side 31 of the isolation plate and the second sealing plate 1 are respectively provided with a groove body structure of the second sealing cavity 39, and the groove depths of the second sealing cavity 39 on the second side 31 of the isolation plate and the second sealing plate 1 can be equal or different. Preferably both the depths of the slots are independently capable of accommodating the second microstrip power divider 21. For example, a second seal cavity lower cavity 13 is formed on the second sealing plate, a second seal cavity upper cavity 37 is formed on the second side 31 of the isolation plate, and the second seal cavity upper cavity 37 and the second seal cavity lower cavity 13 are in butt joint (with the second dielectric substrate or the second microstrip power divider 21 interposed therebetween) to form a second seal cavity 39.

It should be noted that the above three ways are descriptions of three alternative embodiments of the first seal cavity 38 and the second seal cavity 39, and not the design ways of defining both the first seal cavity 38 and the second seal cavity 39 must be the same. That is, the first seal chamber 38 may be any of the above three ways, and likewise, the second seal chamber 39 may be any of the above three ways, and the design of the two seal chambers need not be the same.

The first sealing cavity 38 and the second sealing cavity 39 are formed on the isolation board 3 at the same time, so that the first microstrip power divider 41 and the second microstrip power divider 21 are designed to have the same structure, the front and back sides of the isolation board 3 can be disregarded when the antenna is processed, the number of processing lines is reduced, the production efficiency is improved, and the assembly direction of the isolation board 3 can be disregarded when the antenna is assembled, so that the antenna can be assembled quickly.

The advantage of providing the first sealing cavity 38 and the second sealing cavity 39 on the isolation board 3 and the first/second sealing boards 1 at the same time is that the assembly efficiency can be greatly improved without considering the orientation of the first/second microstrip power divider 21 when the first/second microstrip power divider 21 is assembled.

In summary, the spacer plate 3, the first sealing plate 52 and the second sealing plate 1 can be designed as standard components, which can facilitate both processing (milling) and assembly.

In addition, in order to further reduce the thickness of the antenna, the first sealing plate 52 is integrally connected to the bottom of the dual circular polarizer array 51, that is, the partition plate type circular polarizer and the first sealing plate 52 are milled on the front and back sides of the same metal substrate, as shown in fig. 5 and 6, the dual circular polarizer array 51 is processed on the top of the circular polarizer layer 5, and the first sealing plate 52 is processed on the bottom of the circular polarizer layer 5. Two waveguide ports are provided on the second sealing plate 1, i.e. the two waveguide ports penetrate the second sealing plate 1, as shown in fig. 14-16. In this way, the original independent double circular polarization array and the first sealing plate 52 can be integrally designed, the original independent second sealing plate 1 and the two waveguide ports can be integrally designed, the material is saved, the thickness of the antenna is reduced, the assembly difficulty is reduced, and the working stability of the antenna is improved.

According to the above dimensional design example, the performance of the designed antenna is tested according to the embodiment of the application. The standing wave simulation graphs of the left-hand circular polarization port and the right-hand circular polarization port of the flat panel array antenna are shown in fig. 19, the gain patterns of the left-hand circular polarization port and the right-hand circular polarization port of the flat panel array antenna are shown in fig. 20, gains of a test point m1 and a test point m2 in fig. 20 are respectively 18.4dB@19.75GHz and 21.2dB@30GHz, gain curves in two directions (azimuth phi is respectively 0 degree and 90 degrees) coincide, the radiation directions of an azimuth plane and a pitching plane of the antenna are the same, and the consistency of the left-hand circular polarization port and the right-hand circular polarization port of the gain of the array antenna is proved to be good. Fig. 21 is a graph showing an axial ratio of a transceiving frequency band of a left-hand circularly polarized port and a right-hand circularly polarized port of a flat panel array antenna, and as can be seen from fig. 21, an antenna standing wave is lower than 2.0. The radiation efficiency of the left-hand circularly polarized port and the right-hand circularly polarized port of the antenna is calculated to reach 72 percent and 60 percent by combining the antenna size of 56mm multiplied by 32mm multiplied by 26.2 mm. The antenna thickness is also much lower than that of a conventional ka band array antenna. The normal axis ratio of the antenna array is less than 1.75. The antenna index is excellent, and the excellent radiation effect can be provided in a wider coverage area.

The conventional flat panel array antenna mostly adopts a horn-shaped radiating element array matched with a waveguide network design, and after each layer of structure is milled, each layer of structure is connected into a whole by adopting a welding process so as to ensure the tightness of the waveguide network. According to the application, through the structural design of the first sealing microstrip power division network and the second sealing microstrip power division network and the matching design of the dielectric substrate and the sealing cavity, the thickness of the antenna is greatly reduced (the compression is more than 35%), the spacing between array units is correspondingly reduced, the miniaturization design of the flat-panel array antenna is realized, and the portability is greatly improved. In addition, the conventional flat panel array antenna cannot perform signal shaping due to larger array unit spacing, and the narrowing of the array unit spacing provides possibility for shaping amplitude and phase of the flat panel array antenna. When the dual circular polarization flat panel array antenna is assembled, the performance of the antenna can be ensured only by spirally assembling all the hierarchical structures into a whole after sequentially stacking, and the welding process is not required to be adopted to connect all the layer structures, so that the convenience of antenna assembly is improved. Through tests, the dual-circularly polarized flat-panel array antenna designed by the application realizes the receiving and transmitting coplanarity and dual-circularly polarization of k-ka frequency band, the frequency band covers 18.7GHz-30GHz, the radiation efficiency of the K frequency band reaches 75%, and the ka frequency band reaches 60%. The antenna has compact structure and small size, only needs screw assembly during assembly, and reduces the production cost. The flat panel array antenna has wide market application prospect.

According to the inventive concept, the embodiment of the application further provides a processing method of the dual circular polarization flat panel array antenna, referring to fig. 1 to 18, the processing method comprises:

A radiation unit array is arranged on the radiation layer 6;

A double circular polarizer array 51 is arranged on the top of the circular polarization layer 5;

Machining a first sealing plate 52 at the bottom of the circularly polarized layer 5;

A first sealing cavity 38 is formed at the bottom of the first sealing plate 52 and/or the top of the isolation plate 3;

A second sealing cavity 39 is formed at the top of the second sealing plate 1 and/or at the bottom of the isolation plate 3;

Two waveguide ports are formed in the second sealing plate 1;

Preparing a first microstrip power divider 41 and a second microstrip power divider 21, respectively;

Sandwiching the first microstrip power divider 41 between the bottom of the first sealing plate 52 and the top of the separation plate 3, sandwiching the second microstrip power divider 21 between the bottom of the separation plate 3 and the top of the second sealing plate 1;

The second sealing plate 1, the isolation plate 3, the circular polarization layer 5 and the radiation layer 6 are screwed into a whole. The flat array antenna can be processed and prepared in a threaded rather than welded mode, and convenience in antenna assembly is greatly improved.

The above-mentioned optional implementation manners of each layer (the radiation layer 6, the circularly polarized layer 5, the first sealing plate 52, the isolation plate 3, the second sealing plate 1, the first microstrip power divider 41 and the second microstrip power divider 21) may refer to the structures designed by the foregoing embodiments or optional implementation manners thereof, and will not be described in detail herein.

The invention is not limited to the specific embodiments described above. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification, as well as to any novel one, or any novel combination, of the steps of the method or process disclosed.

Claims (10)

1. The dual-circular polarization flat panel array antenna is characterized by comprising a radiation unit array, a dual-circular polarizer array, a first sealed microstrip power division network, a second sealed microstrip power division network and two waveguide ports;

The first output port array of the double circular polarizer array is respectively connected with each output port of the first sealed microstrip power division network, the second output port array of the circular polarizer array is respectively connected with each output port of the second sealed microstrip power division network so as to realize conversion from a waveguide to a microstrip line, and the public port of the first sealed microstrip power division network and the public port of the second sealed microstrip power division network are respectively connected with one waveguide port so as to realize conversion from the microstrip line to the waveguide.

2. The dual circularly polarized planar array antenna of claim 1, wherein the first sealed microstrip power divider network comprises a first sealed cavity and a first microstrip power divider, wherein the first microstrip power divider is sealed in the first sealed cavity;

The second sealed microstrip power division network comprises a second sealed cavity and a second microstrip power divider, and the second microstrip power divider is sealed in the second sealed cavity.

3. The dual circularly polarized planar array antenna of claim 2, wherein the first sealed cavity and the second sealed cavity are disposed on opposite sides of a spacer plate, the first sealed cavity and the second sealed cavity sharing the spacer plate to effect sealing.

4. The dual circularly polarized planar array antenna of claim 3, wherein the first sealed cavity comprises a first sealed plate, the first sealed plate and a first side of the isolator plate interfacing to form the first sealed cavity, the first microstrip power divider sandwiched between the first sealed plate and the first side of the isolator plate;

the second sealed cavity comprises a second sealing plate, the second sealing plate is in butt joint with the second side of the isolation plate to form the second sealed cavity, and the second microstrip power divider is clamped between the second sealing plate and the second side of the isolation plate.

5. The dual circularly polarized planar array antenna of claim 4, wherein the first sealed cavity is formed on a first side of the spacer plate and/or the first seal plate, and the second sealed cavity is formed on a second side of the spacer plate and/or the second seal plate.

6. The dual circularly polarized planar array antenna of claim 4 or 5, wherein the first sealing plate is integrally connected to the bottom of the dual circularly polarized array, and the two waveguide ports are opened on the second sealing plate.

7. The dual circularly polarized planar array antenna as claimed in any one of claims 2-5, wherein the first microstrip power divider is disposed on a first dielectric substrate, the second microstrip power divider is disposed on a second dielectric substrate, and the first dielectric substrate and the second dielectric substrate have the same structure.

8. The dual circularly polarized planar array antenna of claim 7, wherein the first microstrip power divider and the second microstrip power divider are each formed by stepwise coupling of multiple stages of microstrip two power dividers.

9. The dual circularly polarized planar array antenna as claimed in any one of claims 2-5, wherein the first sealed cavity comprises a first rectangular waveguide corresponding to the common port of the first microstrip power divider and a second rectangular waveguide array corresponding to each output port of the first microstrip power divider, respectively;

The second sealed cavity comprises a third rectangular waveguide corresponding to the public port of the second microstrip power divider and a fourth rectangular waveguide array corresponding to each output port of the second microstrip power divider respectively.

10. A method of manufacturing a dual circularly polarized planar array antenna according to any one of claims 2 to 9, comprising:

A radiation unit array is arranged on the radiation layer;

a double circular polarizer array is arranged on the top of the circular polarization layer;

Processing a first sealing plate at the bottom of the circularly polarized layer;

A first sealing cavity is formed in the bottom of the first sealing plate and/or the top of the isolation plate;

a second sealing cavity is formed at the top of the second sealing plate and/or the bottom of the isolation plate;

Two waveguide ports are formed in the second sealing plate;

Preparing a first microstrip power divider and a second microstrip power divider respectively;

Clamping the first microstrip power divider between the bottom of the first sealing plate and the top of the isolation plate; clamping the second microstrip power divider between the bottom of the isolation plate and the top of the second sealing plate;

And screwing the second sealing plate, the isolation plate, the circular polarization layer and the radiation layer into a whole.