CN1221551A - 具有通孔矩阵夹层连接的多层电路及其制造方法 - Google Patents

具有通孔矩阵夹层连接的多层电路及其制造方法 Download PDF

Info

Publication number
CN1221551A
CN1221551A CN97195395A CN97195395A CN1221551A CN 1221551 A CN1221551 A CN 1221551A CN 97195395 A CN97195395 A CN 97195395A CN 97195395 A CN97195395 A CN 97195395A CN 1221551 A CN1221551 A CN 1221551A
Authority
CN
China
Prior art keywords
conducting element
matrix
hole
circuit
width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN97195395A
Other languages
English (en)
Chinese (zh)
Inventor
玻尔·麦兰·哈维
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
3M Co
Original Assignee
Minnesota Mining and Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minnesota Mining and Manufacturing Co filed Critical Minnesota Mining and Manufacturing Co
Publication of CN1221551A publication Critical patent/CN1221551A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN97195395A 1996-06-14 1997-05-05 具有通孔矩阵夹层连接的多层电路及其制造方法 Pending CN1221551A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/663,626 1996-06-14
US08/663,626 US5753976A (en) 1996-06-14 1996-06-14 Multi-layer circuit having a via matrix interlayer connection

Publications (1)

Publication Number Publication Date
CN1221551A true CN1221551A (zh) 1999-06-30

Family

ID=24662639

Family Applications (1)

Application Number Title Priority Date Filing Date
CN97195395A Pending CN1221551A (zh) 1996-06-14 1997-05-05 具有通孔矩阵夹层连接的多层电路及其制造方法

Country Status (7)

Country Link
US (2) US5753976A (2)
JP (1) JP2000512083A (2)
KR (1) KR20000016520A (2)
CN (1) CN1221551A (2)
DE (1) DE19781552T1 (2)
MY (1) MY133613A (2)
WO (1) WO1997048256A1 (2)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100525578C (zh) * 2004-02-04 2009-08-05 Nxp股份有限公司 用于提高电路板的定线密度的方法和这种电路板

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6043559A (en) * 1996-09-09 2000-03-28 Intel Corporation Integrated circuit package which contains two in plane voltage busses and a wrap around conductive strip that connects a bond finger to one of the busses
AU2107197A (en) * 1996-12-04 1998-06-29 Samsung Electronics Co., Ltd. High-power microwave-frequency hybrid integrated circuit
US6137178A (en) * 1998-06-17 2000-10-24 Siemens Aktiengesellschaft Semiconductor metalization system and method
US6262579B1 (en) 1998-11-13 2001-07-17 Kulicke & Soffa Holdings, Inc. Method and structure for detecting open vias in high density interconnect substrates
CN1444839A (zh) 2000-05-31 2003-09-24 Ttm先进电路公司 填充方法
US6855385B2 (en) * 2000-05-31 2005-02-15 Ttm Advanced Circuits, Inc. PCB support plate for PCB via fill
US6506332B2 (en) 2000-05-31 2003-01-14 Honeywell International Inc. Filling method
US6454154B1 (en) 2000-05-31 2002-09-24 Honeywell Advanced Circuits, Inc. Filling device
US6800232B2 (en) * 2000-05-31 2004-10-05 Ttm Advanced Circuits, Inc. PCB support plate method for PCB via fill
JP2003535465A (ja) * 2000-05-31 2003-11-25 ハネウエル・インターナシヨナル・インコーポレーテツド 充填装置
KR100396695B1 (ko) * 2000-11-01 2003-09-02 엘지.필립스 엘시디 주식회사 에천트 및 이를 이용한 전자기기용 기판의 제조방법
US7088002B2 (en) * 2000-12-18 2006-08-08 Intel Corporation Interconnect
US7340076B2 (en) * 2001-05-10 2008-03-04 Digimarc Corporation Digital watermarks for unmanned vehicle navigation
US20020169962A1 (en) * 2001-05-10 2002-11-14 Brundage Trent J. Digital watermarks used in automation equipment
JP2004006538A (ja) * 2002-05-31 2004-01-08 Toshiba Corp コネクタの固定構造、印刷配線板およびコネクタ固定方法
US6867121B2 (en) * 2003-01-16 2005-03-15 International Business Machines Corporation Method of apparatus for interconnecting a relatively fine pitch circuit layer and adjacent power plane(s) in a laminated construction
US6876088B2 (en) 2003-01-16 2005-04-05 International Business Machines Corporation Flex-based IC package construction employing a balanced lamination
US7253510B2 (en) 2003-01-16 2007-08-07 International Business Machines Corporation Ball grid array package construction with raised solder ball pads
US20040173803A1 (en) * 2003-03-05 2004-09-09 Advanced Micro Devices, Inc. Interconnect structure having improved stress migration reliability
US8525402B2 (en) 2006-09-11 2013-09-03 3M Innovative Properties Company Illumination devices and methods for making the same
US8581393B2 (en) 2006-09-21 2013-11-12 3M Innovative Properties Company Thermally conductive LED assembly
US7847404B1 (en) * 2007-03-29 2010-12-07 Integrated Device Technology, Inc. Circuit board assembly and packaged integrated circuit device with power and ground channels
TWI356480B (en) * 2007-05-07 2012-01-11 Siliconware Precision Industries Co Ltd Semiconductor package substrate
CN107960004A (zh) * 2016-10-14 2018-04-24 鹏鼎控股(深圳)股份有限公司 可伸缩电路板及其制作方法
TWI711355B (zh) * 2019-12-10 2020-11-21 欣興電子股份有限公司 電路板及其製造方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468279A1 (fr) * 1979-10-19 1981-04-30 Dujardin Editions Procede de fabrication de plaques comportant au moins un circuit imprime
DE3619226A1 (de) * 1985-12-10 1987-06-11 Robotron Veb K Verdrahtungstraeger
US4720915A (en) * 1986-03-25 1988-01-26 True Grid, Ltd. Printed circuit board and process for its manufacture
JPS6437073A (en) * 1987-08-03 1989-02-07 Sony Corp Printed board
JPH01290283A (ja) * 1988-05-17 1989-11-22 Nec Corp 混成集積回路用厚膜印刷基板
US5468681A (en) * 1989-08-28 1995-11-21 Lsi Logic Corporation Process for interconnecting conductive substrates using an interposer having conductive plastic filled vias
US5184210A (en) * 1990-03-20 1993-02-02 Digital Equipment Corporation Structure for controlling impedance and cross-talk in a printed circuit substrate
US5288541A (en) * 1991-10-17 1994-02-22 International Business Machines Corporation Method for metallizing through holes in thin film substrates, and resulting devices
US5227008A (en) * 1992-01-23 1993-07-13 Minnesota Mining And Manufacturing Company Method for making flexible circuits
US5355019A (en) * 1992-03-04 1994-10-11 At&T Bell Laboratories Devices with tape automated bonding
US5291092A (en) * 1992-04-24 1994-03-01 Gte Products Corporation HID vehicle headlamp capsule assembly
US5334487A (en) * 1992-07-23 1994-08-02 International Business Machines Corporation Method for forming a patterned layer on a substrate
US5291062A (en) * 1993-03-01 1994-03-01 Motorola, Inc. Area array semiconductor device having a lid with functional contacts
US5447871A (en) * 1993-03-05 1995-09-05 Goldstein; Edward F. Electrically conductive interconnection through a body of semiconductor material
AU6582294A (en) * 1993-04-23 1994-11-21 Nihon Micron Kabushiki Kaisha Ic package and method of its manufacture
US5381306A (en) * 1993-08-20 1995-01-10 Convex Computer Corporation Method and apparatus for delivering power using a multiplane power via matrix
US5448020A (en) * 1993-12-17 1995-09-05 Pendse; Rajendra D. System and method for forming a controlled impedance flex circuit
US5463250A (en) * 1994-04-29 1995-10-31 Westinghouse Electric Corp. Semiconductor component package
US5840402A (en) * 1994-06-24 1998-11-24 Sheldahl, Inc. Metallized laminate material having ordered distribution of conductive through holes
US5487218A (en) * 1994-11-21 1996-01-30 International Business Machines Corporation Method for making printed circuit boards with selectivity filled plated through holes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100525578C (zh) * 2004-02-04 2009-08-05 Nxp股份有限公司 用于提高电路板的定线密度的方法和这种电路板

Also Published As

Publication number Publication date
US6153508A (en) 2000-11-28
KR20000016520A (ko) 2000-03-25
JP2000512083A (ja) 2000-09-12
WO1997048256A1 (en) 1997-12-18
US5753976A (en) 1998-05-19
MY133613A (en) 2007-11-30
DE19781552T1 (de) 1999-05-12

Similar Documents

Publication Publication Date Title
CN1221551A (zh) 具有通孔矩阵夹层连接的多层电路及其制造方法
US6242279B1 (en) High density wire bond BGA
US6477034B1 (en) Interposer substrate with low inductance capacitive paths
US5774340A (en) Planar redistribution structure and printed wiring device
US5032896A (en) 3-D integrated circuit assembly employing discrete chips
US4813129A (en) Interconnect structure for PC boards and integrated circuits
US6400573B1 (en) Multi-chip integrated circuit module
EP0526133B1 (en) Polyimide multilayer wiring substrate and method for manufacturing the same
JP2960276B2 (ja) 多層配線基板、この基板を用いた半導体装置及び多層配線基板の製造方法
US6876088B2 (en) Flex-based IC package construction employing a balanced lamination
JP3048905B2 (ja) 積層配線基板構造体、及びその製造方法
US5290971A (en) Printed circuit board provided with a higher density of terminals for hybrid integrated circuit and method of fabricating the same
EP0284624A1 (en) Method of forming a multichip integrated circuit package.
KR0157060B1 (ko) 실장기판
CN1123514A (zh) 可层叠的电路板结构及制造方法
EP0400332B1 (en) Thin film multilayer laminate interconnection board assembly method
CN1728918A (zh) 电路化衬底
US20020117753A1 (en) Three dimensional packaging
US5366794A (en) Tape carrier for semiconductor apparatus
US5861322A (en) Process for manufacturing an interconnection substrate to connect a chip onto a reception substrate
US6171946B1 (en) Pattern formation method for multi-layered electronic components
US6979644B2 (en) Method of manufacturing electronic circuit component
US20220322529A1 (en) Circuit board structure and manufacturing method thereof
HK1040569A1 (en) Improved integrated circuit structure
US7078311B2 (en) Substrate-embedded capacitor, production method thereof, and circuit board

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication