CN1507724A - multiple transport device - Google Patents

Abstract

A multiplexing device which compresses and multiplexes, for transmitting, transmission signals such as voice signals, fax signals and data modem signals. A signal input from an exchange side is compression-encoded or fax-modulated at a plurality of signal processing channels in a signal processing unit. A channel check signal is generated at a signal processing channel and sent to a facing multiplexing device, where a channel check signal is detected and an answer signal is returned, thereby making it possible to detect a signal processing channel trouble.

Description

multiple transport device

technical field

The present invention relates to a multiplexed transmission device that compresses and multiplexes transmission signals such as voice signals, facsimile signals, and data modulation and demodulation signals, and then transmits them.

Background technique

FIG. 5 shows a configuration example of a conventional multiplexing transmission device. In Fig. 5, 1 is a multi-channel voice signal, facsimile signal, and data modulation and demodulation signal input from the switch side, and these signals are decomposed into the switch interface part of each channel (described as switch I/F in Fig. 5 department). 2 is a voice detection signal recognition unit for judging the presence or absence of a voice signal for each channel decomposed by the switch interface unit 1, and identifying whether it is a voice signal, a facsimile signal, or a data modem signal (audio signal). 3 is a signal processing unit for inputting the signal of each channel disassembled by the switch interface unit 1 and performing signal processing corresponding to the type of the signal. The signal processing unit 3 performs compression code processing when the input signal is an audio signal, demodulation processing when the input signal is a facsimile signal, and compression code processing when the input signal is a data modulation-demodulation signal. In the signal processing unit 3, 4a and 4b are a plurality of signal processing channels for performing signal processing on each signal of each channel input from the switch interface unit 1, and when the input signal is an audio signal, the audio signal is compressed and coded. A processing system, and a facsimile signal processing system that performs demodulation processing when the input signal is a facsimile signal. In FIG. 4 they are each indicated by 4a, 4b. 5 is a sound symbolization circuit for compressing and symbolizing sound signals according to high-efficiency sound regulations (for example, ITU-T advises G.729 CS-ACELP regulations), and 6 is a fax demodulation circuit for demodulating fax signals (in FIG. 5 Described as FAX demodulation circuit). The data modulation and demodulation signal is compressed and symbolized according to the sound regulations for data modulation and demodulation transmission (for example, ITU-T advises G.726 ADPCM sound regulations), but the symbolization circuit and the sound symbolization circuit 5 are of the same type. Illustration omitted. In addition, in the signal processing part 3, 7 is a short cell combination circuit that combines the sound signal unit (cell) symbolized by the sound symbolization circuit 5 into a short cell (short cell) for asynchronous communication, and 8 is a short cell combination circuit that converts the sound signal unit (cell) into a short cell for asynchronous communication. The facsimile signal unit symbolized by the modulation circuit 6 is combined into a short unit combination device for asynchronous communication. In addition, 9 is a short unit decomposing circuit for decomposing short units storing voice signals in the asynchronous communication data transmitted from the opposite multiplex transmission device side, and 10 is decomposed asynchronous communication data transmitted from the opposite multiplex transmission device side. A short unit decomposing circuit for storing short units of facsimile signals in synchronous communication data. 11 is a voice decoding circuit for decoding the voice signal decomposed by the short unit decomposing circuit 9, and 12 is a facsimile modulation circuit for modulating the facsimile signal decomposed by the short unit decomposing circuit 10 (described as a FAX modulation circuit in FIG. 5 ). . 13 is an ATM interface section (ATM: asynchronous communication), which is used to store the short unit signal of the signal processing section 3 in the unit of asynchronous communication, multiplex the generated units and transfer them to the opposite unit according to asynchronous communication. The multiplex transmission device side transmits, and at the same time, the signal from the opposite multiplex transmission device side is multiplexed and de-celled. In the ATM interface section 13, 14 is a unitization section for storing the short cells from the short cell combining circuits 7 and 8 in the cells for asynchronous communication. Here, the unit of asynchronous communication is generally composed of a header part and a payload part, and there are payload parts in a plurality of short cells. 15 is an interface circuit for multiplexing the unit of asynchronous communication generated by the unitization unit 14 and multiplexing the transmission signal to the opposite multiplexed transmission device side, and 16 is for multiplexing the transmission signal from the opposite multiplexed transmission device side The transmission signal is decomposed into short units, and the decomposed unit circuit for decomposing unit processing. 17 is an asynchronous communication control circuit (described as an ATM control circuit in FIG. 5 ) for collecting statistical information such as the number of short units or the number of asynchronous communication units generated in a certain period of time, and these statistical information are output to the operation monitoring control unit 18. The operation monitoring control unit 18 monitors the operation of each part of the device, that is, sets the operation mode and monitors obstacles (movement obstacles, etc.) of each part, and inputs data between the operator and the console for operating these settings and monitoring these data output.

Hereinafter, the operation of a conventional multiplexing transmission device will be described. The exchange interface unit 1 inputs, for example, a 2.048 MHz signal (E1 signal) or a 1,544 MHz signal (T1 signal) conforming to ITU-T recommendation G703 or G704 from the exchange side. Various audio signals, facsimile signals, and data modulation and demodulation signals are multiplexed by a plurality of channels. The audio detection signal identification unit 2 determines whether the audio signal is voiced or not for each channel, and outputs it to the signal processing unit 3 that identifies whether it is an audio signal, a facsimile signal, or a data modem signal (audio signal). The signal processing unit 3 performs compression code processing when the input signal is an audio signal, and performs demodulation processing when the input signal is a facsimile signal. Compressed symbols are processed during data modulation and demodulation. This signal processing is carried out in the signal processing channels 4 a and 4 b in the signal processing unit 3 . The signal of each channel decomposed in the switch interface unit 1 is input to any one of the signal processing channels 4a or 4b. In this case, if the signal is an audio signal, it is input to the audio signal processing system 4a, and if the signal is a facsimile signal, it is input to the facsimile signal processing system 4b. The voice symbolization circuit 5 in the signal processing channel 4a compresses and codes the voiced part of the input signal of the switch interface unit 1 according to the voiced part of the input signal of the switch interface unit 1 according to the voiced and unvoiced judgment result from the voice detection signal recognition unit 2, and utilizes the short unit Combining circuit 7 combines the compressed and symbolized signal units on short units. The facsimile demodulation circuit 6 in the signal processing channel 4b facsimile-demodulates the input signal of the switch interface unit 1, and uses the short unit combining circuit 8 to combine the demodulated signal unit on the short unit. The short cell combined by the short cell combining circuit is input to the ATM interface section 13, and the unit for asynchronous communication exists in the unitizing circuit section 14. The interface circuit 15 multiplexes a plurality of units generated by the unitizing circuit 14 and transmits them to the opposing multiplex transmission device side by asynchronous communication.

In this way, the conventional multiplex transmission device compresses and multiplexes voice signals, facsimile signals, and data modem signals input from the switchboard and then transmits them to the opposing multiplex transmission device side, so that signals can be efficiently transmitted. The maximum transmission efficiency is when the multiple channels input to the interface of the switch are voice signals. At this time, for example, assuming that the vocal rate of the voice signal is 40%, and the compression degree of CS-ACELP is 8 times, then it can be multiplexed by 20 times in the voice transmission mode, so the number of channels for the signal input from the switch side is 20 The channel can make the transmission path of the opposite multiple transmission device into one channel, and can transmit efficiently.

However, in such an existing multiplexed transmission device, when an operation failure occurs in the signal processing unit 3 and its peripheral circuits (such as disconnection of a signal line, a short circuit, or a failure of a circuit element), it is not known what is happening in the circuit. Which part produces movement disorders. For example, when an operation obstacle occurs on a specific signal processing channel 4a or 4b of the signal processing part 3, the existing multiplex transmission device cannot specify it as an obstacle site, and cannot take action to disable the operation obstacle. There is a problem that the application efficiency is lowered due to measures such as taking measures such as taking a specific signal processing channel to stop the overall transmission function, or because the specific signal processing channel is used again and the signal cannot be transmitted due to an operation failure.

Contents of the invention

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a multiplex transmission device capable of detecting failure of each signal processing channel in a signal processing unit and enabling efficient transmission.

In order to achieve the above object, the multiple transmission method of the present invention is to generate a channel inspection signal on the signal processing channel, and the channel inspection signal is set in the unit of asynchronous communication and transmitted to the multiple transmission method of the opposite multiple transmission device side . According to this configuration, it is possible to detect whether or not a signal processing channel is obstructed on the side of the opposite multiplex transmission device that has received the channel check signal. In addition, when the opposite multiple transmission device side does not receive the channel check signal, it may be configured to transmit a channel check abnormality signal to the multiplex transmission device side that generates the channel check signal. According to this configuration, it is possible to detect whether or not a failure occurs in the signal processing channel in the multiplex transmission device that generates the channel check signal.

In addition, the multiplex transmission device of the present invention includes a channel check signal generating circuit that generates a channel check signal on a signal processing channel in the signal processing unit, and can detect the channel check signal generated by the channel check signal generating circuit by detecting Find out whether there is an obstacle in the above-mentioned signal processing channel. In addition, the channel check signal generation circuit may be configured to generate the channel check signal as one short unit in asynchronous communication. According to this configuration, the channel check signal can be multiplexed with other transmission signals and transmitted to the opposing multiplexed transmission device side. In addition, the channel check signal generated by the channel check signal generating circuit may be composed of a code indicating that it is a channel check signal and a code of a signal processing channel to which the channel check signal generating circuit belongs. According to this configuration, the channel check signal can be distinguished from other transmission signals, and at the same time, the signal processing channel in which the failure has occurred can be specified using the code of the signal processing channel.

In addition, the multiplex transmission device of the present invention includes an ATM interface unit that receives a channel check signal transmitted from the opposite multiplex transmission device side in accordance with an asynchronous communication method, and a channel check unit that detects the channel check signal received by the ATM interface unit. The signal detection circuit and the channel inspection processing circuit that generates the channel inspection response signal according to the notification received from the channel inspection signal detection circuit of the channel inspection signal detection circuit are to transmit the channel inspection response signal generated by the above-mentioned channel inspection processing circuit according to the asynchronous communication mode. The said ATM interface part transfers to the said opposite multiplexed transfer device side. According to this configuration, the channel check signal can be detected, and a response signal to the channel check signal can be transmitted to the opposing multiplex transmission device side.

Description of drawings

Fig. 1 is a block diagram showing the configuration of a multiplexing transmission device according to Embodiment 1 of the present invention.

Fig. 2 is a schematic diagram for explaining the structure of a channel check signal and a channel check response signal used in the multiplex transmission device according to Embodiment 1 of the present invention.

Fig. 3 is still another schematic diagram for explaining the structures of the channel check signal and the channel check response signal used in the multiplex transmission device according to Embodiment 1 of the present invention.

Fig. 4 is a flow chart showing the processing contents of the path check signal in the multiplex transmission device according to Embodiment 1 of the present invention.

FIG. 5 is a block diagram showing an example of a conventional multiplex transmission device.

Detailed ways

Embodiment 1

Fig. 1 is a block diagram showing the configuration of a multiplexing transmission device according to Embodiment 1 of the present invention. In FIG. 1, 19 and 20 are channel check signal generating circuits (described as CC signal generating circuits in FIG. 1) for generating channel check signals. The channel check generation circuit 19 is provided on each signal processing channel 4a which is the audio signal processing system, and the channel check signal generation circuit 20 is provided on each signal processing channel 4b which is the facsimile signal processing system. 21 and 22 denote a channel check signal detection circuit (described as a CC signal detection circuit in FIG. 1 ) for detecting a channel check signal included in a transmission signal from the opposing multiplexed transmission device side. The channel check signal detection circuit 21 is set on each signal processing channel 4a in the audio signal processing system, and the channel check signal detection circuit 22 is set on each signal processing channel 4b in the facsimile signal processing system. 23 is a channel check processing circuit (described as a CC processing circuit in FIG. 1 ), which is used to generate channel check signals to the channel check signal generating circuits 19 and 20 commands, and perform necessary steps according to the detection results of the channel check signal detection circuits 21 and 22. Control, again, in FIG. 1 , parts given the same symbols as those in FIG. 5 denote parts that are the same as or equivalent to those in FIG. 5 .

The signal transmission and channel checking operations of the multiplex transmission device according to Embodiment 1 will be described below. The transmission of audio signals, facsimile signals, and data modulation and demodulation signals is the same as that of the existing multiplex transmission device explained in accordance with FIG. In the short cell, the cell of asynchronous communication is stored in the ATM interface unit 13 and multiplexed, and transmitted to the opposite multiplexed transmission device side. And, the signal sent from the opposite multiplexed transmission device, in the ATM interface section 13, after performing the decomposing unit processing that the asynchronous communication unit is decomposed into short units, in each signal processing channel 4a and 4b, make a short unit Decompose and take out the sound signal (or data modulation and demodulation signal and facsimile signal, the sound signal and data modulation and demodulation signal are decoded, and the facsimile signal is modulated and then output to the switch interface unit 1.

A channel check is performed on each of the signal processing channels 4a and 4b, and channel check signals are generated in the channel check generation circuits 19 and 20 in the short unit combination circuits 7 and 8 of FIG. 1 . Also, the channel check signal generating circuits 19 and 20 may be arranged in the signal processing channels 4a and 4b. In Fig. 1, the channel check signal generating circuits 19 and 20 are arranged in the short unit combination circuits 7 and 8 because the data volume and circuit scale of the channel check signal are small, so even if it is attached to the short unit combination circuit, it will not increase. circuit size.

Here, the structure of the generated channel check signal will be described using FIG. 2 . As shown in Figure 2, the channel check signal is formed by setting the function type from the header side, the channel number where the CC signal is sent, the BCC response, and the error detection symbol. This composition sequence can be properly exchanged, and the error detection symbol can also be omitted. The function type is set to identify data related to the channel check, and either CC or BCC is set as the type. CC indicates the functional type of the channel check signal, and BCC indicates the functional type of the channel check response signal transmitted from the opposite multiplex transmission device side opposite to the channel check signal, and is identified by a code corresponding to CC or BCC. The channel number of the CC signal sending place is the code of the signal processing channel to which the channel check signal generation circuit that generates the channel check signal belongs. In order to specify the signal processing channel, a unique code is marked on each signal processing channel of the signal processing channels 4 a and 4 b for identification. The BCC response indicates whether the multiplex transmission device facing the channel check signal can receive normally, and only two values, normal or abnormal, are stored as values. The error detection symbol is a symbol set to detect whether the channel check signal can be correctly received in the multiplexed transmission device, for example, it is set to store data such as CRC (Cyclic Redundancy check; cyclic redundancy check) symbols.

The channel check signal can have the basic structure as shown in FIG. 2, but it can also have the following structure in accordance with a specific communication method. That is, the above channel inspection signal is defined on the OAM short unit specified in ITU-T recommendation I.363.2. FIG. 3 shows the structure of the channel inspection signal after it is defined on the OAM short unit. The short cell is formed of multiple data lines consisting of bits 0-7. First, the type of name such as failure management is set in the OAM type, and an identification code (for example, 0001, etc.) is stored. A short unit with this identification code belongs to the category of fault management. Next, the function type stores a code for distinguishing CC or BCC as explained with reference to FIG. 2 . It also stores the channel number of the CC signal transmission destination, the BCC response, the specified value indicating that it is an OAM short cell as the information type, and the error detection symbol. The channel number of the CC signal sending place, the BCC response, and the error detection symbol are the same as those described in FIG. 2 .

The channel check processing using the channel check signal having such a configuration will be described with reference to FIG. 4 .

First in step S1, the channel check processing circuit 23 in the multiplex transmission device A outputs a channel check signal generation command to any signal processing channel of the signal processing channels 4a and 4b for communication check. In FIG. 4, the term of the channel check is described as CC. The signal processing channel in the signal processing unit 3 that has received the channel check signal generation command generates the channel check signal configured as described above as a short cell and outputs it to the AMT interface unit 13 in step S2. In step S3, the ATM interface unit 13 transmits the input channel check signal to the unit of the asynchronous communication to the opposite multiplex transmission device B side.

The processing in the multiplexing transmission device B will be described below. In step S4, the ATM interface unit 13 in the multiplex transmission device B decomposes the received asynchronous communication unit, and then outputs a short unit composed of a channel check signal to the signal processing unit 3 . In the signal processing part 3, the short unit is input to the signal processing channel 4a or 4b, the short unit is decomposed in the short unit decomposition circuit 9 or 10 in the signal processing channel, and the channel test signal is detected by the channel test signal detection circuit 21 or 22. When a channel check signal is detected by the channel check signal detection circuits 21 and 22, the signal processing unit 3 outputs a channel check reception notification to the channel check processing circuit 23 in step S5. The channel check processing circuit 23 which has received this channel check acceptance notice generates a BCC response (normal) signal shown in FIG. 2 or FIG. 3 in step S6, and outputs it to the ATM interface unit 13. In step S7, the ATM interface unit 13 stores a BCC response (normal) signal in the asynchronous communication unit and transmits it to the multiplex transmission device A side.

In the multiplexing transmission device A, upon receiving the BCC response (normal) signal from the multiplexing transmission device B, in step S8, the ATM interface section 13 decomposes the asynchronous communication unit into short units, and outputs the BCC response to the channel check processing circuit 23 A short unit of a (normal) signal. The channel check processing circuit 23 confirms that the BCC response transmitted from the multiplex transmission device B side is normal, and does not perform abnormal processing, and moves to the beginning of the subsequent channel check process (step S1).

On the other hand, when the signal processing section 3 in the multiplex transmission device B fails to detect the path check signal, the path check processing circuit 23 in the multiplex transmission device B has passed a predetermined time period since the last notification of receiving the path check signal, and in step S9 generates a BCC response (abnormal) signal, and outputs it to the ATM interface unit 13 . In addition, the channel check processing circuit 23 outputs a channel check abnormality notification to the console 24 in step S10. Console 24 is that the operator of device utilizes monitor screen, keyboard etc., the man-machine interface that monitoring device is useful, utilizes the passage inspection abnormality notice shown on it, informs the operator to produce passage abnormality, input ATM interface part 13 in step S9 The BCC response (abnormal) signal is transmitted to the multiplex transmission device A in step S11. In the multiplexing transmission device A, upon receiving the BCC response (abnormal) signal from the multiplexing transmission device B, the ATM interface section 13 decomposes the asynchronous communication unit into short units in step S12, and outputs the BCC response ( exception) short unit of the signal. The channel check processing circuit 23 confirms that the BCC response sent from the multiplexing transmission device B is abnormal, and outputs a channel check abnormality notification to the console 24 in step S13 as a processing in case of abnormality. In addition, as an abnormal processing, it is also possible to prevent the signal from the switch interface 1 from being input to its signal processing channel, and automatically treat the abnormal signal processing channel as inoperable.

Furthermore, although the channel check signal is transmitted to the multiplex transmission device B in step S3, and even if the BCC response signal has not been received for a predetermined time, the channel check processing circuit 23 in the multiplex transmission device A uses step S14 to report to the console 24 Output no channel check response.

In the above, the multiplex transmission device A generates the path check signal and transmits it to the multiplex transmission device B side, and the multiplex transmission device B generates the response signal and sends it back to the multiplex transmission device A side. Since the multiplex transmission device A and B have the same structure, the channel check signal generated in the multiplex transmission device B can be transmitted to the multiplex transmission device A side, and in the multiplex transmission device A, the response signal can be sent to the multiplex transmission device A. send back to the B side of the transfer device.

Claims (6)

1. A multiple transmission method, decomposing the sound signals and facsimile signals of a plurality of channels input by the switch side in each channel, utilizing a plurality of signal processing channels, for the signal sound signal of each channel after the decomposing Sound symbolization processing, facsimile signals are demodulated, and these processed signals are multiplexed and transmitted from one multiplexed transmission device to the opposite multiplexed transmission device side according to an asynchronous communication method, characterized in that, A channel check signal is generated on the signal processing channel, and the generated channel check signal is set on the asynchronous communication unit and transmitted to the opposite multiple transmission device side. 2. The multiplex transmission method according to claim 1, wherein: On the side of the opposite multiplex transmission device, when receiving the channel check signal, set a channel check response signal on the asynchronous communication unit, and transmit it to the one multiplex transmission device. 3. A multiple transmission device, characterized in that it comprises The switch interface unit that divides the voice signals and fax signals of multiple channels input from the switch side into each channel, A signal processing unit that inputs signals from channels decomposed by the interface part of the switch, and has a plurality of signal processing channels for converting voice signals into voice symbols or facsimile demodulation of facsimile signals, and The ATM interface unit that multiplexes the signals of each channel after signal processing in the signal processing unit and transmits them to the opposite multiplex transmission device side according to the asynchronous communication method, The signal processing channel in the signal processing unit has a channel check signal generating circuit that generates a channel check signal. 4. The multiplexing device according to claim 3, wherein: The channel check signal generating circuit generates the channel check signal as a short unit of asynchronous communication. 5. The multiplex transfer device according to claim 3, wherein: The channel test signal generated by the channel test signal generation circuit has a code indicating that it is a channel test signal and a code of the signal processing channel to which the channel test signal generation circuit belongs. 6. A multiple transmission device, characterized in that it comprises An ATM interface unit that receives the path check signal transmitted from the opposing multiplexed transmission device through the asynchronous communication method, A channel check signal detection circuit for checking the channel check signal received by the ATM interface section at the check side, and A channel check processing circuit that generates a channel check response signal based on notification of channel check signal reception from the channel check signal detection circuit, According to the asynchronous communication method, the path check response signal generated by the path check processing circuit is transmitted from the ATM interface unit to the opposing multiplex transmission device side.

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