CN202995201U - Array substrate and display device - Google Patents

Array substrate and display device Download PDF

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Publication number
CN202995201U
CN202995201U CN 201220745769 CN201220745769U CN202995201U CN 202995201 U CN202995201 U CN 202995201U CN 201220745769 CN201220745769 CN 201220745769 CN 201220745769 U CN201220745769 U CN 201220745769U CN 202995201 U CN202995201 U CN 202995201U
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CN
China
Prior art keywords
thickness
substrate
pixel electrode
array base
base palte
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Expired - Lifetime
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CN 201220745769
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Chinese (zh)
Inventor
张家祥
郭建
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Abstract

The utility model discloses an array substrate and a display device which are used for accurately measuring the distance between pixel electrodes. The array substrate comprises a substrate, the pixel electrodes formed on the display area of the substrate and in matrix distribution and a plurality of detection electrodes for detecting the distance between adjacent pixel electrodes, wherein the detection electrodes are formed on the periphery of the substrate and have the same structure with the pixel electrodes. A reflecting metal layer is arranged under the detection electrodes, and the distance between the pixel electrodes and the substrate is equal to that between the detection electrodes and the substrate.

Description

A kind of array base palte and display device
Technical field
The utility model relates to the display technique field, relates in particular to a kind of array base palte and display device.
Background technology
In the display technique field, show (Thin Film Transistor-LiquidCrystal Display as tft liquid crystal, TFT-LCD) technical field, very strict for the requirement of the spacing between various function patterns, be correspondingly also very important to the monitoring of spacing.
This is because various functional film layer are all made by a whole tunic layer is carried out graphical technique.For example, it is by carrying out graphical technique and be made setting in advance metallic diaphragm on substrate or metal oxide rete that the substrate viewing area is pixel electrode that matrix arranges, general pixel electrode occupies the overwhelming majority of pixel region, that is to say, distance between adjacent two pixel electrodes is very near, approximately about 5 μ m.In case the distance between pixel electrode is less than or greater than 5 μ m, probably cause various bad phenomenon,, probably make between pixel electrode to be short-circuited lower than 5 μ m as the distance between the pixel electrode, cause crosstalking of signal, cause the display device operation irregularity.Therefore, display device is most important accurately to produce spacing between pixel electrode.Therefore, the monitoring to spacing is also extremely important in manufacturing process.
at present, in the process of making pixel electrode, by critical size (Critical Dimension, CD) test machine (also claiming the CD test machine) is monitored the spacing between pixel electrode, because the CD test machine is difficult to accurate detection to the spacing between the pixel electrode of viewing area, generally by at the array substrate peripheral region division a plurality of electrodes identical with pixel electrode structure, for example the electrode of 8x8 can be set, this detecting electrode and pixel electrode are completed with in a manufacture craft, and the size of the pixel electrode of making, shape is all identical, this electrode can be called detecting electrode, spacing by between the detecting electrode that detects outer peripheral areas reflects the spacing between the pixel electrode of viewing area.
Only have spacing between the detecting electrode of outer peripheral areas to equal spacing between pixel electrode, the accuracy that guarantee detects the spacing between pixel electrode.
Prior art, the detecting electrode of formation outer peripheral areas, that is to say that the thickness of pixel electrode equals the thickness of detecting electrode in the process that forms pixel electrode, also comprised forming the reflective metal layer that is positioned on substrate before forming detecting electrode.The light reflectance of this reflective metal layer is higher, makes CD detect machine examination and measures image more clearly, obtains the spacing between detecting electrode more accurately.
It is the array base palte sectional view of prior art pixel electrode area as Fig. 1.Array base palte comprises: substrate 10, be positioned at the gate insulator 20 on substrate 10, and be positioned at the passivation protection layer 30 on gate insulator 20, be positioned at the pixel electrode 40 on passivation protection layer 30.
Fig. 2 is the array base palte sectional view in prior art detecting electrode zone.Array base palte comprises: substrate 10, be positioned at the reflective metal layer 50 on substrate 10, and be positioned at the gate insulator 20 on reflective metal layer 50, be positioned at the passivation protection layer 30 on gate insulator 20, be positioned at the detecting electrode 60 on passivation protection layer 30.
By Fig. 1 and Fig. 2 as can be known, the distance between pixel electrode 40 and substrate 10 is less than the distance between detecting electrode 60 and substrate 10.Can make like this in the process of making pixel electrode and detecting electrode, because of the distance between the zone of exposure machine and pixel electrode to be formed be not equal to and the zone of detecting electrode to be formed between distance, cause the spacing that forms not identical, also just cause spacing between detecting electrode that CD detection machine measures can't accurately reflect spacing between pixel electrode.When the spacing between pixel electrode under deviant circumstance, the spacing that detects pixel electrode is normal and cause mass-producing the display device of operation irregularity.
The utility model content
The utility model embodiment provides a kind of array base palte and display device, in order to realize spacing between the Measurement accuracy pixel electrode.
The utility model embodiment provides a kind of array base palte to comprise: substrate, be formed on the substrate viewing area and be the pixel electrode that matrix is arranged, and be formed on the identical with described pixel electrode structure of substrate peripheral zone, for detection of a plurality of detecting electrodes of spacing between adjacent pixel electrodes; Be provided with reflective metal layer below this detecting electrode; Distance between described pixel electrode and described substrate equals the distance between detecting electrode and described substrate.
Preferably, also comprise: the gate insulator between substrate and pixel electrode, the passivation protection layer between gate insulator and pixel electrode; The thickness of described detecting electrode equals the thickness of pixel electrode, and the thickness of described reflective metal layer equals described gate insulator and passivation protection layer thickness sum.
Preferably, also comprise: the gate insulator between substrate and pixel electrode, the passivation protection layer between gate insulator and pixel electrode; And the insulation course between substrate and detecting electrode; The thickness of described detecting electrode equals the thickness of pixel electrode, and the thickness sum of described reflective metal layer and insulation course equals described gate insulator and passivation protection layer thickness sum.
Preferably, described insulation course is positioned on described reflective metal layer, and this insulation course and described passivation protection layer arrange with layer.
Preferably, described insulation course is positioned under described reflective metal layer, and this insulation course and described gate protection layer arrange with layer.
Preferably, the thickness of reflective metal layer equals the thickness of gate insulator, and the thickness of described insulation course equals the thickness of described passivation protection layer.
Preferably, the thickness of described insulation course equals the thickness of described gate insulator, and the thickness of described reflective metal layer equals the thickness of described passivation protection layer.
Preferably, also comprise the controlling grid scan line that is positioned at the gate insulator below, described reflective metal layer and described controlling grid scan line arrange with layer.
The utility model embodiment provides a kind of display device, comprises described array base palte.
In sum, the array base palte that the utility model embodiment provides, the detecting electrode of outer peripheral areas setting and the distance between substrate equal pixel electrode and basic between distance, in the process that forms pixel electrode and detecting electrode, distance between the zone of exposure machine and pixel electrode to be formed equal and the zone of detecting electrode to be formed between distance, exposure intensity is consistent, makes spacing between the pixel electrode of formation equal spacing between detecting electrode.Spacing between detecting electrode can accurately reflect the spacing between pixel electrode.Avoid spacing between the pixel electrode under deviant circumstance, detect spacing normal; And cause mass-producing the display device of operation irregularity.
Description of drawings
Fig. 1 is the array base palte schematic cross-section of prior art pixel region;
Fig. 2 is the array base palte schematic cross-section in the peripheral detecting electrode of prior art zone;
The array base palte schematic top plan view that Fig. 3 provides for the utility model the utility model embodiment;
Fig. 4 to be the utility model embodiment one corresponding with array base palte shown in Figure 3 A-A ' to sectional view;
Fig. 5 to be the utility model embodiment one corresponding with array base palte shown in Figure 3 B-B ' to sectional view;
Fig. 6 to be the utility model embodiment one corresponding with array base palte shown in Figure 3 C-C ' to sectional view;
Fig. 7 to be the utility model embodiment two corresponding with array base palte shown in Figure 3 B-B ' to sectional view;
Fig. 8 to be the utility model embodiment three corresponding with array base palte shown in Figure 3 B-B ' to sectional view.
Embodiment
The utility model embodiment provides a kind of array base palte and display device, in order to realize spacing between the Measurement accuracy pixel electrode.
The array base palte that the utility model embodiment equates by making pixel electrode and detecting electrode surface level guarantees that the exposure intensity of making pixel electrode and detecting electrode is identical, produces the identical a plurality of pixel electrodes of spacing and a plurality of detecting electrode.
Generally make 8x6 or the detecting electrode identical with parameters such as structure pixel electrode, spacings 8x8 in outer peripheral areas; Namely produce and the identical detecting electrode of pixel electrode, the spacing between pixel electrode facilitates CD to detect the measurement of machine with the reflection of the spacing between detecting electrode.
The below is take the array base palte of making TFT-LCD as the example explanation.
The array base palte integral body that the utility model provides comprises: substrate, be formed on the substrate viewing area and be the pixel electrode that matrix is arranged, and it is the zone identical with pixel electrode structure described viewing area to be formed on substrate peripheral, for detection of a plurality of detecting electrodes of spacing between adjacent pixel electrodes; Be provided with reflective metal layer below this detecting electrode; Distance between described pixel electrode and described substrate equals the distance between detecting electrode and described substrate.
Below by different embodiment explanations.
Referring to Fig. 3, array base palte comprises:
Substrate 1;
What be formed on substrate 1 viewing area (zone that surrounds as dotted line in Fig. 3) a plurality ofly is the pixel electrodes 2 that matrix is arranged;
Be formed on a plurality of detecting electrodes 3 that are the matrix arrangement of substrate 1 outer peripheral areas.
This array base palte guarantees that the distance between the upper surface of pixel electrode 2 and substrate 1 equals the distance between the upper surface of detecting electrode 3 and substrate 1;
Embodiment one:
Referring to Fig. 4 be shown in Figure 3 A-A ' to the array base palte sectional view, comprising:
Substrate 1; Be positioned at the gate insulator 4 on substrate 1; Be positioned at the passivation protection layer 5 of gate insulator 4 tops; Be positioned at the pixel electrode 2 of passivation protection layer 5 top;
Distance h=h1+h2+h3 between the upper surface of pixel electrode 2 upper surfaces and substrate 1, h1 are the thickness of gate insulator 4, and h2 is the thickness of passivation protection layer 5, and h3 is the thickness of pixel electrode 2.
Referring to Fig. 5 be shown in Figure 3 B-B ' to the sectional view of array base palte, comprising:
Substrate 1; Be positioned at the reflective metal layer 6 on substrate 1; Be positioned at the detecting electrode 3 of reflective metal layer 6 tops;
Distance h between the upper surface of detecting electrode 3 upper surfaces and substrate 1 '=h4+h5, h4 is the thickness of reflective metal layer 6, h5 is the thickness of detecting electrode 3.
The array base palte that the utility model embodiment provides, h=h '.
Preferably, the thickness of pixel electrode 2 equals the thickness of detecting electrode 3, i.e. h3=h5.The thickness h 4 of reflective metal layer 6 equals the thickness of gate insulator 4 and the thickness sum h1+h2 (h4=h1+h2) of passivation protection layer 5.
In specific implementation process, pixel electrode and detecting electrode are to form with in a Mapping Technology, that is to say, pixel electrode is to form by graphical technique on the identical same conductive film layer of thickness with detecting electrode, thickness is identical, that is to say h3=h5.
In specific implementation process, when making gate insulator and passivation protection layer, keep the part of viewing area, remove the part that outer peripheral areas is positioned at the reflective metal layer top, expose reflective metal layer.
Described reflective metal layer can be the certain thickness rete that forms separately.Perhaps with array base palte on the metallic diaphragm of other functions form simultaneously.
Referring to Fig. 6 be array base palte shown in Figure 3 B-B ' to sectional view, comprise simultaneously Fig. 4 and array base-plate structure shown in Figure 5.Can obtain, the distance between pixel electrode 2 and substrate 1 equals the distance between detecting electrode 3 and substrate 1.
Preferably, also be provided with grid and controlling grid scan line below the gate insulator of array base palte, grid and controlling grid scan line arrange with layer and same technique formation.The reflective metal layer that the utility model embodiment provides can form simultaneously with grid (or controlling grid scan line), namely forms with in a manufacture craft with grid (controlling grid scan line).The material that forms is identical, and thickness is identical.
Preferably, described reflective metal layer can be aluminium lamination, the molybdenum layer of individual layer, or the copper layer etc., be perhaps the alloy of at least two kinds of metals.Be perhaps aluminium lamination, molybdenum layer, or the two metal layers of at least two kinds of different metals formation in the copper layer.
Described pixel electrode and detecting electrode are transparent conductive film layer, for example indium tin oxide ITO or silver-colored zinc oxide ITO.
Embodiment two:
Array base palte shown in Figure 3 A-A ' to sectional view identical with sectional view shown in Figure 4.
Array base palte shown in Figure 3 B-B ' to sectional view different from sectional view shown in Figure 5.
Compare with embodiment one, also be provided with insulation course below detecting electrode.Embodiment two insulation courses are arranged on the top of reflective metal layer.
Referring to Fig. 7, for array base palte shown in Figure 3 B-B ' to sectional view, comprising:
Substrate 1; Be positioned at the reflective metals laminar substrate 6 on substrate 1; Insulation course 7 on reflective metals laminar substrate 6; Detecting electrode 3 on insulation course 7;
Distance h between the upper surface of detecting electrode 3 upper surfaces and substrate 1 '=h4+h5+h6, h4 is the thickness of reflective metal layer 6, and h5 is the thickness of detecting electrode 3, and h6 is the thickness of insulation course 7; H4+h5+h6=h1+h2+h3.
Preferably, the thickness h 6 of insulation course 7 equals the thickness h 2(h2=h6 of passivation protection layer 5); The thickness h 3 of pixel electrode 2 equals the thickness h 5(h3=h5 of detecting electrode 3); The thickness h 1 of gate insulator 4 equals the thickness (h1=h4) of reflective metal layer h4.
In specific implementation process, pixel electrode and detecting electrode form with a manufacture craft, and passivation protection layer and insulation course are forming with in a Mapping Technology.The utility model is not increasing any technological process.
Embodiment three:
Array base palte shown in Figure 3 A-A ' to sectional view identical with sectional view shown in Figure 4.
Array base palte shown in Figure 3 B-B ' to sectional view different from sectional view shown in Figure 5.
The embodiment two that compares, insulation course is arranged on the below of reflective metal layer.
Referring to Fig. 8, for array base palte shown in Figure 3 B-B ' to sectional view, comprising:
Substrate 1; Be positioned at the insulation course 7 on substrate 1; Be positioned at the reflective metals laminar substrate 6 on insulation course 7; Be positioned at the detecting electrode 3 on reflective metal layer 6;
Distance h between the upper surface of detecting electrode 3 upper surfaces and substrate 1 '=h4+h5+h6, h4 is the thickness of reflective metal layer 6, and h5 is the thickness of detecting electrode 3, and h6 is the thickness of insulation course 7.h4+h5+h6=h1+h2+h3。
Preferably, the thickness h 6 of insulation course 7 equals the thickness h 1(h1=h6 of gate insulator 4); The thickness h 4 of reflective metal layer 6 equals the thickness h 2(h2=h4 of passivation protection layer 5); The thickness h 3 of pixel electrode 2 equals the thickness h 5(h3=h5 of detecting electrode 3).
In specific implementation process, pixel electrode and detecting electrode are forming with in a manufacture craft, and gate insulator and insulation course 7 are forming with in a manufacture craft.
The described structure with a manufacture craft formation of the utility model embodiment namely arranges with layer.Thickness is identical with material at least for the structure that arranges with layer.
The described graphical or composition technique of the utility model embodiment is also namely passed through the processes such as mask, exposure, development, photoetching, etching.
Above-mentioned three embodiment of the utility model guarantee that all the distance between pixel electrode and upper surface of base plate equals the distance between detecting electrode and upper surface of base plate.Generally, in the process of making pixel electrode and detecting electrode, when one whole layer of metallic diaphragm exposed, distance between exposure machine and pixel electrode and equating with distance between detecting electrode, on the pair array substrate, the exposure intensity of the metallic diaphragm of viewing area and outer peripheral areas equates, distance between the pixel electrode of viewing area is also that spacing equals the spacing between the outer peripheral areas detecting electrode.Spacing between the detecting electrode that assurance CD detection machine examination measures can accurately reflect the spacing between pixel electrode.In specific implementation process, in case the spacing between pixel electrode does not meet preset value, can adopt immediately measure, for example can stop immediately the making of this step process, prevent that the product work that final production goes out is abnormal, because display device is batch production, in case occur bad and accurately do not detected in some links, will cause the yields of product to descend, cause huge economic loss.
Need to prove, the utility model is only that gate insulator under the pixel electrode and passivation protection layer are as the example explanation.The rete that arranges on the substrate of pixel electrode below is not limited to gate insulator and passivation protection layer, can be also other retes, and the quantity of rete is not limited to two-layer.Any distance that can satisfy between pixel electrode and substrate equals or is approximately equal to distance between detecting electrode and substrate, make distance between exposure machine and pixel electrode equal distance between exposure machine and detecting electrode, all cover utility model order of the present utility model.
The utility model embodiment also provides a kind of display device, comprises the array base palte that above-described embodiment provides.Display device can be liquid crystal panel, liquid crystal display, LCD TV etc.
In sum, the array base palte that the utility model embodiment provides, the detecting electrode of outer peripheral areas setting and the distance between substrate equal pixel electrode and basic between distance, in the process that forms pixel electrode and detecting electrode, distance between the zone of exposure machine and pixel electrode to be formed equal and the zone of detecting electrode to be formed between apart from the time, exposure intensity is consistent, makes spacing between the pixel electrode of formation equal spacing between detecting electrode.Spacing between detecting electrode can accurately reflect the spacing between pixel electrode.Avoid spacing between the pixel electrode under deviant circumstance, detect spacing normal; And cause mass-producing the display device of operation irregularity.
Obviously, those skilled in the art can carry out various changes and modification and not break away from spirit and scope of the present utility model the utility model.Like this, if within of the present utility model these are revised and modification belongs to the scope of the utility model claim and equivalent technologies thereof, the utility model also is intended to comprise these changes and modification interior.

Claims (9)

1. array base palte comprises substrate, is formed on the substrate viewing area and is the pixel electrode that matrix is arranged, and is formed on the identical with described pixel electrode structure of substrate peripheral zone, for detection of a plurality of detecting electrodes of spacing between adjacent pixel electrodes; Be provided with reflective metal layer below this detecting electrode; It is characterized in that the distance between described pixel electrode and described substrate equals the distance between described detecting electrode and described substrate.
2. array base palte according to claim 1, is characterized in that, also comprises: the gate insulator between substrate and pixel electrode, the passivation protection layer between gate insulator and pixel electrode; The thickness of described reflective metal layer equals described gate insulator and passivation protection layer thickness sum.
3. array base palte according to claim 1, is characterized in that, also comprises: the gate insulator between substrate and pixel electrode, the passivation protection layer between gate insulator and pixel electrode; And the insulation course between substrate and detecting electrode; The thickness sum of described reflective metal layer and insulation course equals described gate insulator and passivation protection layer thickness sum.
4. array base palte according to claim 3, is characterized in that, described insulation course is positioned on described reflective metal layer, and this insulation course and described passivation protection layer arrange with layer.
5. array base palte according to claim 3, is characterized in that, described insulation course is positioned under described reflective metal layer, and this insulation course and described gate protection layer arrange with layer.
6. array base palte according to claim 4, is characterized in that, the thickness of described reflective metal layer equals the thickness of gate insulator, and the thickness of described insulation course equals the thickness of described passivation protection layer.
7. array base palte according to claim 5, is characterized in that, the thickness of described insulation course equals the thickness of described gate insulator, and the thickness of described reflective metal layer equals the thickness of described passivation protection layer.
8. array base palte according to claim 4, is characterized in that, also comprises the controlling grid scan line that is positioned at the gate insulator below, and described reflective metal layer and described controlling grid scan line arrange with layer.
9. a display device, is characterized in that, comprises the described array base palte of the arbitrary claim of claim 1-8.
CN 201220745769 2012-12-28 2012-12-28 Array substrate and display device Expired - Lifetime CN202995201U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107123745A (en) * 2017-04-27 2017-09-01 上海天马有机发光显示技术有限公司 Pel array and preparation method thereof, display panel and display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107123745A (en) * 2017-04-27 2017-09-01 上海天马有机发光显示技术有限公司 Pel array and preparation method thereof, display panel and display device
CN107123745B (en) * 2017-04-27 2018-12-14 上海天马有机发光显示技术有限公司 Pixel array and preparation method thereof, display panel and display device

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ASS Succession or assignment of patent right

Owner name: JINGDONGFANG SCIENCE AND TECHNOLOGY GROUP CO., LTD

Free format text: FORMER OWNER: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY CO., LTD.

Effective date: 20150706

Owner name: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY

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Effective date of registration: 20150706

Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No.

Patentee after: BOE TECHNOLOGY GROUP Co.,Ltd.

Patentee after: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd.

Address before: 100176 Beijing city in Western Daxing District economic and Technological Development Zone, Road No. 8

Patentee before: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd.

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Granted publication date: 20130612

CX01 Expiry of patent term