CN205123711U - Analog -to -digital conversion chip volume production test circuit - Google Patents

Abstract

The utility model relates to the technical field of chip testing, in particular to an analog-to-digital conversion chip mass production testing circuit. In an embodiment of the present invention, the analog-to-digital conversion chip mass production test circuit includes an automatic test device and a multi-channel digital-to-analog conversion circuit, and the digital-to-analog conversion circuit converts the digital signal output by the automatic test device into an analog The signal is then output to the A/D conversion chip under test, and the automatic test equipment can test whether the output of the A/D conversion chip is correct to complete the test. In an embodiment of the present utility model, each digital-to-analog conversion circuit only occupies three channels of the automatic test equipment, and the three channels occupied by each digital-to-analog conversion circuit are different from each other, that is, the automatic test equipment has three channels in the original channel number. Under the same condition, multiple digital-to-analog conversion circuits can be connected at the same time, and each digital-to-analog conversion circuit corresponds to a tested analog-to-digital conversion chip, so that the number of chips that can be tested at the same time is increased, and the test cost is reduced.

Description

A mass production test circuit for an analog-to-digital conversion chip

technical field

The utility model relates to the technical field of chip testing, in particular to an analog-to-digital conversion chip mass production test circuit.

Background technique

Generally, in the manufacturing process of all electronic components (including integrated chips, discrete components, etc.), there is a need to remove the false and save the real. This need is actually an experimental process, that is, to test each electronic component through automatic testing equipment. authenticity. When it comes to testing electronic components, the lower the cost of test, the better.

At present, there are two ways to reduce the cost of chip testing: one is to increase the number of chips that can be tested at the same time (referred to as the same test number), and the other is to reduce the test time of each chip, that is, within the same time, the number of chips tested is higher. The more, the lower the production cost. The number of chips that can be tested simultaneously is determined by the number of channels and power supplies of the automatic test equipment. At present, there are two main methods when testing analog-to-digital conversion chips in batches: one is to directly supply power to the tested analog-to-digital conversion chip from the precise power supply of the automatic test equipment, and the automatic test equipment directly outputs an analog signal to the tested analog-digital converter. Convert the chip, and then measure the output of the tested analog-to-digital conversion chip; the other is to equip the automatic test equipment with a digital-to-analog conversion board for testing the analog-to-digital conversion chip, and the automatic test equipment outputs a digital signal to the digital-to-analog converter. A conversion board, the digital-to-analog conversion board processes the digital signal and outputs a triangular wave or sine wave to the tested analog-to-digital conversion chip, and then the automatic test equipment tests the output of the tested analog-to-digital conversion chip.

The disadvantages of the first test method are: (1) Since there are not many precise power supplies of the automatic test equipment, generally 8, the precise power supply of the automatic test equipment needs to be occupied to supply power to the chip under test, which will limit the chips that can be tested at the same time (2) This test method is susceptible to external interference; (3) The test time is long.

The shortcoming of the second kind of test method is: (1) on the automatic test equipment, a board card specially equipped with a test analog-to-digital conversion chip will occupy more channel resources of the automatic test equipment, causing the number of chips that can be tested simultaneously to be limited; ( 2) The test time is long.

Utility model content

The purpose of this utility model is to provide a mass production test circuit of an analog-to-digital conversion chip, aiming at solving the problem of directly supplying power to the analog-to-digital conversion chip by the precise power supply of the automatic test equipment in the prior art or by configuring the digital-to-analog conversion board. Converting chips for testing results in the limitation of the number of chips that can be tested simultaneously, long testing time, and high cost.

The utility model is realized in this way. The utility model provides a mass production test circuit of an analog-to-digital conversion chip, which is connected with a plurality of tested analog-to-digital conversion chips. It is characterized in that the mass production test circuit of the analog-to-digital conversion chip includes :

The test terminal is connected to the output terminals of the plurality of tested analog-to-digital conversion chips, and the automatic test equipment for detecting whether the output of the plurality of tested analog-to-digital conversion chips is correct;

Multiple digital-to-analog conversion circuits, the three input terminals of each digital-to-analog conversion circuit are respectively connected to the three channels corresponding to the automatic test equipment, and the output terminals of each digital-to-analog conversion circuit are connected to the corresponding tested The input terminal of the analog-to-digital conversion chip is connected, and the digital-to-analog conversion circuit converts the digital signal output by the automatic test equipment into an analog signal and then outputs it to the tested analog-to-digital conversion chip.

Further, each of the digital-to-analog conversion circuits includes a digital-to-analog conversion unit and an amplification unit;

The three input terminals of the digital-to-analog conversion unit are respectively connected to the three channels corresponding to the automatic test equipment, the output terminals of the digital-to-analog conversion unit are connected to the amplification unit, and the output terminals of the amplification unit are connected to the corresponding The analog-to-digital conversion chip under test is connected.

Further, the digital-to-analog conversion unit includes:

Digital-to-analog conversion chip U1, filter capacitor C1 and filter capacitor C2;

The data input pin SDI, the clock pin SCLK, and the chip select pin CS of the digital-to-analog conversion chip U1 are respectively the three input ends of the digital-to-analog conversion unit, and the digital ground pin DGND of the digital-to-analog conversion chip U1 is grounded, so The power supply pin VCC of the digital-to-analog conversion chip U1, the reference voltage pin VREF of the digital-to-analog conversion chip U1, the first end of the filter capacitor C1, and the first end of the filter capacitor C2 are jointly connected to the +5V power supply, The analog ground pin AGND of the digital-to-analog conversion chip U1, the second end of the filter capacitor C1 and the second end of the filter capacitor C2 are commonly connected to the ground, and the voltage output pin VOUT of the digital-to-analog conversion chip U1 is connected to the ground. the amplification unit.

Further, the amplifying unit includes:

Operational amplifier U2, filter capacitor C3 and filter capacitor C4;

The input pin IN+ of the operational amplifier U2 is connected to the voltage output pin VOUT of the digital-to-analog conversion chip U1, and the negative power supply pin V- of the operational amplifier U2 and the first end of the filter capacitor C3 are jointly connected to the -15V power supply , the second end of the filter capacitor C3 is grounded, the positive power supply pin V+ of the operational amplifier U2 and the first end of the filter capacitor C4 are jointly connected to the +15V power supply, and the second end of the filter capacitor C4 is grounded, The voltage feedback pin VOS of the operational amplifier U2 and the output pin OUT of the operational amplifier U2 are commonly connected to the analog-to-digital conversion chip under test.

In an embodiment of the present invention, the analog-to-digital conversion chip mass production test circuit includes an automatic test device and a multi-channel digital-to-analog conversion circuit, and the digital-to-analog conversion circuit converts the digital signal output by the automatic test device into an analog The signal is then output to the A/D conversion chip under test, and the automatic test equipment can test whether the output of the A/D conversion chip is correct to complete the test. In an embodiment of the present utility model, each digital-to-analog conversion circuit only occupies three channels of the automatic test equipment, and the three channels occupied by each digital-to-analog conversion circuit are different from each other, that is, the automatic test equipment has three channels in the original channel number. Under the same condition, multiple digital-to-analog conversion circuits can be connected at the same time, and each digital-to-analog conversion circuit corresponds to a tested analog-to-digital conversion chip, so that the number of chips that can be tested at the same time is increased, and the test cost is reduced.

Description of drawings

Fig. 1 is the block diagram of the analog-to-digital conversion chip mass production test circuit that the utility model embodiment provides;

Fig. 2 is a circuit diagram of the mass production test circuit of the analog-to-digital conversion chip provided by the embodiment of the present invention.

detailed description

In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model, and are not intended to limit the utility model.

FIG. 1 shows a block diagram of a mass production test circuit for an analog-to-digital conversion chip provided by an embodiment of the present invention. For ease of description, only the parts related to the embodiment of the present utility model are shown.

A mass production test circuit for an analog-to-digital conversion chip, connected to a plurality of tested analog-to-digital conversion chips 1, including:

The test terminal is connected to the output terminals of a plurality of tested analog-to-digital conversion chips 1, and an automatic test device 2 is used to detect whether the outputs of the plurality of tested analog-to-digital conversion chips 1 are correct;

Multiple digital-to-analog conversion circuits 3, the three input terminals of each digital-to-analog conversion circuit 3 are respectively connected to the three channels corresponding to the automatic test equipment 2, and the output terminals of each digital-to-analog conversion circuit 3 are connected to the corresponding tested The input end of the analog-to-digital conversion chip 1 is connected, and the digital-to-analog conversion circuit 3 converts the digital signal output by the automatic test equipment 2 into an analog signal and outputs it to the tested analog-to-digital conversion chip.

As an embodiment of the present invention, the tested analog-to-digital conversion chip 1 may be a successive approximation digital-to-analog conversion chip.

Fig. 2 shows a circuit diagram of a mass production test circuit for an analog-to-digital conversion chip provided by an embodiment of the present invention. For ease of description, only the parts related to the embodiment of the present utility model are shown.

As shown in Figure 2, each digital-to-analog conversion circuit 3 includes a digital-to-analog conversion unit 31 and an amplification unit 32;

The three input terminals of the digital-to-analog conversion unit 31 are respectively three channels corresponding to the automatic test equipment 2, the output terminal of the digital-to-analog conversion unit 31 is connected to the amplifying unit 32, and the output terminal of the amplifying unit 32 is connected to the corresponding analog-to-digital conversion unit under test. Chip 1 is connected.

As an embodiment of the present invention, the digital-to-analog conversion unit 31 includes:

Digital-to-analog conversion chip U1, filter capacitor C1 and filter capacitor C2;

The data input pin SDI, clock pin SCLK and chip selection pin CS of the digital-to-analog conversion chip U1 are the three input terminals of the digital-to-analog conversion unit, the digital ground pin DGND of the digital-to-analog conversion chip U1 is grounded, and the power supply of the digital-to-analog conversion chip U1 The pin VCC, the reference voltage pin VREF of the digital-to-analog conversion chip U1, the first end of the filter capacitor C1 and the first end of the filter capacitor C2 are jointly connected to the +5V power supply, the analog ground pin AGND of the digital-to-analog conversion chip U1, and the filter capacitor C1 The second terminal of the filter capacitor C2 and the second terminal of the filter capacitor C2 are both connected to the ground, and the voltage output pin VOUT of the digital-to-analog conversion chip U1 is connected to the amplification unit.

As an embodiment of the present utility model, the amplifying unit 32 includes:

Operational amplifier U2, filter capacitor C3 and filter capacitor C4;

The input pin IN+ of the operational amplifier U2 is connected to the voltage output pin VOUT of the digital-to-analog conversion chip U1, the negative power supply pin V- of the operational amplifier U2 and the first end of the filter capacitor C3 are jointly connected to the -15V power supply, and the second end of the filter capacitor C3 Grounding, the positive power supply pin V+ of the operational amplifier U2 and the first end of the filter capacitor C4 are connected to the +15V power supply, the second end of the filter capacitor C4 is grounded, the voltage feedback pin VOS of the operational amplifier U2 and the output pin OUT of the operational amplifier U2 Commonly connected to the tested analog-to-digital conversion chip.

As an embodiment of the present invention, the model of the digital-to-analog conversion chip U1 is DACA8830, and may be other models.

As an embodiment of the present invention, the model of the operational amplifier U2 is OP177, and may be other models.

Below in conjunction with concrete working principle, the embodiment of the utility model is further described:

When the analog-to-digital conversion chip is tested, the general test principle is: the automatic test equipment outputs an analog signal to the tested analog-to-digital conversion chip, and the tested analog-to-digital conversion chip converts the analog signal into a digital signal and then outputs it. Then take the output value of the tested analog-to-digital conversion chip by the automatic test equipment to see if it is correct, so as to achieve the purpose of removing the false and preserving the true.

In an embodiment of the present invention, when the tested analog-to-digital conversion chip 1 is tested, the automatic test equipment 2 outputs a digital signal to the digital-to-analog conversion circuit 3, and the digital-to-analog conversion unit 31 in the digital-to-analog conversion circuit 3 will The digital signal is converted into an analog signal and output to the amplifying unit 32, and the amplifying unit 32 amplifies the analog signal and outputs it to the tested analog-to-digital conversion chip 1, and the automatic test equipment 2 takes the output value of the tested analog-to-digital conversion chip 1 , and whether the detection is correct, the authenticity of the tested analog-to-digital conversion chip 1 can be detected.

In an embodiment of the present invention, the analog-to-digital conversion chip mass production test circuit includes an automatic test device and a multi-channel digital-to-analog conversion circuit, and the digital-to-analog conversion circuit converts the digital signal output by the automatic test device into an analog The signal is then output to the A/D conversion chip under test, and the automatic test equipment can test whether the output of the A/D conversion chip is correct to complete the test. In an embodiment of the present utility model, each digital-to-analog conversion circuit only occupies three channels of the automatic test equipment, and the three channels occupied by each digital-to-analog conversion circuit are different from each other, that is, the automatic test equipment has three channels in the original channel number. Under the same condition, multiple digital-to-analog conversion circuits can be connected at the same time, and each digital-to-analog conversion circuit corresponds to a tested analog-to-digital conversion chip, so that the number of chips that can be tested at the same time is increased, and the test cost is reduced.

The above descriptions are only preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present utility model shall be included in this utility model. within the scope of protection of utility models.

Claims (4)

1. A kind of analog-to-digital conversion chip mass production test circuit, is connected with a plurality of measured analog-to-digital conversion chips, it is characterized in that, described analog-to-digital conversion chip mass production test circuit comprises: The test terminal is connected to the output terminals of the plurality of tested analog-to-digital conversion chips, and the automatic test equipment for detecting whether the output of the plurality of tested analog-to-digital conversion chips is correct; Multiple digital-to-analog conversion circuits, the three input terminals of each digital-to-analog conversion circuit are respectively connected to the three channels corresponding to the automatic test equipment, and the output terminals of each digital-to-analog conversion circuit are connected to the corresponding tested The input terminal of the analog-to-digital conversion chip is connected, and the digital-to-analog conversion circuit converts the digital signal output by the automatic test equipment into an analog signal and then outputs it to the tested analog-to-digital conversion chip. 2. the analog-to-digital conversion chip mass production test circuit as claimed in claim 1, is characterized in that, described each road digital-to-analog conversion circuit all comprises digital-to-analog conversion unit and amplifying unit; The three input terminals of the digital-to-analog conversion unit are respectively connected to the three channels corresponding to the automatic test equipment, the output terminals of the digital-to-analog conversion unit are connected to the amplification unit, and the output terminals of the amplification unit are connected to the corresponding The analog-to-digital conversion chip under test is connected. 3. the analog-to-digital conversion chip mass production test circuit as claimed in claim 2, is characterized in that, described digital-to-analog conversion unit comprises: Digital-to-analog conversion chip U1, filter capacitor C1 and filter capacitor C2; The data input pin SDI, the clock pin SCLK, and the chip select pin CS of the digital-to-analog conversion chip U1 are respectively the three input ends of the digital-to-analog conversion unit, and the digital ground pin DGND of the digital-to-analog conversion chip U1 is grounded, so The power supply pin VCC of the digital-to-analog conversion chip U1, the reference voltage pin VREF of the digital-to-analog conversion chip U1, the first end of the filter capacitor C1, and the first end of the filter capacitor C2 are jointly connected to the +5V power supply, The analog ground pin AGND of the digital-to-analog conversion chip U1, the second end of the filter capacitor C1 and the second end of the filter capacitor C2 are commonly connected to the ground, and the voltage output pin VOUT of the digital-to-analog conversion chip U1 is connected to the ground. the amplification unit. 4. the analog-to-digital conversion chip mass production test circuit as claimed in claim 3, is characterized in that, described amplifying unit comprises: Operational amplifier U2, filter capacitor C3 and filter capacitor C4; The input pin IN+ of the operational amplifier U2 is connected to the voltage output pin VOUT of the digital-to-analog conversion chip U1, and the negative power supply pin V- of the operational amplifier U2 and the first end of the filter capacitor C3 are jointly connected to the -15V power supply , the second end of the filter capacitor C3 is grounded, the positive power supply pin V+ of the operational amplifier U2 and the first end of the filter capacitor C4 are jointly connected to the +15V power supply, and the second end of the filter capacitor C4 is grounded, The voltage feedback pin VOS of the operational amplifier U2 and the output pin OUT of the operational amplifier U2 are commonly connected to the analog-to-digital conversion chip under test.