CN211237681U - Receiving card and display control card assembly - Google Patents

Abstract

The embodiment of the utility model provides a receive the card and adopt the display control card subassembly of receiving the card. The receiving card includes, for example: a circuit board; the programmable logic device is arranged on the circuit board; the memory device is arranged on the circuit board and connected with the programmable logic device; the plug-in assembly is arranged on the circuit board and connected with the programmable logic device; the TYPE-C interface is arranged on the circuit board and connected with a SerDes channel configured by the programmable logic device; and the power supply circuit is arranged on the circuit board and connected with the TYPE-C interface. The embodiment of the utility model provides an adopt TYPE-C interface and connect to programmable logic device's SerDes passageway, borrow this transmission rate that can promote whole receiving card.

Description

Receiving card and display control card assembly

Technical Field

The utility model relates to a LED shows technical field, especially relates to a receiving card and a display control board subassembly.

Background

Besides the advantages of high brightness and wide color gamut, the LED display screen has the advantages of being capable of being flexibly spliced into a large display screen. The LED display screen is formed by splicing one display box body which is provided with receiving cards, and the receiving cards arranged on the display box body are connected through a network cable and used for transmitting image data signals. The LED display screen industry has been developed for many years, but the products generally stay at the transmission rate of 1Gbps for the current market; with the development of the LED display screen towards the small-distance display screen, the transmission rate of 1Gbps is obviously insufficient.

SUMMERY OF THE UTILITY MODEL

In order to overcome some of the drawbacks and deficiencies in the related art, embodiments of the present invention provide a receiving card and a display control card assembly.

On the one hand, the embodiment of the utility model provides a receiving card that provides, include: a circuit board; the programmable logic device is arranged on the circuit board; the memory device is arranged on the circuit board and connected with the programmable logic device; the plug-in assembly is arranged on the circuit board and connected with the programmable logic device; the TYPE-C interface is arranged on the circuit board and connected with a SerDes channel configured by the programmable logic device; and the power supply circuit is arranged on the circuit board and connected with the TYPE-C interface.

In the embodiment, the TYPE-C interface comprising a power signal pin group and a plurality of pairs of differential signal pins is adopted and connected to the SerDes channel of the programmable logic device, and the SerDes channel is a high-speed serial data channel, so that the transmission rate of the whole receiving card can be improved; moreover, the TYPE-C interface can also transmit power signals outwards, so that the connection between the receiving card and other devices can be simplified, and the data transmission rate is improved.

In an embodiment of the present invention, the number of TYPE-C interfaces is plural, and each TYPE-C interface includes a power signal pin group, a plurality of pairs of differential signal pins, and a control signal pin group; the multiple pairs of differential signal pins are electrically connected with at least one SerDes channel configured by the programmable logic device, the control signal pin group is electrically connected with multiple control I/O ports configured by the programmable logic device, and the power supply signal pin group is electrically connected with the power supply circuit.

In one embodiment of the present invention, each of the SerDes channels includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a data transmission differential signal pair and the other pair of differential signal lines is a data reception differential signal pair.

In one embodiment of the present invention, each of the SerDes channels includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a data transmission differential signal pair and the other pair of differential signal lines is a data reception differential signal pair.

In one embodiment of the present invention, the connector assembly includes a display data signal pin set and a display control signal pin set; the display data signal pin group and the display control signal pin group are respectively and electrically connected with the programmable logic device; the display data signal pin group is a display data single-ended signal pin group and/or a display data differential signal pin group; and the display data differential signal pin set is an LVDS differential signal pin set.

In another aspect, an embodiment of the present invention provides a display control card assembly, including: the receiving card and at least one interface adapter; wherein, every interface adapter passes through TYPE-C cable connection receive one of card TYPE-C interface.

In an embodiment of the present invention, the at least one interface adapter includes an optical fiber transmission interface adapter, and the optical fiber transmission interface adapter includes: the photoelectric conversion device comprises a second circuit board, a first direct current-direct current circuit, a photoelectric conversion module and a second TYPE-C interface, wherein the first direct current-direct current circuit, the photoelectric conversion module and the second TYPE-C interface are arranged on the second circuit board; the first direct current-direct current circuit is electrically connected with the second TYPE-C interface and the photoelectric conversion module and is used for acquiring a power supply signal from the second TYPE-C interface and providing working voltage for the photoelectric conversion module; the photoelectric conversion module is electrically connected with the differential signal pins of the second TYPE-C interface through at least one second SerDes channel, each second SerDes channel comprises two pairs of second differential signal lines, one pair of the second differential signal lines in the two pairs of the second differential signal lines is used as a data transmission differential signal line pair, and the other pair of the second differential signal lines is used as a data receiving differential signal line pair.

In an embodiment of the present invention, the optical fiber transmission interface adapter further includes a signal buffer circuit disposed on the second circuit board, the signal buffer circuit is electrically connected between the second TYPE-C interface and the photoelectric conversion module, and the signal buffer circuit is electrically connected to the first dc-dc circuit.

In an embodiment of the present invention, the at least one interface adapter includes a wired network transmission interface adapter, and the wired network transmission interface adapter includes: the third circuit board is provided with a third TYPE-C interface, a second direct current-to-direct current circuit, a physical layer transceiver and an Ethernet interface, wherein the third TYPE-C interface, the second direct current-to-direct current circuit, the physical layer transceiver and the Ethernet interface are arranged on the third circuit board; the third TYPE-C interface is connected with one end of the TYPE-C cable; the second direct current-to-direct current circuit is electrically connected with the third TYPE-C interface and the physical layer transceiver, and is used for acquiring a power supply signal from the third TYPE-C interface and providing working voltage for the physical layer transceiver; the physical layer transceiver is electrically connected with a differential signal pin of the third TYPE-C interface through at least one third SerDes channel, and the Ethernet interface is electrically connected with the physical layer transceiver; each of the third SerDes lanes includes two pairs of third differential signal lines, and one of the two pairs of third differential signal lines is a data-transmitting differential signal line pair and the other pair of third differential signal lines is a data-receiving differential signal line pair; the physical layer transceiver is also electrically connected to the control signal pin group of the third TYPE-C interface.

In an embodiment of the present invention, the wired network transmission interface adapter further includes a microcontroller, and the microcontroller is connected to the second dc-to-dc circuit and the physical layer transceiver; the microcontroller is electrically connected to the set of control signal pins of the third TYPE-C interface through the physical layer transceiver.

In an embodiment of the present invention, the at least one interface adapter includes a wireless transmission interface adapter, and the wireless transmission interface adapter includes: the wireless transmission device comprises a fourth circuit board, and a third direct current-to-direct current circuit, a wireless transmission chip and a wireless receiving chip which are arranged on the fourth circuit board; a fourth TYPE-C interface is arranged on the fourth circuit board, and the fourth TYPE-C interface is electrically connected with one end of the TYPE-C cable; the third direct current-to-direct current circuit is electrically connected with the fourth TYPE-C interface, the wireless transmitting chip and the wireless receiving chip, and is used for acquiring a power supply signal from the fourth TYPE-C interface and providing working voltage for the wireless transmitting chip and the wireless receiving chip; the wireless transmitting chip and the wireless receiving chip are arranged at intervals and are electrically connected with differential signal pins of the fourth TYPE-C interface through at least one fourth SerDes channel, each fourth SerDes channel comprises two pairs of fourth differential signal lines, one pair of the fourth differential signal lines in the two pairs of the fourth differential signal lines is used as a data transmitting differential signal line pair, and the other pair of the fourth differential signal lines is used as a data receiving differential signal line pair.

To sum up, the embodiment of the present invention provides an above-mentioned technical scheme can have following one or more beneficial effect: the receiving card adopts a TYPE-C interface comprising a power signal pin group and a plurality of pairs of differential signal pin groups, the TYPE-C interface is connected to a SerDes channel of the programmable logic device, and even the quantity and the functions of differential signal lines in the SerDes channel are defined, the SerDes channel is a high-speed serial data channel, and therefore the transmission rate of the whole receiving card can be improved. Moreover, the TYPE-C interface can also transmit power signals outwards, so that the connection between the receiving card and other devices can be simplified. In addition, based on the flexibility of the interface of the receiving card, the structure diversification of the display control card assembly can be realized, and different requirements of various users are met.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a receiving card according to an embodiment of the present invention.

Fig. 2 is another perspective view of the receiver card of fig. 1.

FIG. 3a is a pin function diagram of the connector assembly of the receiving card of FIG. 1.

FIG. 3b is a schematic diagram of another pin function of the connector assembly of FIG. 1 for receiving a card.

Fig. 4a is a schematic diagram of a pin layout of a portion of the programmable logic device shown in fig. 1.

Fig. 4b is a schematic diagram of a pin layout of the TYPE-C interface shown in fig. 1.

FIG. 5 is a schematic diagram of a display control card assembly using the receiving card shown in FIG. 1.

Fig. 6 is a schematic structural diagram of the wireless transmission interface adapter shown in fig. 5.

FIG. 7 is a schematic diagram of another display control card assembly using the receiving card shown in FIG. 1.

Fig. 8a is a schematic structural diagram of the transmission interface adapter of the wired network shown in fig. 7.

Fig. 8b is another structural diagram of the transmission interface adapter of the wired network shown in fig. 7.

FIG. 9 is a schematic diagram of another display control card assembly using the receiving card shown in FIG. 1.

Fig. 10a is a schematic structural diagram of the optical fiber transmission interface adapter shown in fig. 9.

Fig. 10b is another structural diagram of the optical fiber transmission interface adapter shown in fig. 9.

FIG. 11a is a schematic diagram of another display control card assembly using the receiving card shown in FIG. 1.

FIG. 11b is a schematic diagram of another display control card assembly using the receiving card shown in FIG. 1.

FIG. 11c is a schematic diagram of another display control card assembly using the receiving card shown in FIG. 1.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Referring to fig. 1, 2 and 3, an embodiment of the present invention provides a receiving card 30, including: a circuit board 31 and a connector assembly 32, a programmable logic device 33, a memory device 34, TYPE- C interfaces 37a and 37b, and a power supply circuit 38 disposed on the circuit board 31.

The connector assembly 32 is electrically connected to the programmable logic device 33, and is composed of two connectors 32a and 32b, which are provided in pairs and have the same Pin number, for example, where the connectors 32a and 32b are 120Pin high-contact connectors, respectively, but the embodiment of the present invention is not limited thereto. Furthermore, as can be seen from FIG. 2, the connector assembly 32 is located on one side of the circuit board 31 (e.g., the bottom side of the circuit board 31), and the programmable logic device 33, the memory device 34, the TYPE- C interfaces 37a and 37b, and the power supply circuit 38 are located on the other side of the circuit board 31 (e.g., the top side of the circuit board 31); this arrangement facilitates the mating attachment of the receiving card 30 to a patch panel (not shown). The power supply circuit 38 here is, for example, a dc power supply circuit that supplies dc power to the receiving card. In addition, as can be seen from FIG. 3, the connector assembly 32 includes a set of display data signal pins and a set of display control signal pins 323. The display data signal pin group and the display control signal pin group 323 are connected to the programmable logic device 33, respectively. The display control signal pin set 323 is, for example, a display data single-ended signal pin set. The display data signal pin set may be, for example, the display data single-ended signal pin set 321 and/or the display data differential signal pin set 325. For example, the programmable logic device 33 may be electrically connected to the display data single-ended signal pin group 321 or the display data Differential signal pin group 325 for outputting display data such as RGB data in either of a single-ended signal and an LVDS (low voltage Differential Signaling) Differential signal; and the programmable logic device 33 is electrically connected to the display control signal pin group 323 for outputting display control signals such as a row decode signal, an enable signal, a latch signal, a clock signal, and even a row blank signal with a single-ended signal. Of course, in other embodiments of the present invention, when the number of the related pins of the programmable logic device 33 is large enough, the connector assembly 32 may also include the display data single-ended signal pin group 321 and the display data differential signal pin group 325, and the programmable logic device 33 may be connected to the display data single-ended signal pin group 321, the display data differential signal pin group 325 and the display control signal pin group 323. In other words, the display data single-ended signal pin group 321 and the display data differential signal pin group 325 are, for example, an RGB data single-ended signal pin group and an RGB data differential signal pin group, respectively, and even the display data differential signal pin group 325 is, for example, an LVDS differential signal pin group. In this way, the receiving card 30 can not only use single-ended signal transmission of RGB data, but also directly use differential signal transmission of LVDS when providing the LED module with display data. Compared with the traditional single-ended signal, the LVDS differential signal has the advantages that: (1) the anti-interference capability is strong, the interference noise is generally loaded on the two signal lines in an equivalent and simultaneous manner, and the difference value is 0, namely the noise does not influence the logic significance of the signal; (2) electromagnetic interference (EMI) can be effectively inhibited, and because the two wires are close to each other and have equal signal amplitude, the amplitudes of coupling electromagnetic fields between the two wires and the ground wire are also equal, and simultaneously the signal polarities of the two wires are opposite, the electromagnetic fields are mutually offset, and the EMI to the outside is also small.

The Programmable logic device 33 is, for example, an FPGA (Field Programmable Gate Array) device configured with a plurality of SerDes channels, and the present embodiment is described by taking four SerDes channels as an example. For example, as shown in fig. 4a, the programmable logic device 33 is configured with four SerDes channels, namely TX1_ N, TX1_ P, RX1_ N and RX1_ P, TX2_ N, TX2_ P, RX2_ N and RX2_ P, TX3_ N, TX3_ P, RX3_ N and RX3_ P, and TX4_ N, TX4_ P, RX4_ N and RX4_ P. The memory device 34 is electrically connected to the programmable logic device 33, which is a volatile memory device such as DDR4, DDR3, DDR2, LPDDR2, SDRAM, or the like, and the number of memory devices to be used can be determined according to actual needs. In this embodiment, each SerDes channel includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair).

The TYPE-C interface is a brand-new USB physical interface and is characterized in that the interface is symmetrical, insertion in the positive direction and the negative direction is supported, and plugging can be realized as well as the cable direction can be positive and negative. The TYPE-C interface can be accessed on either side, while the functionality is defined by the hardware being accessed. The number of TYPE-C interfaces may be multiple, with each TYPE-C interface connecting at least one SerDes channel, two for the illustrated embodiment, such as TYPE- C interfaces 37a, 37 b. TYPE- C interfaces 37a, 37b are electrically connected to the plurality of SerDes channels configured by programmable logic device 33, respectively, and TYPE- C interfaces 37a, 37b are also electrically connected to power supply circuit 38 for obtaining power supply signals to be transmitted to the outside. The TYPE- C interfaces 37a, 37b are herein interfaces having pairs of high-speed differential signal pins (Serdes), groups of power signal pins, and groups of control I/O pins, but may be replaced by other interfaces having pairs of differential signal pins, groups of control I/O pins, and groups of power signal pins, such as Mini HDMI interfaces. The multiple pairs of differential signal pins are electrically connected with at least one SerDes channel configured by the programmable logic device 33; the control signal pin group is electrically connected with a plurality of control I/O ports configured by the programmable logic device 33; the power signal pin group is electrically connected with the power supply circuit. For example, as shown in fig. 4b, a single TYPE-C interface electrically connects at least one SerDes channel of the programmable logic device, e.g., TX1_ N, TX1_ P, RX1_ N and RX1_ P, four differential signal lines, or eight differential signal lines, e.g., TX1_ N, TX1_ P, RX1_ N, RX1_ P, TX2_ N, TX2_ P, RX2_ N and RX2_ P. The control signal pins of the TYPE-C interface are connected to a plurality of control I/O ports of the programmable logic device 33, such as FPGA _ IO1, FPGA _ IO2, FPGA _ IO 3.

The receiving card of the embodiment adopts the TYPE-C interface including the power signal pin group and the multiple pairs of differential signal pin groups, connects the TYPE-C interface to the SerDes channel of the programmable logic device, and even defines the quantity and functions of differential signal lines in the SerDes channel, and the SerDes channel is a high-speed serial data channel, so that the transmission rate of the whole receiving card can be improved. In addition, compared with the existing receiving card comprising a physical layer transceiver and an Ethernet interface, the interface provided by the embodiment saves the physical layer transceiver, saves the cost, simplifies the circuit, can reduce the size of the receiving card, and can enable the design scheme of the LED display screen control system to be diversified so as to adapt to more application occasions.

In addition, for the receiving card 30 provided with the TYPE-C interfaces 57a, 57b, the determination of the transmission rate and the signal transmission mode can be directly performed on the interface adapter, because for each TYPE-C interface, there are various connection schemes, for example, the interface adapter to which it can be connected includes, for example, a wireless transmission interface adapter, a wired network transmission interface adapter, an optical fiber transmission interface adapter, and the like. One of the TYPE-C interfaces 57a and 57b of the receiving card 30 is connected to a display controller (or called sending card) through a wireless transmission interface adapter, a wired network transmission interface adapter, or an optical fiber transmission interface converter to obtain image data, and the other TYPE-C interface 57a or 57b of the receiving card 30 may be directly connected to a subsequent receiving card through a TYPE-C cable cascade, or may be connected to the subsequent receiving card through a wireless transmission interface adapter, a wired network transmission interface adapter, or an optical fiber transmission interface converter. Various connection schemes for the two TYPE-C interfaces 57a, 57b of the receiving card 30 are listed below in connection with fig. 5 to 11C.

As mentioned above, a display control card assembly using the wireless transmission interface adapter 40 shown in fig. 5 is derived for the two TYPE-C interfaces 57a and 57b of the receiving card 30. The main purpose of the wireless transmission solution shown in fig. 5 is to solve the problem that the industrial network cable is easy to be damaged and unstable when being frequently plugged and unplugged, and the cost of early installation and later maintenance is high. Meanwhile, with the development of the LED display screen industry, the demand of small-spacing LED display screens is more and more, and the design of front maintenance is more and more popular; aiming at the front maintenance scheme of the LED display screen, wireless transmission undoubtedly provides a very high-quality scheme, and the LED display screen is convenient to design and install and maintain on site.

Specifically, as shown in fig. 5, each TYPE- C interface 37a or 37b is connected to a wireless transmission interface adapter 40 through a TYPE-C data line. The TYPE-C data line herein is a cable capable of simultaneously transmitting a data signal and a power signal. Further, as shown in fig. 6, the wireless transmission interface adapter 40 includes: the wireless transmission device comprises a circuit board, and a direct current-direct current circuit 43, a wireless transmission chip 45a and a wireless reception chip 45b which are arranged on the circuit board. Be equipped with TYPE-C interface 41 on the circuit board, and TYPE-C interface 41 electricity is connected the one end of TYPE-C data line. The dc-dc circuit 43 is electrically connected to the TYPE-C interface 41, the wireless transmitting chip 45a and the wireless receiving chip 45b, and is configured to obtain a power signal from the TYPE-C interface 41 and provide an operating voltage to the wireless transmitting chip 45a and the wireless receiving chip 45 b. The wireless transmitting chip 45a and the wireless receiving chip 45b are arranged at intervals and electrically connected with the TYPE-C interface 41 through at least one SerDes channel; each of the SerDes lanes includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). Further, the operating frequencies of the wireless transmission chip 45a and the wireless reception chip 45b are located in the millimeter wave band. The millimeter wave band herein typically means a frequency range of 30GHz to 300GHz with a corresponding wavelength of 1 mm to 10 mm. The wireless transmitting chip 45a and the wireless receiving chip 45b working in the millimeter wave band in this embodiment are very suitable for the application of the display box in the LED display screen, because the LED display screen is typically formed by splicing a plurality of display boxes, when the wireless transmission interface adapter 40 is installed behind each display box, the first consideration is how to avoid the wireless signal crosstalk between two wireless transmission interface adapters 40 that do not need to receive and transmit data in the same LED display screen, and the wireless transmitting chip 45a and the wireless receiving chip 45b in the wireless transmission interface adapter 40 of this embodiment work in the millimeter wave band, which can greatly reduce the possibility of the wireless signal crosstalk compared with the wireless transmission modules in the prior art, such as WiFi module and bluetooth module. In addition, based on the performance of the wireless chip and the availability of the frequency band, the working frequency of the wireless transmitting chip 45a and the wireless receiving chip 45b is preferably in the frequency range of 57GHZ-67GHZ or 71GHZ-87GHZ, such as 60GHZ or 80 GHZ.

Alternatively, as shown in fig. 7, two TYPE-C interfaces 57a, 57b may be connected to the wired network transmission interface adapter 60 through TYPE-C lines, respectively. As for the wired network transmission interface adaptor 60, as shown in fig. 8a, it includes: a circuit board 62, and a TYPE-C interface 61, a dc-to-dc circuit 63, a physical layer transceiver 65, and an ethernet interface 67 disposed on the circuit board 62. The TYPE-C interface 61 is connected to one end of the TYPE-C line, and is an interface having a plurality of pairs of high-speed differential signal pins, power signal pins, and control signal pins. The dc-dc circuit 63 electrically connects the TYPE-C interface 61 and the physical layer transceiver 65 for obtaining a power signal from the TYPE-C interface 61 and providing an operating voltage to the physical layer transceiver 65. The physical layer transceiver 65 is electrically connected to the differential signal pins of the TYPE-C interface 61 through at least one SerDes channel, and each SerDes channel here includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). The physical layer transceiver 65 is further connected to a plurality of control I/O ports of the programmable logic device 33 through a control signal pin of the TYPE-C interface 61 to configure the physical layer transceiver 65, and the like, which is not limited in this embodiment. Furthermore, the physical layer transceiver 65 may be selected from 1GBase-T/2.5 GBase-T/5 GBase-T/10GBase-T ethernet physical layer transceivers, and may use chips such as AQR111C, AQR114C, BCM54892, BCM54992, BCM54991, etc. which are commercially available. In addition, the ethernet interface 67 is electrically connected to the physical layer transceiver 65, which is, for example, an RJ45 network port integrated into a network transformer, or a RJ45 network port separated design.

Further, as shown in fig. 8b, the wired network transmission interface adapter 60 may further include a microcontroller 64. The microcontroller 64 connects the physical layer transceiver 65 and the dc-to-dc circuit 63. The microcontroller 64 is, for example, an MCU, and its model is, for example, GD32F330G8U6, GD32E103R8T6, etc. The microcontroller 64 is connected to, for example, a reset pin of the physical layer transceiver 65, and the like, and is connected to a control signal pin of the TYPE-C interface 61 through the physical layer transceiver 65, so as to configure the physical layer transceiver 65.

Alternatively, as shown in fig. 9, two TYPE-C interfaces 57a, 57b may be connected to the optical fiber transmission interface adapter 80 via TYPE-C lines, respectively. As for the optical fiber transmission interface adapter 80, as shown in fig. 10a, it includes: the circuit board 81, a TYPE-C interface 82 arranged on the circuit board 81, a direct current to direct current circuit 83 and a photoelectric conversion module 84. TYPE-C interface 82 is connected to one end of the TYPE-C line, which is an interface having multiple pairs of high-speed differential signal pins and power signal pins. The photoelectric conversion module 84 may include, for example, optoelectronic devices including a transmitting device and a receiving device, functional circuits, an optical interface, and the like. The photoelectric conversion module 84 is mainly used for photoelectric conversion, for example, an electrical signal is converted into an optical signal by a transmitting device, and the optical signal is converted into the electrical signal by a receiving device after being transmitted through an optical fiber, which can use a photoelectric conversion circuit and a chip commonly used in the prior art to transmit the Serdes signal in the TYPE-C interface to the photoelectric conversion module 84. The dc-dc circuit 83 is electrically connected to the TYPE-C interface 82 and the photoelectric conversion module 84, and is configured to obtain a power signal from the TYPE-C interface 82 and provide a working voltage to the photoelectric conversion module 84. The photoelectric conversion module 84 is electrically connected to the differential signal pins of the TYPE-C interface 82 through at least one SerDes channel, and each SerDes channel herein includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for data transmission (i.e., as a data transmission differential signal line pair) and the other pair of differential signal lines is used for data reception (i.e., as a data reception differential signal line pair). Further, as shown in fig. 10b, the optical fiber transmission interface adapter 80 may further include a signal buffer circuit 85. The signal buffer circuit 85 is provided on the circuit board 81. The signal buffer circuit 85 is connected between the TYPE-C interface 82 and the photoelectric conversion module 84, and the signal buffer circuit 85 is also electrically connected to the dc-dc circuit 83. The signal buffer circuit 85 is mainly used to enhance the signal transmitted between the TYPE-C interface 82 and the photoelectric conversion module 84 when the TYPE-C cable is relatively long. Signal buffer circuit 85 typically includes a retimer and an equalizer connected. The signal buffer circuit 85 has a model of, for example, 2-Channel timer DS125DF 111. In general, the signal transmitted to the TYPE-C interface 82 will have some attenuation or the differential pair signal waveform will be degraded, and the retimer and equalizer of the signal buffer circuit 85 will jitter the differential signal waveform or enhance the signal transmission.

Alternatively, as shown in fig. 11a, two TYPE-C interfaces 57a, 57b may be connected to one optical fiber transmission interface adapter 80 and one wired network transmission interface adapter 60, respectively; alternatively, as shown in fig. 11a, the two TYPE-C interfaces 57a and 57b are connected to one optical fiber transmission interface adapter 80 and one wireless transmission interface adapter 40, respectively, or even as shown in fig. 11C, the two TYPE-C interfaces 57a and 57b are connected to one wired network transmission interface adapter 60 and one wireless transmission interface adapter 40, respectively, and so on.

The above list is merely schematic to show the structure of various display control card assemblies using the receiving card 30, but the embodiment of the present invention is not limited thereto; because the flexibility of the receiving card 30 can be used in a variety of scenarios, the design of the interface adapter can be changed according to different scenarios to meet the diversified requirements of the customers.

To sum up, the utility model discloses receive card and display control card subassembly can have following one or more beneficial effect: (i) for the transmission rate solution, the problem of insufficient gigabit bandwidth can be effectively solved, the method is more suitable for small-distance application, the bandwidth can be 10G/5G/2.5G/1G or even other bandwidths, the flexibility is higher, and the applicability is stronger; (ii) for the signal transmission mode solution, a design mode of a receiving card and an interface adapter is adopted, a TYPE-C or high-speed interface is used for connecting the receiving card and the interface adapter through a TYPE-C wire or other high-speed wires to complete communication, different signal transmission modes can be selected according to different application scenes, diversification and practical effective applicability of the LED display screen control system are greatly improved, and workload of installation and maintenance is greatly reduced; and (iii) the conventional RGB single-ended signal communication and/or LVDS differential signal communication are realized, the existing circuit design is compatible, meanwhile, the transmission anti-interference capability can be enhanced, the electromagnetic interference (EMI) can be effectively inhibited, and the EMC can be improved.

Furthermore, it should be understood that the foregoing embodiments are only exemplary illustrations of the present invention, and the technical solutions of the embodiments can be arbitrarily combined and collocated for use on the premise that the technical features are not conflicted, the structure is not contradictory, and the purpose of the present invention is not violated.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (10)

1. A receiving card, comprising:

a circuit board;

the programmable logic device is arranged on the circuit board;

the memory device is arranged on the circuit board and connected with the programmable logic device;

the plug-in assembly is arranged on the circuit board and connected with the programmable logic device;

the TYPE-C interface is arranged on the circuit board and connected with a SerDes channel configured by the programmable logic device; and

and the power supply circuit is arranged on the circuit board and connected with the TYPE-C interface.

2. The receiving card of claim 1, wherein the number of TYPE-C interfaces is plural, each of the TYPE-C interfaces including a power signal pin group, a plurality of pairs of differential signal pins, a control signal pin group; the multiple pairs of differential signal pins are electrically connected with at least one SerDes channel configured by the programmable logic device, the control signal pin group is electrically connected with multiple control I/O ports configured by the programmable logic device, and the power supply signal pin group is electrically connected with the power supply circuit.

3. The receiving card of claim 2, wherein each of the SerDes lanes includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is a data transmit differential signal pair and the other pair of differential signal lines is a data receive differential signal pair.

4. A receiving card as claimed in claim 1, wherein said connector assembly comprises a set of display data signal pins and a set of display control signal pins; the display data signal pin group and the display control signal pin group are respectively and electrically connected with the programmable logic device; the display data signal pin group is a display data single-ended signal pin group and/or a display data differential signal pin group; and the display data differential signal pin set is an LVDS differential signal pin set.

5. A display control card assembly, comprising:

the receiving card of any one of claims 1 to 4; and

at least one interface adapter;

wherein, every interface adapter passes through TYPE-C cable connection receive one of card TYPE-C interface.

6. The display control card assembly of claim 5, wherein the at least one interface adapter comprises a fiber optic transmission interface adapter, and the fiber optic transmission interface adapter comprises: the photoelectric conversion device comprises a second circuit board, a first direct current-direct current circuit, a photoelectric conversion module and a second TYPE-C interface, wherein the first direct current-direct current circuit, the photoelectric conversion module and the second TYPE-C interface are arranged on the second circuit board; the first direct current-direct current circuit is electrically connected with the second TYPE-C interface and the photoelectric conversion module and is used for acquiring a power supply signal from the second TYPE-C interface and providing working voltage for the photoelectric conversion module; the photoelectric conversion module is electrically connected with the differential signal pins of the second TYPE-C interface through at least one second SerDes channel, each second SerDes channel comprises two pairs of second differential signal lines, one pair of the second differential signal lines in the two pairs of the second differential signal lines is used as a data transmission differential signal line pair, and the other pair of the second differential signal lines is used as a data receiving differential signal line pair.

7. The display control card assembly of claim 6, wherein the optical fiber transmission interface adapter further comprises a signal buffer circuit disposed on the second circuit board, the signal buffer circuit electrically connected between the second TYPE-C interface and the photoelectric conversion module, the signal buffer circuit further electrically connected to the first dc to dc circuit.

8. The display control card assembly of any of claims 5-7, wherein the at least one interface adapter comprises a wired network transport interface adapter, and the wired network transport interface adapter comprises: the third circuit board is provided with a third TYPE-C interface, a second direct current-to-direct current circuit, a physical layer transceiver and an Ethernet interface, wherein the third TYPE-C interface, the second direct current-to-direct current circuit, the physical layer transceiver and the Ethernet interface are arranged on the third circuit board; the third TYPE-C interface is connected with one end of the TYPE-C cable; the second direct current-to-direct current circuit is electrically connected with the third TYPE-C interface and the physical layer transceiver, and is used for acquiring a power supply signal from the third TYPE-C interface and providing working voltage for the physical layer transceiver; the physical layer transceiver is electrically connected with a differential signal pin of the third TYPE-C interface through at least one third SerDes channel, and the Ethernet interface is electrically connected with the physical layer transceiver; each of the third SerDes lanes includes two pairs of third differential signal lines, and one of the two pairs of third differential signal lines is a data-transmitting differential signal line pair and the other pair of third differential signal lines is a data-receiving differential signal line pair; the physical layer transceiver is also electrically connected to the control signal pin group of the third TYPE-C interface.

9. The display control card assembly of claim 8, wherein the wired network transport interface adapter further comprises a microcontroller, the microcontroller connecting the second dc to dc circuit and the physical layer transceiver; the microcontroller is electrically connected to the set of control signal pins of the third TYPE-C interface through the physical layer transceiver.

10. The display control card assembly of any of claims 5-7, wherein the at least one interface adapter comprises a wireless transmission interface adapter, and the wireless transmission interface adapter comprises: the wireless transmission device comprises a fourth circuit board, and a third direct current-to-direct current circuit, a wireless transmission chip and a wireless receiving chip which are arranged on the fourth circuit board; a fourth TYPE-C interface is arranged on the fourth circuit board, and the fourth TYPE-C interface is electrically connected with one end of the TYPE-C cable; the third direct current-to-direct current circuit is electrically connected with the fourth TYPE-C interface, the wireless transmitting chip and the wireless receiving chip, and is used for acquiring a power supply signal from the fourth TYPE-C interface and providing working voltage for the wireless transmitting chip and the wireless receiving chip; the wireless transmitting chip and the wireless receiving chip are arranged at intervals and are electrically connected with differential signal pins of the fourth TYPE-C interface through at least one fourth SerDes channel, each fourth SerDes channel comprises two pairs of fourth differential signal lines, one pair of the fourth differential signal lines in the two pairs of the fourth differential signal lines is used as a data transmitting differential signal line pair, and the other pair of the fourth differential signal lines is used as a data receiving differential signal line pair.

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