CS268027B1 - Microprogrammed controller - Google Patents

Abstract

A microcontroller-controlled controller, which is used in a specific application to connect two different types of computers, i.e. computers whose architecture is based on a common bus (the SMEP series in the Czechoslovak Socialist Republic, the PDP-11 in the U8A) and computers equipped with channels for connecting peripheral devices (the JSEP series in the Czechoslovak Socialist Republic, IBM 360, 370, 4300, etc. in the USA). The novelty of the controller's operating principle lies in the use of a RAM-type memory in which the controller's control microprogram is stored.

Description

The invention relates to a firmware-controlled controller intended for the connection of two different types of computers, i.e. computers whose architecture is based on a common bus or computers equipped with channels for connecting peripheral devices.

In current solutions, the firmware itself is stored in the corresponding memory and other data, device status information, etc. in another block or memory. It is not possible to modify the microprogram sucked by it, etc.

These disadvantages of the present solutions are eliminated by a firmly controlled controller, the essence of which is that the control block is connected to the first input block, the second block. enter RAM, first register, second register, first output block, second output block, counter block and address block, the first input block and the second input block being bus connected to RAM, which is further connected by bus to the first output block, second an output block, a counter block and further the outputs of the first and second registers, the inputs of which are bus-connected to a control block which is also bus-connected to RAM, the counter block being bus-connected to the RAM input and the address block.

The advantages of this solution are that there has been a significant reduction in the number of electronic circuits needed to design the controller. To provide the following functions, the controller contains an instruction repertoire of instructions enabling writing to the microprogram memory and reading from this memory. At the same time, these instructions allow the microprogram to be modified by itself, which enables more efficient programming of some more complex functions of the controller and thus a reduction in the requirement for the amount of memory in which the microprogram is stored. Specifically, this means saving technical elements, ie hardware equipment for the connection between input and output, etc.

The attached figure shows the connection of a firmly controlled controller. The control block is connected to the first input block χ, the second input block 2, the RAM memory, the first ADR register, the second ADR register 4 - 1, the first output block £, the second output block £, the counter block £, the address block 8, further the first input block 6 and the second input block 2 are connected by a bus to the memory 6, RAM, which is further connected by the bus to the first output block 6, the second output block 6, the counter block 6, and the outputs of the ADR registers. ADR - * · 1. whose inputs are connected by a bus to a control block £, which is at the same time connected by a bus to the RAM memory, while the counter block is connected by a bus to the memory input 6, RAM and address block 8.

The connection is a microprogram controlled controller, which is used in a specific application to connect two computers of different types, ie computers whose architecture is based on a common bus, such as the SMEP series in the Czechoslovak Socialist Republic, PDP-11 in the USA, etc. and computers equipped with channels for connecting peripheral devices such as JSEP ČSSR, IBM 360, 370, 4300 in the USA, etc.

The novelty of the principle of operation of the controller lies in the wider use of the χ RAM memory, in which the control microprogram of the controller is stored. This memory 6, RAM is also used for temporary storage of data and for their transfer and also for storage of other information needed for the operation of the controller.

The operation of the controller is controlled by a firmware stored in the 6 RAM memory. The microprogram is composed of microinstructions which are decoded in the control block. This control block £ controls the operation of all other circuit elements. In addition to microinstructions, the processed data is also stored in the 6 RAM memory. Data manipulation consists either in their transfers between input and output circuits of the controller or in their modification, which can be incrementation, decrementation, setting or resetting of individual bits in the word, etc. Data 6, RAM can be input from the first block of input. from the second input block 2 and from the counter block £. From the RAM output, this data can be sent to the first output block, to the second output block, or to the counter block. At

When data is transferred from a computer of the first type to a computer of the second type, the data is first written from the first input block 1 to the RAM 6 and then overwritten from the memory 6 to the second output block 6 by another command. Similarly, only with the use of other input and output blocks £, the procedure is used to transfer data from a second type computer to a first type computer, or to transfer data from a first type computer to a first type computer and from a second type computer to a second type computer.

Block 2.5 of the counter is intended for incrementing and decrementing data or address parts of microinstructions and also for setting zeroing and / or analysis of individual bits of microinstruction or data word. Furthermore, the counter block is used to move data and microinstructions between the cells of the RAM 6. The output from the counter block 7 can be fed to the address bus of the first type of computer by means of the address block 8. This makes it possible to increment or decrement the data address in the memory of the computer of the first type to which the data is written or from which the data is read.

Controller microinstruction set:

- command

- conditional jump

- write to 6 RAM memory - read from 6 RAM memory

Description of microinstructions:

- command: performs setting and resetting of flip-flops in all controller blocks, entries in ADR registers. ADR + 1. setting and resetting bits in registers ADR, ADR + 1, incrementing and decrementing in counter block, etc.

- conditional jump: allows to perform jumps in the microprogram, based on the analysis of different conditions in all blocks of the controller.

- write to memory 6, RAM: allows to write data to RAM £ from input blocks £, £ and counter block £.

- read from £ RAM: allows data from £ £ to be overwritten into blocks £, £ output and block 7 of the Counter.

Description of controller operation: the word microinstruction is divided into two parts. The instruction part of the word contains the code of the microinstruction and its parameters, the address part contains the address of the next microinstruction. The instruction part of the word is fed to the input of the control block £. The address part of the word is also entered in the ADR registers. ADR 4-1 «The first ADR register is connected to the £ RAM input; the second register ADR + 1 is constructed as a counter and the address part of the microinstruction is increased here by 1. This increase is performed at the time of decoding and execution of the microinstruction. The address located in the second ADR + 1 register becomes the address of the following microinstruction in the following two cases: a) conditional jump after microinstruction if jump conditions were not met b) write to £ RAM after microinstruction execution and £ RAM read microinstruction.

In all other cases, the address of the following microinstruction becomes the address located in the first ADR register.

When executing instructions to write to £ RAM and reading from £ RAM, the address part of the microinstruction is considered to be the address of £ £ to which the data will be written or from which the data will be read. In this case, the address part of the microinstruction is not written to the second register ADR + 1. In this second register ADR + 1, the address of the executed microinstruction increased by 1 is retained. the firmware continues at the address following the address where the executed microinstruction was stored.

Claims (1)

OBJECT OF THE INVENTION A programmable controller consisting of input blocks, control output blocks, registers, a counter block and a RAM buffer, characterized in that the control block (5) is connected to a first input block (1), a second input block (2), a memory ( 6) RAM, first register (ADR), second register (ADR * 1), first output block (3), second output block (4), counter block (7) and address block (8), the first block (1) input and the second input block (2) is connected by bus to the RAM memory (6), which is further connected by bus to the first output block (3), the second output block (4), the counter block (7) and further with the register outputs (ADR , ADR +1), the inputs of which are connected by bus to a control block (5), which is further connected to the RAM memory (6), the counter block (7) being connected by a bus to the RAM memory input (6) and the block (8). address.