DE2012181C3 - Monolithically integrable flip-flop circuit - Google Patents
Monolithically integrable flip-flop circuitInfo
- Publication number
- DE2012181C3 DE2012181C3 DE19702012181 DE2012181A DE2012181C3 DE 2012181 C3 DE2012181 C3 DE 2012181C3 DE 19702012181 DE19702012181 DE 19702012181 DE 2012181 A DE2012181 A DE 2012181A DE 2012181 C3 DE2012181 C3 DE 2012181C3
- Authority
- DE
- Germany
- Prior art keywords
- flip
- flop
- transistor
- collector
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/287—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the feedback circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
Description
Das Hauptpatent I 963 225 betrifft eine monolithisch integrierbare bistabile Flipflop-Schaltung mit zwei gleichartig aufgebauten Hälften, die jeweils einen Schalttransistor und einen Steuertransistor gleichen Leitungstyps enthalten, deren Kollektoren miteinander sowie deren Emitter miteinander und mit Bezugspotential verbunden sind, wobei jeweils die Basis des Schaltlransistors der einen Flipflop-Hälfte am über einen Arbeitswiderst.md an Betriebsspannung liegenden Kollektor des Schalttransistors der anderen Flipflop-Hälfte und wobei die Basen der Steuertransistoren über jeweils einen Rollkondensator an einem gemeinsamen Sieuereingang angeschlossen sind. Die der Huuptanmeldung zugrundeThe main patent I 963 225 relates to a monolithically integrable bistable flip-flop circuit two similarly constructed halves, each of which is the same as a switching transistor and a control transistor Contain line type, their collectors with each other and their emitters with each other and with Reference potential are connected, in each case the base of the switching transistor of a flip-flop half on the collector of the switching transistor that is connected to the operating voltage via a work resistance other flip-flop half and where the bases of the control transistors are each connected to a common control input via a rolling capacitor are. The basis of the Huupt registration
liegende Erfindung besteht darin, dali in jeder Flipflop-Hälfte jeweils der Kollektor eines zu den Schalt- und Steuertransistoren komplementären Hilfstransistors an der Basis des Steuertra,nsistors, daß jeweils der Emitter des Hilfstransistors am Kollektor desunderlying invention consists in dali in each flip-flop half each the collector of an auxiliary transistor complementary to the switching and control transistors at the base of the Steuerertra, nsistor that each of the emitter of the auxiliary transistor at the collector of the
jo Schalttransistors und daß jeweils die Basis des Hilfstrarrcistprs direkt oder über mindestens einen Widerstand an Bezugspotential oder daß jeweils die Basis des Hilfstransistors direkt oder über je einen Widerstand an die Basis des Schalttransistors angeschlossen ist.jo switching transistor and that in each case the base of the Hilfstrarrcistprs directly or via at least one resistor to reference potential or that in each case the base of the auxiliary transistor connected directly or via a resistor to the base of the switching transistor is.
Nach einer vorteilhaften Ausgestaltung des Gegenstandes des Hauptpatentes sollen mehrere solche Flipflop-Stufen in einem gemeinsamen Halbleiterkörper nach Art eines Ringzählers oder einer Biniir-According to an advantageous embodiment of the subject matter of the main patent, several such Flip-flop stages in a common semiconductor body in the manner of a ring counter or a Biniir
ao zählerkette untergebracht werden. Hierbei wird in jeder Zählerstufc der gemeinsame Steuereingang der nächstfolgenden Zählerstufe am Kollektor des Schalttransistors der einen Flipflop-Hälfte angeschlossen, d. h. diese Flipflop-Hälfte ist mit dem Eingangswidcrstand der nachfolgenden Stufe belastet.ao counter chain can be accommodated. The common control input of the the next counter stage connected to the collector of the switching transistor of one flip-flop half, d. H. this flip-flop half is with the input resistor the next level.
Bei symmetrischer Dimensionierung der Flipflop-Stufe, d. h., daß in jeder Flipflop-Hälfte die gleichen Widerstands- und Kapazitätswerte und die gleichen Transistortypen vorgesehen sind, ergibt sich durch die genannte einseitige Belastung der einen Flipflop-Hälfte eine Unsymmetrie, die im allgemeinen unerwünscht ist, da sie die Frequenzeigenschaften einer solchen Zählkette nachteilig beeinflußt.With symmetrical dimensioning of the flip-flop stage, i. that is, the same in each flip-flop half Resistance and capacitance values and the same transistor types are provided, results from the mentioned one-sided loading of a flip-flop half an imbalance, which in general is undesirable because it adversely affects the frequency properties of such a counting chain.
Aus >;Colloque International de Chronometrie«, Paris. 16. bis 19. 9. 1969, S. B 252-3 bis B 252-5, ist C^ bekannt, diese Unsymmetrie dadurch zu kompensieren, daß man die in jeder Flipflop-Hälfte vorhandenen Widerstände unterschiedlich dimensioniert, d.h., daß einander entsprechende Widerstünde jeder Flipflop-Hälfte voneinander" abweichende Widerstandswerte haben.From> Colloque International de Chronometrie, Paris. September 16-19, 1969, pp. B 252-3 to B 252-5 C ^ known to compensate for this asymmetry by that the resistors present in each flip-flop half are dimensioned differently, i.e. that corresponding resistances of each flip-flop half would have different resistance values to have.
Die Anwendung dieser bekannten Maßnahme auf die Flipflop-Schaltung des Hauptpatentes ergibt jedoch lediglich die Möglichkeit, die beiden Kollektorwiderstände unterschiedlich zu dimensionieren. Hierbei hat sich aber gezeigt, daß diese Maßnahme im vorliegenden Fall nicht ausreichend ist, um eine optimale Kompensation der durch Belastung erzeugten Unsymmetrie zu erreichen. Dieser Nachteil wird daher erfindungsgemäß dadurch beseitigt, daß die zwischen gemeinsamem Steuereingang und den Basen der Steuertransistoren angeordneten Koppclkondensatoren und/oder die Hilfstransistoren unsymmetrisch dimensioniert sind.However, the application of this known measure to the flip-flop circuit of the main patent results only the possibility of dimensioning the two collector resistors differently. Here but it has been shown that this measure is not sufficient in the present case to achieve an optimal To compensate for the imbalance caused by the load. This disadvantage therefore becomes according to the invention thereby eliminated that between the common control input and the bases the control transistors arranged coupling capacitors and / or the auxiliary transistors asymmetrically are dimensioned.
Hierbei ist es besonders zweckmäßig, wenn sich die Kapazitätswertc für die belastete und die unbelastete Flipflop-Häifte um den gleichen Faktor unterscheiden, um den sich auch die Kollektorslröme der beiden Flipflop-Hälften voneinander unterscheiden, wobei der Koppelkondensator mit der größeren Kapazität der belasteten Flipflop-Hälfte zugeordnet wird.It is particularly useful here if the capacitance values for the loaded and the unloaded Flip-flop halves differ by the same factor as the collector currents of the two flip-flop halves differ from each other, whereby the coupling capacitor with the larger capacitance assigned to the loaded flip-flop half.
Werden die Koppclkondcnsatoren nach einer Ausbildung des Hauptpatentes durch,pn-Übergänge realisicrt, so kann die erfindungsgemäße Unsymmetrie 'ler Koppelkondensatoren auch dadurch erreicht werden, daß der einen Flipflop-Hälfte ein in Flußrichtimg betriebener pn-übergang als Koppelkon-Become the coupling capacitors after training of the main patent through pn junctions realisicrt, thus the asymmetry of the coupling capacitors according to the invention can also be achieved in this way that the one flip-flop half has a pn junction operated in the direction of flow as a coupling con-
densator und der anderen Flipflop-Hälfte ein in Sperrichtung betriebener pn-übergang als Koppelkondensator
zugeordnet ist.
Bei unsymmetrischer Dimensionierung der Hilfster- und/oder Kollektorflächen dieser Hilfstransistoren
unterschiedlich groß zu machen, wobei diese bei dem Hilfstransitor der belasteten Flipflop-Hälfte größer
zu wählen ist bzw. sind als bei dem Hüfstransi-capacitor and the other half of the flip-flop is assigned a reverse-biased pn junction as a coupling capacitor.
With asymmetrical dimensioning of the auxiliary star and / or collector surfaces of these auxiliary transistors to make different sizes, whereby these are to be chosen larger for the auxiliary transistor of the loaded flip-flop half than for the Hüfstransi-
;ransistoren ist es besonders zweckmäßig, die Emit- 5 stör der unbelasteten Flipflop-Hälfte.; ransistors, it is particularly useful to emit the 5 unloaded flip-flop half.
Claims (4)
Priority Applications (10)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19702012181 DE2012181C3 (en) | 1969-12-17 | 1970-03-14 | Monolithically integrable flip-flop circuit |
| GB5863870A GB1277536A (en) | 1969-12-17 | 1970-12-10 | Bistable circuit |
| CH1845870D CH1845870A4 (en) | 1969-12-17 | 1970-12-14 | |
| CH1845870A CH540519A (en) | 1969-12-17 | 1970-12-14 | Monolithically integrated bistable flip-flop circuit for timing devices |
| JP45112965A JPS494568B1 (en) | 1969-12-17 | 1970-12-17 | |
| FR7045570A FR2073928A5 (en) | 1969-12-17 | 1970-12-17 | |
| FR7213399A FR2133811B2 (en) | 1969-12-17 | 1972-04-17 | |
| GB5525972A GB1340850A (en) | 1969-12-17 | 1972-11-30 | Monolithic integrable flipflop circuit |
| CH1752672A CH557619A (en) | 1969-12-17 | 1972-12-01 | MONOLITHICALLY INTEGRATED FLIP-FLOP. |
| FR7243010A FR2187186A6 (en) | 1969-12-17 | 1972-12-04 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE1963225 | 1969-12-17 | ||
| DE19702012181 DE2012181C3 (en) | 1969-12-17 | 1970-03-14 | Monolithically integrable flip-flop circuit |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE2012181A1 DE2012181A1 (en) | 1971-09-23 |
| DE2012181B2 DE2012181B2 (en) | 1973-08-30 |
| DE2012181C3 true DE2012181C3 (en) | 1974-03-21 |
Family
ID=25758254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19702012181 Expired DE2012181C3 (en) | 1969-12-17 | 1970-03-14 | Monolithically integrable flip-flop circuit |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS494568B1 (en) |
| CH (2) | CH540519A (en) |
| DE (1) | DE2012181C3 (en) |
| FR (1) | FR2073928A5 (en) |
| GB (1) | GB1277536A (en) |
-
1970
- 1970-03-14 DE DE19702012181 patent/DE2012181C3/en not_active Expired
- 1970-12-10 GB GB5863870A patent/GB1277536A/en not_active Expired
- 1970-12-14 CH CH1845870A patent/CH540519A/en unknown
- 1970-12-14 CH CH1845870D patent/CH1845870A4/xx unknown
- 1970-12-17 JP JP45112965A patent/JPS494568B1/ja active Pending
- 1970-12-17 FR FR7045570A patent/FR2073928A5/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| CH1845870A4 (en) | 1973-02-15 |
| DE2012181A1 (en) | 1971-09-23 |
| FR2073928A5 (en) | 1971-10-01 |
| CH540519A (en) | 1973-02-15 |
| DE2012181B2 (en) | 1973-08-30 |
| JPS494568B1 (en) | 1974-02-01 |
| GB1277536A (en) | 1972-06-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C3 | Grant after two publication steps (3rd publication) | ||
| E77 | Valid patent as to the heymanns-index 1977 | ||
| EGZ | Application of addition ceased through non-payment of annual fee of main patent |