DE3781462D1 - Emittergekoppeltes logikgatter mit geschalteter impedanz. - Google Patents
Emittergekoppeltes logikgatter mit geschalteter impedanz.Info
- Publication number
- DE3781462D1 DE3781462D1 DE8787401267T DE3781462T DE3781462D1 DE 3781462 D1 DE3781462 D1 DE 3781462D1 DE 8787401267 T DE8787401267 T DE 8787401267T DE 3781462 T DE3781462 T DE 3781462T DE 3781462 D1 DE3781462 D1 DE 3781462D1
- Authority
- DE
- Germany
- Prior art keywords
- logic gate
- emitter coupled
- coupled logic
- switched impedance
- impedance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/871,639 US4713560A (en) | 1986-06-05 | 1986-06-05 | Switched impedance emitter coupled logic gate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3781462D1 true DE3781462D1 (de) | 1992-10-08 |
| DE3781462T2 DE3781462T2 (de) | 1993-04-01 |
Family
ID=25357823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE8787401267T Expired - Lifetime DE3781462T2 (de) | 1986-06-05 | 1987-06-05 | Emittergekoppeltes logikgatter mit geschalteter impedanz. |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4713560A (de) |
| EP (1) | EP0249541B1 (de) |
| JP (1) | JPS6379419A (de) |
| KR (1) | KR950005023B1 (de) |
| CA (1) | CA1258497A (de) |
| DE (1) | DE3781462T2 (de) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4806792A (en) * | 1987-07-01 | 1989-02-21 | Digital Equipment Corporation | Differential amplifier circuit |
| JPS6474823A (en) * | 1987-09-17 | 1989-03-20 | Fujitsu Ltd | Emitter follower circuit |
| US4999519A (en) * | 1987-12-04 | 1991-03-12 | Hitachi Vlsi Engineering Corporation | Semiconductor circuit with low power consumption having emitter-coupled logic or differential amplifier |
| DE58908391D1 (de) * | 1988-07-22 | 1994-10-27 | Siemens Ag | ECL-CMOS-Wandler. |
| US4945265A (en) * | 1989-07-13 | 1990-07-31 | National Semiconductor Corporation | ECL/CML pseudo-rail circuit, cutoff driver circuit, and latch circuit |
| US4968900A (en) * | 1989-07-31 | 1990-11-06 | Harris Corporation | Programmable speed/power arrangement for integrated devices having logic matrices |
| US5013938A (en) * | 1989-11-01 | 1991-05-07 | National Semiconductor Corporation | ECL cutoff driver circuit with reduced stanby power dissipation |
| JPH0817321B2 (ja) * | 1989-11-02 | 1996-02-21 | 富士通株式会社 | 制御可能な遅延論理回路 |
| US5382843A (en) * | 1990-02-02 | 1995-01-17 | Gucyski; Jeff | One or two transistor logic with temperature compensation and minimized supply voltage |
| US5003199A (en) * | 1990-02-26 | 1991-03-26 | International Business Machines Corp. | Emitter coupled logic circuit having an active pull-down output stage |
| US5023479A (en) * | 1990-07-31 | 1991-06-11 | Motorola, Inc. | Low power output gate |
| JP2754906B2 (ja) * | 1990-11-06 | 1998-05-20 | 日本電気株式会社 | 半導体集積回路 |
| JPH04172713A (ja) * | 1990-11-06 | 1992-06-19 | Fujitsu Ltd | レベル変換回路 |
| US5448188A (en) * | 1990-11-30 | 1995-09-05 | Fuji Photo Film Co., Ltd. | Signal processing device for providing a signal corresponding to an input signal and for providing a signal which does not correspond to the input signal |
| JP3001014B2 (ja) * | 1991-03-13 | 2000-01-17 | 富士通株式会社 | バイアス電圧発生回路 |
| DE4112310A1 (de) * | 1991-04-15 | 1992-10-22 | Siemens Ag | Signalpegelwandler |
| US5283479A (en) * | 1991-04-30 | 1994-02-01 | Microunity Systems Engineering, Inc. | BiCMOS logic gate having plural linearly operated load FETs |
| US5124580A (en) * | 1991-04-30 | 1992-06-23 | Microunity Systems Engineering, Inc. | BiCMOS logic gate having linearly operated load FETs |
| US5124588A (en) * | 1991-05-01 | 1992-06-23 | North American Philips Corporation | Programmable combinational logic circuit |
| US5262689A (en) * | 1991-10-24 | 1993-11-16 | Harris Corporation | BIMOS current driver circuit |
| TW299529B (de) * | 1991-11-27 | 1997-03-01 | Philips Nv | |
| US5459411A (en) * | 1992-03-26 | 1995-10-17 | Nec Corporation | Wired-OR logic circuits each having a constant current source |
| US5315167A (en) * | 1992-04-09 | 1994-05-24 | International Business Machines Corporation | Voltage burn-in scheme for BICMOS circuits |
| US5179292A (en) * | 1992-06-05 | 1993-01-12 | Acumos, Inc. | CMOS current steering circuit |
| DE4227282C1 (de) * | 1992-08-18 | 1993-11-25 | Siemens Ag | Digitaler Stromschalter |
| US5334886A (en) * | 1992-11-13 | 1994-08-02 | International Business Machines Corporation | Direct-coupled PNP transistor pull-up ECL circuits and direct-coupled complementary push-pull ECL circuits |
| US5453680A (en) * | 1994-01-28 | 1995-09-26 | Texas Instruments Incorporated | Charge pump circuit and method |
| FR2721771B1 (fr) * | 1994-06-27 | 1996-09-06 | Sgs Thomson Microelectronics | Dispositif de mise en veille d'une source de polarisation. |
| FR2721772B1 (fr) | 1994-06-27 | 1996-09-06 | Sgs Thomson Microelectronics | Circuit de commande d'une source de polarisation comportant un dispositif de mise en veille. |
| FR2731570B1 (fr) * | 1995-03-07 | 1997-05-23 | Sgs Thomson Microelectronics | Circuit logique a etage differentiel |
| JP3701760B2 (ja) * | 1997-01-08 | 2005-10-05 | 日本テキサス・インスツルメンツ株式会社 | 論理回路 |
| US6072840A (en) * | 1997-04-18 | 2000-06-06 | International Business Machines Corporation | High speed differential CMOS sine-wave receiver with duty-cycle control means |
| US6255857B1 (en) * | 2000-06-13 | 2001-07-03 | Nortel Networks Limited | Signal level shifting circuits |
| US7180333B2 (en) * | 2003-05-20 | 2007-02-20 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Current mode logic driver that employs a level shifting mechanism |
| JP2005223627A (ja) * | 2004-02-05 | 2005-08-18 | Asahi Kasei Microsystems Kk | 演算増幅回路 |
| KR100620719B1 (ko) * | 2004-06-30 | 2006-09-14 | 주식회사 화인 | 스팀오븐기의 도어 충격완충 단속장치 |
| KR20220131578A (ko) * | 2021-03-22 | 2022-09-29 | 매그나칩 반도체 유한회사 | 슬루율 가속 회로 및 이를 포함하는 버퍼 회로 |
| CN115659887B (zh) * | 2022-11-02 | 2023-08-29 | 东南大学 | 一种低电压标准逻辑单元门延时模型的建立方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3569746A (en) * | 1970-02-06 | 1971-03-09 | Commissariat Energie Atomique | High speed nonsaturating logic circuit |
| US3700915A (en) * | 1971-01-18 | 1972-10-24 | Motorola Inc | Full-power/half-power logic gate |
| JPS5323526A (en) * | 1976-08-17 | 1978-03-04 | Fujitsu Ltd | Electronic circuit |
| JPS541415A (en) * | 1977-06-06 | 1979-01-08 | Kashiwara Shinji | Frame unit |
| US4585957A (en) * | 1983-04-25 | 1986-04-29 | Motorola Inc. | Diode load emitter coupled logic circuits |
| US4551638A (en) * | 1983-12-19 | 1985-11-05 | Advanced Micro Devices, Inc. | ECL Gate with switched load current source |
-
1986
- 1986-06-05 US US06/871,639 patent/US4713560A/en not_active Expired - Lifetime
-
1987
- 1987-06-04 CA CA000538787A patent/CA1258497A/en not_active Expired
- 1987-06-04 KR KR1019870005652A patent/KR950005023B1/ko not_active Expired - Fee Related
- 1987-06-05 EP EP87401267A patent/EP0249541B1/de not_active Expired - Lifetime
- 1987-06-05 DE DE8787401267T patent/DE3781462T2/de not_active Expired - Lifetime
- 1987-06-05 JP JP62140111A patent/JPS6379419A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6379419A (ja) | 1988-04-09 |
| EP0249541B1 (de) | 1992-09-02 |
| KR880001113A (ko) | 1988-03-31 |
| US4713560A (en) | 1987-12-15 |
| DE3781462T2 (de) | 1993-04-01 |
| EP0249541A2 (de) | 1987-12-16 |
| CA1258497A (en) | 1989-08-15 |
| KR950005023B1 (ko) | 1995-05-17 |
| EP0249541A3 (en) | 1989-10-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |