DE69029068D1 - Verfahren zum Herstellen eines kontaktloches in einem integrierten Halbleiterstromkreis - Google Patents

Verfahren zum Herstellen eines kontaktloches in einem integrierten Halbleiterstromkreis

Info

Publication number
DE69029068D1
DE69029068D1 DE69029068T DE69029068T DE69029068D1 DE 69029068 D1 DE69029068 D1 DE 69029068D1 DE 69029068 T DE69029068 T DE 69029068T DE 69029068 T DE69029068 T DE 69029068T DE 69029068 D1 DE69029068 D1 DE 69029068D1
Authority
DE
Germany
Prior art keywords
producing
contact hole
semiconductor circuit
integrated semiconductor
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69029068T
Other languages
English (en)
Other versions
DE69029068T2 (de
Inventor
Yoshiaki Asao
Shizuo Sawada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69029068D1 publication Critical patent/DE69029068D1/de
Application granted granted Critical
Publication of DE69029068T2 publication Critical patent/DE69029068T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6322Formation by thermal treatments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
DE69029068T 1989-08-10 1990-06-21 Verfahren zum Herstellen eines kontaktloches in einem integrierten Halbleiterstromkreis Expired - Fee Related DE69029068T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1205671A JP2726502B2 (ja) 1989-08-10 1989-08-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69029068D1 true DE69029068D1 (de) 1996-12-12
DE69029068T2 DE69029068T2 (de) 1997-04-03

Family

ID=16510764

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69029068T Expired - Fee Related DE69029068T2 (de) 1989-08-10 1990-06-21 Verfahren zum Herstellen eines kontaktloches in einem integrierten Halbleiterstromkreis

Country Status (5)

Country Link
US (1) US5032528A (de)
EP (1) EP0412263B1 (de)
JP (1) JP2726502B2 (de)
KR (1) KR930007755B1 (de)
DE (1) DE69029068T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2327810B (en) * 1997-02-07 1999-06-09 United Microelectronics Corp Manufacturing integrated circuit devices with different gate oxide thicknesses
US6541812B2 (en) * 1998-06-19 2003-04-01 Micron Technology, Inc. Capacitor and method for forming the same
JP3466102B2 (ja) * 1999-03-12 2003-11-10 沖電気工業株式会社 半導体装置及び半導体装置の製造方法
DE50014168D1 (de) * 2000-12-21 2007-04-26 Micronas Gmbh Verfahren zum herstellen eines eine mikrostruktur aufweisenden festkörpers
JP2004304162A (ja) * 2003-03-17 2004-10-28 Seiko Epson Corp コンタクトホール形成方法、薄膜半導体装置の製造方法、電子デバイスの製造方法、電子デバイス
DE102004007904B4 (de) * 2004-02-18 2008-07-03 Vb Autobatterie Gmbh & Co. Kgaa Verfahren zur Bestimmung mindestens einer Kenngröße für den Zustand einer elektrochemischen Speicherbatterie und Überwachungseinrichtung

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5317390B2 (de) * 1973-03-23 1978-06-08 Mitsubishi Electric Corp
US3966501A (en) * 1973-03-23 1976-06-29 Mitsubishi Denki Kabushiki Kaisha Process of producing semiconductor devices
US4049477A (en) * 1976-03-02 1977-09-20 Hewlett-Packard Company Method for fabricating a self-aligned metal oxide field effect transistor
JPS53112668A (en) * 1977-03-14 1978-10-02 Mitsubishi Electric Corp Preparing method for oxide film
JPS594137A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置の製造方法
NL8302541A (nl) * 1983-07-15 1985-02-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, en halfgeleiderinrichting vervaardigd volgens de werkwijze.
JPS6021521A (ja) * 1983-07-15 1985-02-02 Hitachi Ltd 半導体装置
EP0290268A3 (de) * 1987-05-08 1990-01-10 Raytheon Company Verfahren zum Herstellen eines bipolaren Transistors
JP2550590B2 (ja) * 1987-07-22 1996-11-06 ソニー株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JP2726502B2 (ja) 1998-03-11
EP0412263B1 (de) 1996-11-06
DE69029068T2 (de) 1997-04-03
EP0412263A3 (en) 1993-01-07
KR930007755B1 (ko) 1993-08-18
JPH0370125A (ja) 1991-03-26
KR910005458A (ko) 1991-03-30
EP0412263A2 (de) 1991-02-13
US5032528A (en) 1991-07-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee