EP0000169A1 - Condensateur à jonction semiconducteur dans un mode intégré de construction et circuit du type bootstrap avec un tel condensateur - Google Patents

Condensateur à jonction semiconducteur dans un mode intégré de construction et circuit du type bootstrap avec un tel condensateur Download PDF

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Publication number
EP0000169A1
EP0000169A1 EP78100194A EP78100194A EP0000169A1 EP 0000169 A1 EP0000169 A1 EP 0000169A1 EP 78100194 A EP78100194 A EP 78100194A EP 78100194 A EP78100194 A EP 78100194A EP 0000169 A1 EP0000169 A1 EP 0000169A1
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EP
European Patent Office
Prior art keywords
capacitance
base
emitter
transistor
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP78100194A
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German (de)
English (en)
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EP0000169B1 (fr
Inventor
James Joseph Tomczak
Richard Norman Wilson
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International Business Machines Corp
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International Business Machines Corp
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Publication of EP0000169A1 publication Critical patent/EP0000169A1/fr
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
    • H10D84/215—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors of only varactors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/62—Capacitors having potential barriers
    • H10D1/64—Variable-capacitance diodes, e.g. varactors 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors

Definitions

  • the invention relates to a voltage-dependent capacitance in integrated circuits according to the preamble of claim 1 and their use in a bootstrap circuit.
  • Bipolar circuits are often used for applications in logic circuits and for clocks, whereas field effect circuits are used for memory applications. Since bipolar circuits generally operate at voltages well below the values required to operate field effect circuits, buffer circuits are required to raise the bipolar signal levels to the level of field effect circuits. Bipolar circuits are usually used to implement this buffer function.
  • Patent 3,656,004 the built-in capacitance between the base and emitter itself is used to provide additional stored charge that allows the output emitter follower to remain conductive for a sufficient amount of time after the base driver circuitry has been completed has become non-conductive, so that the output voltage reaches the value of the supply potential.
  • the amount of retained charge is limited by the large interference capacitances between the circuit elements and the substrate of the integrated circuit, as well as by the time required to charge the internal capacitances after the output signal has started.
  • a bootstrap capacity is used which is between the output of the emitter follower and its entrance lies; This results in a set high voltage level with which the output circuit is rendered conductive after the input signal has already decayed for the driver circuit in the normal case, Fig. 1 shows a versinrachte drive circuit of bootstrap type, it is applied in the input signal V a to T1. and an inverted output logic signal is high, conducts T1 and thus also T4, which connects node A to earth.
  • T1 When T1 conducts, the base of T2 is near ground potential and T 2 is off. The voltage drop across R1 allows the feedback capacitor Cfb to charge up to approximately VL minus V be of the diode D1.
  • T1 and T4 When the input signal transitions from its high to low logic level, T1 and T4 are turned off. The base of T2 then rises in potential and thus turns on T2, which also makes T3 conductive and causes the output signal V out to rise.
  • the rate at which the potential in node A increases is determined by the size of the applied capacitive load (which is not shown), the size of C.fb and the size of various parasitic capacities, which are summarized as variable capacitance C p are.
  • FIG. 3A is a schematic illustration of the capacitor shown in FIG. 2;
  • FIG. 3B is an illustration of the capacitive effects of the capacitor when the potential at Node A rises.
  • the characteristics of the reverse polarity diode correspond to a variable capacitor CP, the capacitance of which increases as the potential at node A increases. Since the ratio of Cfb to Cp can be small, the effectiveness of the feedback is reduced.
  • other capacitor structures for example junction capacitance as in US Pat. No. 3,474,309 can be used, they also have large parasitic capacitances which are coupled to the capacitor connections and reduce the effectiveness of this circuit.
  • the object of the present invention is accordingly to improve integrated bipolar circuits with capacitive feedback elements and in particular to reduce the disruptive effects of parasitic capacitances.
  • the invention uses a voltage-dependent capacitance with a plurality of semiconductor boundary layers, in which three pn boundary layers connected in series are arranged between a reference potential and an output terminal, and in which the middle pn boundary layer is reversed with respect to the other two boundary layers.
  • the use of the voltage-dependent capacitance as Bcotstrap capacity in a bipolar driver circuit provides a circuit which has a wide working range, mainly astkapaztician due to the built-L that is supplied for the input signal by the capacity of the central pn junction.
  • Fig. 4 shows an embodiment of the invention in the form of a bipolar bootstrap driver circuit with an emitter follower of the Darlington type.
  • the circuit is intended for creating an input signal V, which is supplied by a bipolar logic circuit, providing an output signal V out, the voltage levels are a driven field effect transistor (FET) circuit between the ground potential and the supply voltage V H for the drain electrodes.
  • the circuit comprises an input transistor T 1 , the base of which is coupled to V a and the collector of which is connected to the input of a Darlington amplifier pair T2 and T3.
  • the emitter of T1 is grounded through resistor R2 and is connected directly to the base of transistor T4, which is used to quickly step down the output signal.
  • the collector of T1 is also connected to a low-level voltage VL via a transistor D1 connected as a diode and a resistor R1.
  • the amplifier or driver part of the circuit contains the transistors T2 and T3, the collectors of which are connected to the supply potential VH of the FET drain electrodes.
  • the output of the amplifier is at voltage node A connected to the collector of transistor T4.
  • an element T5 which is similar to a bipolar transistor and whose base is connected to both the node A and to V out .
  • the collector of T5 is connected to VH, the emitter to voltage node B between R1 and D1.
  • the bias of T5 is such that there is no transistor effect and the element only acts as a pair of boundary layer capacitances which give the output signal V out via the feedback capacitance Cfb to node B and couple the output signal V out with VH via the internal load capacitance CLi.
  • the circuit works according to Figure 4 is as follows: If V assumes a high level, T1 is conductive and a current flows from VL through D1, R1, T1 and R2 to ground. Current through R2 causes the base of T4 to rise above the value Vbe and thus turns on the transistor T4, which then sets the nodes A and V out to ground potential. The voltage division by D1, R1 and R2 keeps the base potential of T2 so low that T2 and T3 remain non-conductive. However, node B maintains a voltage that is approximately equal to VL minus Vbe of D1 and thus causes the emitter / base interface of T5 to be reverse biased and charges Cfb. The collector of T5 connected to VH supplies a reverse voltage for the collector-base boundary layer, which loads the CLi.
  • T1 When V goes to a low level, turns off T1 and thus T4, so that the output signal is not retained longer at ground potential.
  • T1 When T1 is switched off, the potential at the base of T2 increases, both T2 and T3 switch on and the potential at node A and the voltage V out increase in the direction of VH. If it is assumed for a moment that T5 is not present, the transistor effect of T2 would be limited to the area in which node A is more than approximately two to is three Vbe voltage drops below VL because R1 would not be able to supply current to the base of T2 if the voltage difference across R1 became zero.
  • the voltage due to the precharge on Cfb is capacitively coupled to node B, which thereby rises to a potential V out plus the precharge voltage (VL minus Vbe) and thus causes node B to rise considerably above the precharge potential (VL minus Vbe) .
  • the voltage rise enables T2 and T3 to remain conductive until V out essentially reaches VH; the desired goal has been achieved.
  • the internal load capacitance CLi which is formed by blocking the collector-base junction of T5, acts as a limiter for the rise time of the output signal.
  • the ratio of Cfb and CLi can be adjusted during the manufacturing process so that both the desired feedback and the desired internal load capacity result. It should be noted here that, unlike in the prior art (FIG. 1), this circuit does not have a relatively large parasitic capacitance Cp between the output and ground.
  • Fig. 5A is an illustration of the diode characteristics of the capacitive element T5; thereafter it consists of diodes connected in series, namely the emitter-base diode 10, the base-collector diode 12 and the collector-isolation diode 14. All these three boundary layers are permanently polarized in the reverse direction.
  • Diode 10 is initially kept at voltage (VL minus Vbe) via terminal B and at zero V via terminal A.
  • Diode 12 lies between the voltages VH and and zero V. When V off rises, diode 10 remains polarized in the reverse direction, since terminal B is capacitively coupled in such a way that it assumes a higher potential than terminal A; the diode 12 is between the voltages VH and Vaus.
  • FIG. 5B schematically shows the purely capacitive effect of T5 between nodes A and B.
  • Cfb and CLi are shown as variable capacitances, since they are formed by reverse polarized pn boundary layers (junction capacitance), the different ! Reverse voltage conditions are subject.
  • Diode 14 in Figure 5A is shown as a fixed capacitance Cp; it actually has no influence on the functioning of the circuit. In cases where Cp is large, as in Fig. 3B, care must be taken that Cp does not affect the effect of bootstrap capacity Cfb.
  • FIGS. 6 and 4 show a second embodiment of the invention in the form of a NAND driver circuit with two input signals.
  • the circuit consists of an AND gate with two inputs A and B, which are connected to the emitters of the transistors T6A and T6B.
  • the transistor D4 connected as a diode between the base and the collector of T6A and T6B prevents them from reaching deep into the saturation region.
  • the T6A and T6B collectors are coupled to the bases of T1 and T7 via resistor R7.
  • the emitters of T1 and T7 are connected to the base of transistor T4, which serves to lower the voltage to 'ground potential.
  • the collector of T1 is connected to the input of amplification transistor T2 and to diodes D2 and D3, which are coupled to VH via R4 to avoid deep saturation of T1.
  • the emitter of T2 is connected to the base of the output driver transistor T3, the emitter of which is in turn connected to the output V out.
  • the collector of T7 is coupled to the base of T8, whose emitter is connected to the base of T3 to provide additional driver current for T 3.
  • the current for driving T2 is provided by the combination T9, R1, R12 and R13, which together functionally with D1 and R1 in Fig. 4 are equivalent.
  • the element T5 supplies the voltage-dependent capacitances Cfb and CLi, which are coupled to the output at the emitter of T3.
  • T5 is designed as a bipolar element with five emitters and multiple base contacts so that the desired characteristics are obtained; this structure will be discussed in more detail later.
  • Transistors D8, D5 and D6, connected as diodes, help to supply current via T1 and T7 to T4 when the VH output signal is driven to ground.
  • the diode D7 prevents T2 from reaching deep into the saturation range.
  • the circuit of FIG. 6 operates in a similar manner to that of FIG. 4 when the additional logic AND gate at the input is taken into account. If one or both of the input signals A and / or B have the low logic level (zero V), then either T6A or T6B conducts or both and result in the base of T1 and T7 having a potential close to the ground potential (zero V) see. Since T1 and T7 do not conduct, T4 also remains non-conductive. At this point in time, the output signal V out already has a value of im. essential VH reaches and maintains this potential until both input signals A and B return to the high logic level.
  • both input signals A and B have a sufficiently high potential that the transistors T6A and T6B no longer conduct, the potential at the base of T1 and T7 increases so that they become conductive. A current then flows through T1 and T7, to the base of T4, which attaches to the transistor T4 and thus pulls V out against the ground potential.
  • the diodes D8, D5 and D6 together with T1 and T7 supply additional current to T4, specifically depending on the load on the output terminal.
  • the diode D6 connected between the collectors of T1 and T7 balances the collector currents of these two transistors.
  • T2 and T3 are not conductive.
  • Resistor voltage divider R13 and R14 is now between VH and ground (across the base of T5) and the potential at the base of T9 turns T9 on and charges the multiple emitters of T5 to a potential that is approximately one Vbe voltage drop below the potential lies, which is determined by the voltage divider R13 and R14.
  • the feedback capacitance Cfb is thereby charged to the same potential.
  • the internal load capacity CLi is loaded onto VH.
  • the figures 7A and 7B show the structure of the element T5 as built into the circuit of FIG. 6; a common manufacturing process is used for all transistors.
  • the capacitive element is formed in an insulated diffusion well 16 made of epitaxial N-silicon, which was produced on a P-substrate 18; the tub is delimited by the insulation areas 20.
  • the diffusion well is essentially identical to that used for the other bipolar elements on the circuit board.
  • the remaining transistor structures on the substrate use a buried N + sub-collector, one is missing in the capacitive element in order to determine the density of the insulation defects (To reduce so-called pipe errors to a minimum and to achieve maximum collector resistance. For the same reason, the contact to the collector is made in an extension of the trough 16.
  • a single base region 22 with a conductivity of the P type is diffused in and inside of the base region 22 a plurality of emitter regions 24, for example 5.
  • a suitable insulation layer 26 covers the surface of the element with the exception of the contact holes, at which the conductor tracks (not shown) lying above the structure form an ohmic contact with the different parts of the semiconductor substrate shown are connected to a common conductor which has finger-like radiations which extend along the emitter regions 24.
  • multiple contacts for example six, are provided for contacting the base region 22.
  • the capacitance of the feedback capacitor Cfb can be varied by increasing or decreasing the number and size (i.e. the area of the boundary layer) of the emitter regions.
  • the value of Cfb can be changed with little or no change in the capacitance of the base-collector interface so that the ratio of Cfb to CLi can also be adjusted. Since the collector region 16 is directly connected to VH, the normally large capacitance collector insulation and collector substrate are isolated from the active terminals of the element.
  • NPN transistors The description so far has referred to NPN transistors; however, it is readily possible for the person skilled in the art to use those of the PNP type instead of the NPN transistors using the known replacement rules.
  • the capacitive element labeled T5 was symbolized for a bipolar transistor in the drawings to underline the physical similarities of the element with conventional bipolar transistors. However, it must be emphasized that element 5 does not operate in an area where transistor action occurs.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
EP78100194A 1977-06-29 1978-06-19 Condensateur à jonction semiconducteur dans un mode intégré de construction et circuit du type bootstrap avec un tel condensateur Expired EP0000169B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/811,028 US4191899A (en) 1977-06-29 1977-06-29 Voltage variable integrated circuit capacitor and bootstrap driver circuit
US811028 2001-03-16

Publications (2)

Publication Number Publication Date
EP0000169A1 true EP0000169A1 (fr) 1979-01-10
EP0000169B1 EP0000169B1 (fr) 1981-10-07

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EP78100194A Expired EP0000169B1 (fr) 1977-06-29 1978-06-19 Condensateur à jonction semiconducteur dans un mode intégré de construction et circuit du type bootstrap avec un tel condensateur

Country Status (5)

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US (1) US4191899A (fr)
EP (1) EP0000169B1 (fr)
JP (1) JPS5412577A (fr)
DE (1) DE2861127D1 (fr)
IT (1) IT1112275B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180298790A1 (en) * 2015-09-10 2018-10-18 Schaeffler Technologies AG & Co. KG Camshaft adjuster

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4321490A (en) * 1979-04-30 1982-03-23 Fairchild Camera And Instrument Corporation Transistor logic output for reduced power consumption and increased speed during low to high transition
US4376252A (en) * 1980-08-25 1983-03-08 International Business Machines Corporation Bootstrapped driver circuit
US4516041A (en) * 1982-11-22 1985-05-07 Sony Corporation Voltage controlled variable capacitor
US4679215A (en) * 1985-12-06 1987-07-07 Sperry Corporation Exceedance counting integrating photo-diode array
US4752913A (en) * 1986-04-30 1988-06-21 International Business Machines Corporation Random access memory employing complementary transistor switch (CTS) memory cells
US4791313A (en) * 1986-11-13 1988-12-13 Fairchild Semiconductor Corp. Bipolar transistor switching enhancement circuit
US4760282A (en) * 1986-11-13 1988-07-26 National Semiconductor Corporation High-speed, bootstrap driver circuit
US5255240A (en) * 1991-06-13 1993-10-19 International Business Machines Corporation One stage word line decoder/driver with speed-up Darlington drive and adjustable pull down
US5680073A (en) * 1993-06-08 1997-10-21 Ramot University Authority For Applied Research & Industrial Development Ltd. Controlled semiconductor capacitors
JP2004241624A (ja) * 2003-02-06 2004-08-26 Mitsubishi Electric Corp 電圧制御発振回路
US7602228B2 (en) 2007-05-22 2009-10-13 Semisouth Laboratories, Inc. Half-bridge circuits employing normally on switches and methods of preventing unintended current flow therein
US10360958B2 (en) * 2017-06-08 2019-07-23 International Business Machines Corporation Dual power rail cascode driver

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3544862A (en) * 1968-09-20 1970-12-01 Westinghouse Electric Corp Integrated semiconductor and pn junction capacitor
DE1764148A1 (de) * 1968-04-10 1971-05-19 Itt Ind Gmbh Deutsche Spannungsabhaengiger Kondensator,insbesondere fuer Festkoerperschaltungen

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2036530A5 (fr) * 1969-03-24 1970-12-24 Radiotechnique Compelec

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1764148A1 (de) * 1968-04-10 1971-05-19 Itt Ind Gmbh Deutsche Spannungsabhaengiger Kondensator,insbesondere fuer Festkoerperschaltungen
US3544862A (en) * 1968-09-20 1970-12-01 Westinghouse Electric Corp Integrated semiconductor and pn junction capacitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180298790A1 (en) * 2015-09-10 2018-10-18 Schaeffler Technologies AG & Co. KG Camshaft adjuster

Also Published As

Publication number Publication date
JPS5635028B2 (fr) 1981-08-14
IT7825052A0 (it) 1978-06-28
EP0000169B1 (fr) 1981-10-07
DE2861127D1 (en) 1981-12-17
JPS5412577A (en) 1979-01-30
IT1112275B (it) 1986-01-13
US4191899A (en) 1980-03-04

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