EP0043532A2 - Circuit digital à semiconducteur pour orgue électronique - Google Patents

Circuit digital à semiconducteur pour orgue électronique Download PDF

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Publication number
EP0043532A2
EP0043532A2 EP81105031A EP81105031A EP0043532A2 EP 0043532 A2 EP0043532 A2 EP 0043532A2 EP 81105031 A EP81105031 A EP 81105031A EP 81105031 A EP81105031 A EP 81105031A EP 0043532 A2 EP0043532 A2 EP 0043532A2
Authority
EP
European Patent Office
Prior art keywords
amplitude
assigned
sound signal
control
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP81105031A
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German (de)
English (en)
Other versions
EP0043532B1 (fr
EP0043532A3 (en
Inventor
Helmut Rösler
Otto Ing. grad. Mühlbauer
Josef Ing. Grad. Dempf
Klaus-Dieter Dipl.-Phys. Bigall
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of EP0043532A2 publication Critical patent/EP0043532A2/fr
Publication of EP0043532A3 publication Critical patent/EP0043532A3/de
Application granted granted Critical
Publication of EP0043532B1 publication Critical patent/EP0043532B1/fr
Expired legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
    • G10H1/00—Details of electrophonic musical instruments
    • G10H1/18—Selecting circuits
    • G10H1/183—Channel-assigning means for polyphonic instruments

Definitions

  • German ⁇ P 29 48 769.2 (VPA 79 P 1189) there is a digital semiconductor circuit for an electronic organ with a number of control inputs applied via the manual corresponding to the number of play keys in the manual of the organ and with one of an oscillator system with periodic electrical vibrations described number of sound signal inputs, in which a control input is assigned to a game key of the manual and a sound signal input to a sound frequency, in which a 'sound signal output is also provided for the application of an electro-acoustic transducer and finally for the application the control signals serving the control inputs correspond to the logic levels.
  • the individual control inputs are each assigned to a cell of a clock-controlled shift register operated as a parallel series converter, that the signal output of the shift register and the clock pulses provided for its operation are also used to control a switching system which, on the other hand, are connected to the
  • the totality of the provided sound signal inputs is such that the number of sound signal outputs is also lower than the number of control inputs and each of the sound signal outputs is assigned an amplitude shaper and that finally the outputs of the amplitude shifters are connected to an electro-acoustic transducer.
  • the switching system is designated VM in the DE application.
  • An amplitude former AF i is connected to each of the audio outputs AU i provided for it.
  • the index "i" assumes a value corresponding to one of the integers from 1 to n for n sound outputs and amplitude shapers. They are given, for example, in Figure 1 of the parent application.
  • the invention relates to a digital semiconductor circuit for an electronic organ with a number of control inputs and the number of control keys corresponding to the number of the manual of the organ with a number of sound signal inputs to which an oscillator system is subjected to periodic electrical vibrations, in which one control input each has a game key in the manual and one sound signal input is assigned to one sound frequency, and in which a sound signal output is also provided for the application of an electro-acoustic transducer and in which the control signals used to apply the control inputs correspond to the logic levels "1" and "0", in which also the individual control inputs are each assigned to a cell of a clock-controlled shift register operated as a parallel series converter, in which the signal output of the shift register as well the clock pulses provided for its operation are used to control a switching system which, on the other hand, is provided with the entirety of the sound signal inputs provided, in which the number of sound signal outputs is also lower than the number of control inputs and each of the sound signal outputs is assigned an amplitude shaper
  • each of the octaves provided in the manual is assigned a mixing stage matched to the octave in question and that the output of each of the provided amplitude shapers is assigned to the octave in question in accordance with the octave associated with the tone signal present in the respective amplitude shaper Mixing stage can be switched on.
  • One way to do this is to assign a sensor to the individual amplitude shapers that is capable of measuring the octave of the one in question fenden amplitude shaper to detect any pending signal based on the oscillation frequency and then ensures via logic that the sound signal output is automatically connected to the mixer that is assigned to the recognized octave.
  • FIGS. 1, 2 and 3 are block diagrams of a semiconductor circuit in accordance with the DE application in FIG. 2, a section of this block diagram provided with details that are essential for the present embodiment, and in FIG. 3, an embodiment according to the present invention to be carried out on the basis of the circuit parts apparent from this section Invention shown.
  • a pressed play key in the manual M of the organ generates a "1" at the control input E of the semiconductor circuit that is individually assigned to it, while the control input E assigned to a play key that is not actuated has the level "0".
  • the clock generator TG supplies a shift register PSW (the input shift register) with the clock pulses required for shifting out the information formed in the shift register PSW between the individual polling cycles.
  • the information in the shift register PSW is fed from the game keys of the manual via the respectively assigned control input E_ to one of the memory cells provided in the shift register PSW.
  • the order of the game buttons in the manual M corresponds to the order of the memory cells assigned to the individual game buttons in the shift register PSW.
  • the information periodically shifted out of the shift register PSW reaches the actual switching circuit, the input of which is through the so-called channel selection KW is formed.
  • the channel selector KW which is described in detail in the DE application, emits a number of mutually identical branches, each of which leads to one of the provided amplitude shapers AF i , where i indicates the number of the amplitude shaper. Its output is labeled AG i .
  • the individual amplitude former AF i is preceded by an output part V i of the switching circuit, which is supplied with the necessary digital information on the one hand via the channel selector KW, on the other hand by the sound signal generator TOS and finally by a sound address counter TAZ.
  • This tone address counter TAZ takes over the shifting acts serving for pushing out the information from the input shift register PSW as counting pulses in the individual polling cycles.
  • the tone address counter TAZ consists of two parts, of which the first part consists of four series-connected binary counting stages, which are switched in such a way that the first part of the counter only counts to "12" in order to return to the initial state "zero" when the thirteenth counting pulse arrives "to be switched.
  • the second part of the tone address counter TAZ consists of three series-connected counter stages, which are connected so that the highest count corresponds to the number k of the intended octaves.
  • the second part of the counter TAZ receives its counting pulses each time the first part of the counter TAZ changes from the count "12" to the count "zero".
  • each time a "1" is output from the shift register PSW the respectively associated count of both parts of the sound address counter TAZ is coded out and temporarily stored in one of the intended output parts V i .
  • two series memories S are in each of the provided output parts V i , that is, output channels, of the switching circuit as S provided, when the exit of a "1" from the shift register PSW save the currently existing count of the two parts of the sound address counter TAZ, provided that the output channel V i concerned is controlled by the channel selector KW for control by the Shift register PSW given "1" is released.
  • the name of the sound of the game key belonging to the "1" which is just leaving the shift register is stored in the storage part S and the number of the associated octave - in the form of the current count of the two parts of the sound address counter TAZ - is stored in the storage part S.
  • FIG. 2 shows further details regarding the individual output channel V i .
  • the two series memories S and S of the individual output channel V i of the switching circuit are used via a decoder D and D, respectively, to act upon further circuit parts, the design of which can be seen from the main application. However, because they are insignificant in connection with the invention, they are summarized here in a block labeled WS.
  • the circuit parts contained in the block WS represent a switching, controlled via the decoders D and D *, between the sound signal inputs supplied by the oscillation system which supplies the required sound signals in the form of corresponding square waves by the sound vibrations of at least one octave and the individual output channels V i and thus the individual amplitude shapers AF i represents.
  • the memory S provided for storing the number k of the game key controlling the respective amplitude shaper AF i in manual M should now also carry the index "i" in view of its fixed assignment to the amplitude shaper AF i .
  • each of these ten amplitude formers AF i is a series memory S 1 storing the octave k and vice versa each of the ten provided Series S i memory according to one of ten amplitude former AF i individually assigned.
  • the individual for recording the address of the currently for the actuation of the relevant AF i Amplitudenformers binding octave provided series memory S i are placed with their outputs information to a respective Adressierdekoder AS i.
  • the same addressing decoders AS 1 to AS 10 each have k outputs, where k is the number of octaves provided.
  • each of the address decoders has ten outputs which, via appropriately designed logic circuits inside the address decoder AS i, have such inputs to the inputs acted upon by one of the (three) memory cells of the memory S 1 * of the AdreB decoder are switched so that when the decoder is loaded with one of the k intended states of the associated memory S i *, the output assigned to the current state of the memory S i receives an output signal from the ten outputs of the relevant AdreB decoder, while all other outputs receive no signal receive.
  • the intended amplitude formers AF i that is to say in the example the amplitude formers AF 1 to AF 10 , are connected with their output AG i (ie AG 1 to AG 10 ), each via a resistor R to the one current-carrying connection of k transistors T ij . Since a total of n amplitude formers AF i are provided, there are consequently n. k such transistor figures in the circuit. This n. k transistors are preferably given by mutually identical MOS field-effect transistors of the enhancement type, the source connections of which are applied to the respectively assigned output AG i of the n amplitude shapers AF i provided in the manner shown in FIG. 3.
  • the first index "i" in the designation T ij for the individual transistor also indicates the number "i" of that address decoder AD i and thus of the memory Si by which the control electrode, that is to say the gate of the transistor T ij in question, is controlled.
  • k mixing stages Mi j are provided, where j is the number of the individual octave to which the respective mixing stage is permanently assigned.
  • Each of these k mixer stages can be connected to each of the n amplitude formers AF i provided via one of the transistors T ij provided, with the second current-carrying connection, ie the drain, of which the input of the respective mixer stage Mi j is connected.
  • the number of these transistors T ij is evidently equal to n. k, that is, with ten amplitude formers AF i and ten mixer stages Mi j , one hundred.
  • the transistor T ij provides the connection between the output AG i des i-th amplitude shaper AF i and the j-th mixer Mi j . This requires that the gate of the transistor T ij through that of the octave with the Number j assigned control output of the decoder with number i is controlled.
  • the output A j of the individual mixer stage Mi j is expediently not connected directly to the electro-acoustic transducer to be controlled, that is to say a loudspeaker, but via a sinusoidal filter matched to the amplitude in question.
  • a plurality of loudspeakers optionally controlled in different ways by the provided mixing stages Mi j, can be provided.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Electrophonic Musical Instruments (AREA)
EP19810105031 1980-07-07 1981-06-29 Circuit digital à semiconducteur pour orgue électronique Expired EP0043532B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3025643 1980-07-07
DE19803025643 DE3025643A1 (de) 1980-07-07 1980-07-07 Digitale halbleiterschaltung fuer eine elektronische orgel

Publications (3)

Publication Number Publication Date
EP0043532A2 true EP0043532A2 (fr) 1982-01-13
EP0043532A3 EP0043532A3 (en) 1985-05-02
EP0043532B1 EP0043532B1 (fr) 1987-12-23

Family

ID=6106562

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19810105031 Expired EP0043532B1 (fr) 1980-07-07 1981-06-29 Circuit digital à semiconducteur pour orgue électronique

Country Status (3)

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EP (1) EP0043532B1 (fr)
JP (1) JPS5748794A (fr)
DE (1) DE3025643A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1900616A2 (fr) 2006-09-15 2008-03-19 ThyssenKrupp Automotive Systems GmbH Suspension de la cabine conducteur

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3696201A (en) * 1970-11-12 1972-10-03 Wurlitzer Co Digital organ system
US4108038A (en) * 1975-04-04 1978-08-22 Nippon Gakki Seizo Kabushiki Kaisha Time shared tone keying system in electronic musical instrument
JPS5245322A (en) * 1975-08-06 1977-04-09 Kawai Musical Instr Mfg Co Ltd Circuit for selecting key signals in electronic musical instrument
DE2948769A1 (de) * 1979-12-04 1981-06-11 Siemens AG, 1000 Berlin und 8000 München Digitale halbleiterschaltung fuer eine elektronische orgel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1900616A2 (fr) 2006-09-15 2008-03-19 ThyssenKrupp Automotive Systems GmbH Suspension de la cabine conducteur

Also Published As

Publication number Publication date
EP0043532B1 (fr) 1987-12-23
DE3025643A1 (de) 1982-02-04
EP0043532A3 (en) 1985-05-02
JPS5748794A (en) 1982-03-20

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