EP0052236B1 - Générateur de son - Google Patents

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Publication number
EP0052236B1
EP0052236B1 EP81108368A EP81108368A EP0052236B1 EP 0052236 B1 EP0052236 B1 EP 0052236B1 EP 81108368 A EP81108368 A EP 81108368A EP 81108368 A EP81108368 A EP 81108368A EP 0052236 B1 EP0052236 B1 EP 0052236B1
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EP
European Patent Office
Prior art keywords
circuit
frequency
tone
input
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP81108368A
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German (de)
English (en)
Other versions
EP0052236A1 (fr
Inventor
Bruno Dipl.-Ing. Scheckel
Ernst Dipl.-Ing. Wittenzellner
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Siemens AG
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Siemens AG
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Publication date
Priority claimed from DE19803050148 external-priority patent/DE3050148A1/de
Priority claimed from DE19803043505 external-priority patent/DE3043505A1/de
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0052236A1 publication Critical patent/EP0052236A1/fr
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Publication of EP0052236B1 publication Critical patent/EP0052236B1/fr
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • B06B1/0207—Driving circuits
    • B06B1/0223—Driving circuits for generating signals continuous in time
    • B06B1/0269—Driving circuits for generating signals continuous in time for generating multiple frequencies
    • B06B1/0276—Driving circuits for generating signals continuous in time for generating multiple frequencies with simultaneous generation, e.g. with modulation, harmonics
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
    • G10H1/00—Details of electrophonic musical instruments
    • G10H1/18—Selecting circuits
    • G10H1/26—Selecting circuits for automatically producing a series of tones

Definitions

  • the invention relates to a tone generator with a semiconductor circuit which is used to control an electro-acoustic transducer, the semiconductor circuit comprising an RC oscillator, a frequency divider acted upon by it, an oscillator which activates and stabilizes the operating voltage to be applied to the oscillator Start circuit and a modulator applied by the frequency divider with at least two pulse trains, each corresponding to a different tone frequency, and finally the amplitude-modulated signals supplied by the modulator on the basis of these pulse trains serve to apply a common electro-acoustic transducer to produce a tone sequence consisting of at least two different tones .
  • Such a tone generator is described in DE-AS 2 601 922.
  • This forms an electronic door bell which e.g. is designed such that when a push button activating the circuit is actuated, the tone generator first generates a high tone and then a low tone after a defined time interval. It is a matter of using simple means to ensure that after the pushbutton is pressed, a multi-repetitive signal is produced, the last tone of which fades away without premature tearing off.
  • a bistable switch to be activated by a start signal is provided in the start circuit for activating a voltage stabilization circuit, that the voltage supplied by the voltage stabilization circuit serves on the one hand to activate the RC oscillator and on the other hand to activate the other circuit parts that, in addition, a general sequence control controlled by the first divider output of the frequency divider acted upon by the RC oscillator is provided, that the outputs of the frequency divider each supplying a pulse train corresponding to a tone frequency of the tone sequence to be generated as well as certain outputs of the sequence control for loading each circuit part of the modulator and the output of each of these circuit parts of the modulator are used to apply one digital / analog converter each, and finally these digital / analog converters are used together - in particular under Mediation of a low frequency amplifier - control the electro-acoustic transducer.
  • 1 and 2 together present the basic circuit diagram of the invention.
  • 2 shows the circuit parts that can be combined in an IC module
  • FIG. 1 shows the external circuitry of this IC module
  • 3 and 4 show a detailed embodiment of the circuit shown in FIG. 2
  • FIG. 5 shows a diagram showing the mode of operation in FIGS. 2 and 3 and 4, respectively.
  • the tone generator circuit To which forms the core of the invention and is preferably monolithically integrated, contains essentially all components of the tone generator with the exception of the electro-acoustic converter and the circuit part serving to generate the start signal and the voltage supply.
  • Connection 1 * serves as a start input, since when it is applied, for example by a signal generated by a pushbutton Dt, the tone generator and the rest of the circuit are activated becomes.
  • Connection 2 * carries the supply potential and connection 4 * the reference potential.
  • Connection 3 * forms the output of a low-frequency amplifier (audio frequency amplifier V) provided in the circuit, which is provided for loading the loudspeaker L.
  • An RC combination is connected to connections 5 * and 6 * as a controlling timing element, while connection 7 * forms an additional input for the low-frequency amplifier mentioned.
  • the timbre of the generated tone sequence can be set via it.
  • a switch implemented by a pushbutton Dt connects the connection 1 of the tone generator circuit To to the supply potential, which is also permanently connected to the connection 2 * of the tone generator circuit To.
  • the pole supplying the reference potential (ground) of the operating voltage source UB used to operate the tone generator To is permanently connected to the 4 * connection of To.
  • Both Poles of the operating voltage source UB (voltage, for example, 7 to 10 V), for example given by a battery, are also connected by a capacitor C6 (for example 100 pF).
  • the loudspeaker L has one connection at the reference potential and the other connection via a capacitor C5 at the connection 3 * and thus at the output of the LF amplifier of the tone generator circuit To.
  • the output 5 * is connected to ground via a code capacitor C1 (C1, for example, 4.7 nF).
  • C1 code capacitor
  • the two connections 5 * and 6 * are connected to one another via a resistor R1, while the connection 7 * is connected to ground via a further capacitor C2. If necessary, it can be used to control a further tone generator circuit, as described in DE-OS 3043505. For the present circuit, only the sound improvement (smoothing of the square waves) to be achieved by the presence of the connection 7 * and the capacitor C2 is important.
  • an RC oscillator 0 is initially provided which is acted upon by a frequency-determining timing element via its two control inputs 5 * and 6 * .
  • the frequency-determining timing element in FIG. 2 is made up of the resistor R bridging the two connections 5 * and 6 * (corresponds to the resistor R1 in FIG. 1) and the connection 5 * of the oscillator 0 with the reference potential U2 (in FIG. 1) given the negative pole of the voltage source UB) connecting capacitor C (in Fig. 1 the capacitor C1).
  • the square-wave pulses emitted by the oscillator O arrive on the one hand at a frequency divider TT which, in a known manner, consists of a number of flip-flop cells connected in series with one another with respect to their signal-carrying outputs and inputs and thus corresponds to a binary synchronous or asynchronous counter.
  • An output I, an output II and an output 111 each of a selected flip-flop of the divider chain TT each provide a tone frequency of the tone sequence to be generated, i.e. a square wave derived by frequency division from the mother frequency supplied by the oscillator O of the frequency corresponding to the respective tone, the level thereof correspond to the states logically «0» and «1».
  • These vibrations are applied to a first input of a circuit part G1 or G2 or G3 of a modulator Mo.
  • These circuit parts G1, G2, G3 are also controlled via a respective second input from the audio frequency divider TT via the sequence control AS with practically the same frequency as the first input of the relevant circuit part of the modulator Mo.
  • Each of these circuit parts G1, G2, G3 of the modulator Mo controls a digital-to-analog converter DA1 or DA2 or DA3, the outputs of which are used to control the loudspeaker L via a common mixing stage M and an amplifier V connected downstream thereof.
  • the amplifier V can also be influenced directly by the sequence control with regard to its degree of amplification.
  • a stabilization circuit ST has the task of stabilizing the operating voltage to be given to the various circuit parts. It receives the supply voltage UB via the connections 2 * and 4 * .
  • the tone generator as shown in FIG. 2 in the block diagram, can easily be implemented monolithically.
  • Another terminal 6 * * provides the undtrench to the various components of the circuit stabilized DC voltage along with the connection. 4
  • This key position of the stabilization circuit ST explains why the start signal to be applied to the input 1 * of the tone generator, as can be seen from FIG. 2, initially acts on the stabilization circuit ST.
  • a switch Sch implemented by a flip-flop with reset input is provided as an intermediary, which in turn is controlled by the sequence control in two respects.
  • the switch Sch is set, for example, by pressing the pushbutton Dt (FIG. 1) or by another start signal St to be maintained during the duration of the gong.
  • the flip-flop Sch is tilted into the operating state on the basis of an interference signal originating, for example, from another circuit part.
  • the sequence controller AS polls the logic state at the inputs of the switch Sch again after a so-called dead time Tz has elapsed.
  • the dead time Tz is, for example, 10 msec. If the start signal St is still pending at the inputs of the switch Sch, the circuit, ie the sound signal to be applied to the second inputs of the circuit parts G1, G2 and G3 of the modulator Mo, is released. Otherwise, the sequential control system AS sends a reset signal Re to the input switch Sch, so that it is tilted back into the initial state.
  • the operating state of the stabilization circuit ST, the oscillator O and the audio frequency divider TT also changes, which are then switched off automatically.
  • the oscillator 0 After the start of a start signal St and the activation of the oscillator 0 initiated thereon, the oscillator 0 first generates a general reset signal RES which, via the sequence control AS, ensures that all circuit parts are in the initial state required for generating the tone sequence or pass into it. Details regarding the operational sequence of the circuit are explained in the description of a circuit implementation according to FIGS. 3 and 4 which is preferably to be used.
  • the circuit shown in FIG. 3 relates to a bipolar configuration of a tone generator to be implemented monolithically in accordance with the invention in accordance with FIG. 2 and contains the stabilization circuit ST, the oscillator 0 and the low-frequency amplifier V of the system shown in FIG. 2, while in FIG. 4 an embodiment for the audio frequency divider TT, for the sequence control AS and for the modulator circuit Mo etc., that is to say the components of the circuit given by logic gates or flip-flops is shown.
  • the start signal supplied, for example, by a pushbutton Dt is, as can be seen from FIG. 1, connected to the inputs 2 * and 1 * of the circuit of the audio frequency generator. It initially affects the switch stage SCH upstream of the stabilization stage ST.
  • This essentially consists of the two npn transistors 4 and 5 and the pnp transistor 8, which together form a flip-flop.
  • the input 1 * of the circuit to be acted upon by the pushbutton Dt is connected to the cathode of a diode 1, the ground of which is at the reference potential, ie is connected to the connection 4 * of the circuit.
  • input 1 is connected via resistor 2 to the base of npn transistor 4, which is also connected via resistor 3 to the reference potential.
  • the emitter of the NPN transistor 4 and the emitter of the NPN transistor 5 are also at the reference potential, while their collectors are connected to the terminal 2 * of the circuit via a voltage divider 6.
  • the dividing point between the two resistors 6 and 7 forming the voltage divider is connected directly to the base of the pnp transistor 8.
  • the collector of the pnp transistor 8 is connected via the resistor 9 to the base of the second npn transistor 5, which is also connected via the resistor 10 to the reference potential, that is to say the terminal 4 * of the circuit, and finally also via a circuit point a, in a manner to be described, controlled by the flip-flop N4, N5 shown in FIG. 4.
  • the emitter of the pnp transistor 8 is connected to the positive pole of the supply voltage source UB, that is to say to the connection 2 * of the circuit.
  • the stabilization circuit ST is activated by the switch SCH via the emitter-collector path of the pnp transistor 8.
  • the voltage stabilization circuit ST contains as an essential component the two npn transistors 15 and 16, which are combined to form a Darlington stage, and the zener diode 13 for specifying the setpoint for the DC voltage to be supplied to the further circuit.
  • the collectors of the two npn transistors 15 and 16 are at the emitter of the npn transistor 8 of the circuit part SCH and thus at the connection 2 * .
  • the base of the one npn transistor 15 is connected via a resistor 11 to the collector of the pnp transistor 8 and to the anode of the diode 12 and via a resistor 14 to its own emitter, while the anode of the said diode 12 is connected to the cathode the Zener diode 13 and via this to the connection 4 * and thus to the reference potential.
  • the emitter of the npn transistor 15 lies at the base of the second npn transistor 16 of the stabilization circuit.
  • the npn transistor 16 which is connected as an emitter follower, serves in a manner to be described for the power supply of further circuit parts.
  • the emitter of the NPN transistor 15 and thus the base of the NPN transistor 16 of the stabilization circuit ST is connected to the connection 6 * of the circuit and thus, as can be seen in FIGS. 1 and 5, to the resistor R1 of the oscillator frequency that determines the oscillator frequency Timer.
  • the oscillator an RC oscillator O
  • the oscillator is applied via the inputs 4 * , 5 * and 6 * . It contains fourteen npn transistors and a diode as well as resistors.
  • the connection 4 * carrying the reference potential is initially connected directly to the cathode of the diode 19 and to the emitter of the npn transistor 20, while the anode of the diode 19 is connected to the base of the npn transistor 20 and via a resistor 18 is connected to the emitter of a further npn transistor 17, the collector of which is connected directly and the base of which is connected via a resistor 38 to the connection 6 * of the circuit.
  • the npn transistor 20 already mentioned in the last paragraph is connected with its collector and the resistor 21 to the base of a third npn transistor 23, the emitter of which is also at the reference potential 4 * and its collector is connected on the one hand via the resistor 28 to the connection 6 and thus to the emitter of the npn transistor 15 in the stabilization circuit ST, while on the other hand a direct connection between the collector of the third npn transistor 23 and the base of a fourth npn Transistor 24 is made.
  • the emitter of the fourth NPN transistor 24 is in turn connected to the reference potential, that is to the terminal 4 * , while its collector is connected to the bases of a fifth and a sixth NPN transistor 42 and 47 via a resistor 41 and 46, respectively.
  • the emitters of the two last-mentioned npn transistors 42 and 47 are also at the reference potential, so that these transistors are also operated in an emitter circuit.
  • the collector of the fifth npn transistor 42 leads via a resistor 43 to the base of two further npn transistors 45 and 36, while the collector of the sixth npn transistor 47 via a circuit point c in a manner to be described below for signaling for the frequency divider TT of the tone generator circuit is provided.
  • the collector of the seventh npn transistor 45 whose base is connected via the resistor 43 to the collector of the fifth npn transistor 42 of the oscillator 0, is directly connected to the stabilized voltage and thus to the terminal 6 * of the circuit with its collector placed.
  • the eighth npn transistor 36 also introduced in the last paragraph in connection with the fifth transistor 42, lies on the one hand with its collector at the base of the second npn transistor 17 introduced above and on the other hand via a resistor 38 at the terminal 6 * carrying the stabilized voltage.
  • the collector of the eleventh npn transistor 27 is located directly on the connection 6 * of the circuit which carries the stabilizing voltage, while the emitter of this transistor 27 is connected via a resistor 26 to the collector of the first npn transistor 20 of the oscillator, via the already mentioned resistor 21 is connected to the base of the third npn transistor 23 and, via a further resistor 22, to the base of a twelfth npn transistor 25 which is also connected to its emitter at the reference potential 4 * .
  • the collector of this twelfth npn transistor 25 leads via a resistor 29 to a circuit node which is connected on the one hand via a resistor 30 to the reference potential and via a resistor 31 to the connection 6 * of the circuit carrying the stabilizing voltage, while on the other hand the said node is located directly at the base of the tenth NPN transistor 37, that is to say the second transistor of the differential amplifier 36, 37.
  • the seventh npn transistor 45 which was already introduced above in connection with the fifth npn transistor 42, is (as already mentioned) connected to the terminal 6 * with its collector. It should also be noted with regard to this transistor 45 that an emitter is connected via a resistor 44 to the base of a ninth NPN transistor 48, the emitter of which is also directly connected to the reference potential, that is to the terminal 4 * of the circuit Collector is connected via a node d in a manner to be described to the AND gate U13 shown in FIG. 4 and other circuit parts.
  • a constant current source is provided to supply power to the differential amplifier formed from the eighth and tenth npn transistors 36 and 37.
  • This consists of a thirteenth npn transistor 34, whose emitter is connected to the reference potential via a resistor 35 and whose collector and base are connected via a resistor 40 to the connection 6 * of the circuit to which the stabilized voltage is applied, in combination with a fourteenth npn transistor 32.
  • the emitter of this fourteenth npn transistor 32 is in turn connected to the reference potential via a resistor 33, its base with the base and the collector of the thirteenth transistor 34 and its collector forming the output of the current source to the emitter of the eighth and the tenth npn transistor, that is to say the transistors 36 and 37 forming the differential amplifier.
  • the base of the eighth npn transistor 36 and thus the control input of said differential amplifier is connected directly to the connection 5 * of the circuit and thus via the capacitor C1 when using the circuit shown in FIG. 1 to the reference potential , that is the negative pole of the DC voltage source UB.
  • the differential amplifier V takes up the lower part of the circuit diagram shown in FIG. 3. It receives its operating voltage on the one hand from the emitter of the NPN transistor 15 from the stabilization circuit ST and on the other hand from the supply connection 4 * of the overall circuit. Its circuit will now be briefly described.
  • the stabilization input 6 * of the circuit is connected to the emitter of a first pnp transistor 65 and a second pnp transistor 66 of the amplifier V, which are directly connected to their base connections, the collector base path of the second pnp transistor 66 also being short-circuited.
  • the collectors of the two pnp transistors are connected to the collector of a first npn transistor 64 and a second npn transistor 67, the emitters of which are connected to one another to form a differential amplifier and are connected to the collector of a third npn transistor 68.
  • the third npn transistor 68 is interconnected with a fourth npn transistor 69 to form a current mirror, the fourth transistor 69 being connected as a diode by short-circuiting its base-collector path and the emitters of both transistors 68 and 69 being connected to the reference potential, that is to say the connection 4 * .
  • the base connections of transistors 68 and 69 are connected via resistor 70 to connection 6 * of the circuit which carries the stabilized voltage.
  • the base of the second npn transistor 67 in the differential amplifier 64, 67 is located directly at the connection 7 * of the overall circuit, which, as already mentioned in the description of FIG. 2, can be used to control further circuit parts, for example the second audio frequency generator circuit To2. Furthermore, the base of the second npn transistor 67 is acted upon by the mixer M, that is to say the signal used to control the loudspeaker L, via a circuit point e and thus serves as an amplifier input.
  • the base of the transistor 67 is connected via the resistor 71 to the emitter of a fifth npn transistor 73, which with its emitter is connected on the one hand via the resistor 72 to the reference potential, with its collector on the terminal 6 * of the circuit which carries the stabilized voltage with its base is connected to the reference potential 4 * via a voltage divider 75, 74.
  • a resistor 76 also connects the collector and the base of the fifth npn transistor 73.
  • the dividing point of the voltage divider 74, 75 leads to the base of a sixth npn transistor 67, whose collector is also connected to the stabilized voltage-carrying terminal 6 * of the circuit, while its emitter is connected via a resistor 62 to the base of the first npn transistor 64 forming the reference input of the differential amplifier 64, 67 and also via a resistor 61 to the Reference potential is connected.
  • a seventh npn transistor 59 has its emitter connected to the reference potential 4 * and its collector to the collector of the first npn transistor 65 and the collector of the first npn transistor 64. Finally, the base of the first NPN transistor 64 and thus the reference input of the differential amplifier 67, 64 is connected via a resistor 63 to the output 3 * of the low-frequency amplifier and thus the circuit.
  • the collectors of the first npn transistor 65 and the two npn transistors 64 and 59 are also located at the base of an eighth npn transistor 50.
  • the base of the seventh npn transistor 59 is on the one hand via a circuit point b in a manner to be described by the Controlled flip-flop N4, N5 shown in Fig. 4.
  • it is connected via a resistor 58 to the emitter of the transistor 16 which forms an output of the stabilization circuit and has already been described.
  • the collector of the eighth npn transistor 50 is likewise directly connected to the emitter of this transistor 16.
  • the collector of a ninth npn transistor 49 which is connected with its base to the emitter of the eighth npn transistor 50 and with its emitter to the connection forming the output 3 * of the amplifier V.
  • the emitter of the eighth npn transistor 50 and the base of the ninth npn transistor 49 are connected to the collector of a tenth npn transistor 51, the base of which is short-circuited to its own collector and the emitter of which is connected to its own base via a resistor 52.
  • An eleventh npn transistor 56 with a short-circuited emitter base path is connected with its emitter to the reference potential 4 * and also to the base of a twelfth npn transistor 55, the emitter of which is also at the reference potential 4 * .
  • the collector of the eleventh npn transistor 56 is connected to the emitter of the transistor 16 in the stabilization circuit ST by means of a resistor 57, while the collector of the twelfth npn transistor 55 is connected on the one hand to the emitter of the tenth npn transistor 51 and on the other hand to the base of a third NPN transistor 53 is connected directly.
  • the collector of the third npn transistor 53 lies at the base of a thirteenth npn transistor 54, the emitter of which with the reference potential 4 * and the collector thereof, together with the collector of the third npn transistor 53 at the connection 3 * of the circuit, ie at the signal output of the amplifier V is.
  • the switching point c already mentioned in connection with the npn transistor 47 of the oscillator is, as can be seen from FIG. 4, connected to the signal input of three frequency dividers FT1, FT2, FT3 via an inverter 11.
  • the oscillator 0 is tuned so that it delivers a frequency of 13.2 kHz, for example. This frequency is used to derive the frequencies 440 Hz, 550 Hz and 660 Hz in the frequency dividers, which are then applied to one of the outputs 1 or 11 or 111 of the frequency divider circuit TT.
  • the divider output providing the desired frequency of the divider FT1 or FT2 or FT3 provided in the divider circuit TT is connected to the network input S of a flip-flop F1 or F2 or F3, the non-inverted output Q of which is one of the outputs I or II or III forms.
  • the first two dividers FT1 and FT2 are connected with their divider outputs to an input of a NAND gate N1 and N2, the output of which is connected to the reset input R of the relevant divider stage.
  • the third divider FT3, however, has no NAND gate.
  • the divider FT1 together with the flip-flop F1 and the NAND gate N1 forms a 1:30 divider stage.
  • the divider FT2, the NAND gate N2 and the flip-flop F2 together form a 1:24 divider stage and the divider FT3 forms a 1:20 divider stage with the flip-flop F3.
  • the flip-flops F1, F2, F3 provided in the circuit and the flip-flops to be mentioned are preferably designed as D-flip-flops, the inverting output ⁇ of which is fed back to the data input (D) of the flip-flop in question.
  • the other input of this AND gate U13 is through the inverting output Q of the flip-flop F10 to be mentioned.
  • the output of this AND gate U13 leads to the set inputs S of the flip-flops F4, F5, F6, F7 and to the reset inputs R of the flip-flops F8, F9, F10, F11 and F12.
  • the output of the AND gate U13 is also connected to an output of a fourth 1:16 frequency divider FT4 and a fifth 1:16 frequency divider FT5 and finally controls a NAND gate N5, which can be seen in FIG a second NAND gate N4 is cross-coupled to form an RS flip-flop N4, N5.
  • the free input of the other NAND gate N4 of the multivibrator N4, N5 is controlled via an inverter 13 by a second output of the fourth frequency divider FT4.
  • the signal outputs of the two cross-coupled NAND gates N4 and N5 forming the Q or Q output of the RS flip-flop N4, N5 are connected to the circuit points a and b already mentioned in connection with FIG. 3.
  • the output of the NAND gate N4 represents the Q output of the RS flip-flop and is connected to the base of the npn transistor 59 of the differential amplifier V via the node b.
  • the output of the NAND gate N5 forms another on the part of the non-inverting output, ie the Q output of the flip-flop and leads via the node a to the base of the npn transistor 5 and thus to the reset input of the flip-flop 4, in the switching part SCH.
  • the first audio signal output I of the frequency divider circuit is connected to the clock input t of the fourth frequency divider FT4, the output of which is connected to the clock input t of the fifth divider FT5.
  • the output of the fifth divider FT5 is connected via an inverter 14 to the clock input t of the fourth D flip-flop F4 of the circuit.
  • the D flip-flops F4 to F7 form a chain, the non-inverting output Q of the preceding stage being the clock input t of the following stage.
  • the set inputs S of these D flip-flops F4 to F7 are connected in parallel to one another and connected to the reset inputs R of the D flip-flop cells F8 to F12.
  • the Q output of the last flip-flop, with its set input S at the output of the AND gate U13, that is to say of the flip-flop F7, is connected to the t input of the D flip-flop F9 and to the input of a modulator Mo associated AND gate U4 connected.
  • the Q - output of the D flip-flop F7 is connected once to the clock input (ie the t input) of the D flip-flop F8 and to an input of an AND gate U12 belonging to the modulator Mo.
  • the Q output of the D flip-flop F8 controls one input each of four AND gates U9, U10, U11 and U12 of the modulator Mo.
  • the ⁇ output of the flip-flop F8 is at the clock input t of the flip-flop F10, whose Q output is connected to one input of AND gate U13 in the manner already described, while the non-inverting output of flip-flop F10 is no longer used.
  • the clock input t of the flip-flop F11 acted upon by its R input from the AND gate U13 is at the Q ⁇ - ⁇ output, that is to say at the inverting output of the flip-flop F6, which is also connected to an input of the AND gate U7 in Mo. .
  • the non-inverting Q output of said flip-flop F6, is used to control one input each of the AND gates U3 and U11 of the modulator.
  • the non-inverting output Q of the first link F4 of the flip-flop chain is connected to an input of the AND gates U1, U5 and U9 of the modulator.
  • the Q output of the following flip-flop F5 is connected to one input of the AND gates U2, U6 and U10 of the modulator, while the connection of the outputs of the third D flip-flop stage F6 of the chain to the AND gates of the modulator Mo - as well as that of F8 and F9 - has already been specified.
  • the Q output of the D flip-flop F7 is at an input of the AND gate U4
  • the Q output of the D flip-flop F11 clocked by the Q output F6 is at the clock input of the D flip -Flops F12 and also to an input of the AND gate U8 of the modulator Mo and the Q output of the D flip-flop F12 to an input of the AND gates U6, U7, U8 and U5 of the modulator.
  • modulator Mo in the example it consists of twelve AND gates U1 to U12, each having three inputs, one input in the manner already described and evident from FIG. 4 either by one of the D- Flip-flops F4 to F12 or by one of the sound signal outputs I, II or III of the frequency divider circuit is controlled.
  • the output of the AND gates U1 to U12 forming the modulator Mo is connected via a resistor Ri to Ri 2 to the switching point e, which, as already mentioned, is connected to the input of the differential amplifier V.
  • the switching point e thus forms the summation point, ie the mixer M.
  • the digital-to-analog converters DA1, DA2, DA3 are due to the group of resistors , , and or the group to respectively. to specified.
  • the resistances to are staggered and have, for example, the following values:
  • the three frequencies 660 Hz, 550 Hz and 440 Hz are derived from a parent oscillator 0, which oscillates at 13.2 kHz.
  • One of the three frequencies is divided further, thereby gaining the time base for the decay process.
  • a four-bit D / A converter per tone generates the decay voltage, with which the three tones are switched on one after the other and weakened overlapping again.
  • the basic frequency is determined by an external RC element.
  • the output voltage is rectangular.
  • the harmonic content can be reduced by connecting a capacitor to connection 7 * . With a A volume control is also possible here with the potentiometer.
  • the circuit only draws current when it is active and switches off automatically after the tone sequence has subsided. The start is made by briefly switching on a voltage at input 1 * . If the trigger voltage is still or again after the tone sequence, the tone sequence is repeated. The triggering of the tone sequence is prevented if a trigger voltage at input 1 * is present for a shorter time than the duration of the dead time.
  • the external connection of the circuit according to the invention described above and preferably monolithically combined in a silicon wafer takes place in the manner shown in FIG. 1.
  • the chip To containing the circuit is provided with the external connections (pins) 1 * - 7 * already defined above.
  • the supply voltage is supplied by a DC voltage source UB, the pole of which supplies the first operating potential “+” is connected to the connection 1 via the activation switch Dt and the pole that supplies the reference potential “-” is connected to the connection 4 * of the circuit To according to the invention.
  • the connection 3 * leads via a capacitor C5 to the loudspeaker L and the other connection of the latter also to the reference potential.
  • connection 2 * is connected via a capacitor C6 to the reference potential and also directly to the connection «+ of UB which supplies the operating potential.
  • the connection 6 * is connected to the reference potential via the series connection of the resistor R1 and the capacitor C1 and is also connected to the connection 5 * via the resistor R1 of the timer. To improve the sound quality, it is recommended to connect the 7 * connection to the reference potential via a capacitor C2.
  • the configuration of the circuit of the tone generator To shown in FIGS. 3, 4 and 5 leads to a temporal sequence of the tone sequence, as can be seen from the amplitude-time diagram according to FIG. 5: after the dead time Tz has elapsed, the first tone, the for example, has given a frequency of 660 Hz (corresponding to the divider ratios and frequency of the mother oscillator 0 given in the description of FIG. 4) on the loudspeaker. After 1.16 sec, i.e. already in the first phase of decay, the second tone, for example with a frequency of 550 Hz, is given to the loudspeaker L. After 2.33 seconds, the third tone comes with, for example, 440 Hz.
  • the first tone has subsided after 4.36 seconds, the second tone after 5.53 seconds and the third tone after 6.69 seconds. After 6.98 seconds, the tone sequence is given up again if the start signal St is still pending at inputs 1 * and 2 * . It is understandable that the specified frequencies and expiry times are determined by the dimensioning of the circuit. However, it is not difficult to work with other tone sequences and other tone frequencies.
  • the tone sequence decays 6.69 sec after the onset of tone 1 of the tone sequence. A repetition is possible after 6.98 sec after the first triggering of the tone sequence.
  • the ratio of the maximum amplitudes M3: M2: M1 1: 0.89: 0.67.
  • the time scale for the oscillator frequency 13.2 kHz.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Mechanical Engineering (AREA)
  • Amplifiers (AREA)
  • Electrophonic Musical Instruments (AREA)

Claims (15)

1. Générateur de son avec un circuit à semiconducteurs, qui sert à la commande d'un transducteur électro-acoustique, le circuit à semiconducteurs comportant un oscillateur RC, un diviseur de fréquence chargé par ce dernier, un circuit de démarrage qui sert à activer l'oscillateur et à stabiliser la tension de fonctionnement à appliquer à l'oscillateur, ainsi qu'un modulateur chargé par le diviseur de fréquence avec au moins deux trains d'impulsions, correspondant chacun à une audiofréquence différente, alors que finalement les signaux modulés en amplitude et qui sont fournis par le modulateur, en raison de ces trains d'impulsions, servant à charger un transducteur électro-acoustique commun, avec création d'une suite de sons qui est constituée par au moins deux tonalités différentes, caractérisé par le fait qu'il est prévu dans le circuit de démarrage un commutateur bistable (Sch) à activer par un signal de démarrage (St) et servant à activer un circuit de stabilisation de la tension (ST), que la tension fournie par le circuit de stabilisation de tension (ST) sert d'une part à activer l'oscillateur RC (O) et, d'autre part, à activer les autres éléments du circuit, qu'il est prévu, en outre, une commande séquentielle générale (AS) qui est commandée par la première sortie du diviseur de fréquence (TT) chargé par l'oscillateur RC (0), que les sorties (I, I1, III) du diviseur de fréquence qui fournissent respectivement un train d'impulsions qui correspond respectivement à une audiofréquence de la série de sons à produire, de même que certaines sorties de la commande séquentielle servent à charger respectivement une partie de circuit (G1, G2, G3) du modulateur (Mo), alors que la sortie de chacune de ces parties du circuit du modulateur (Mo) servent à charger respectivement un convertisseur numérique/analogique (DA1, DA2, DA3), et que finalement ces convertisseurs numérique/analogique commandent, en commun, le transducteur électro-acoustique (L), en particulier par l'intermédiaire d'un amplificateur basse tension.
2. Générateur de son selon la revendication 1, caractérisé par le fait que la commande séquentielle (AS) est réalisée de telle façon qu'après l'écoulement d'un temps mort, après la réponse du commutateur bistable (Sch), elle interroge l'état qui est présent à ses entrées et n'autorise la production d'une suite de sons que lors de la présence du signal de démarrage au niveau de l'entrée de commande du commutateur bistable (Sch).
3. Générateur de son selon la revendication 1 ou 2, caractérisé par le fait qu'à la fin de la série de sons est reliée une nouvelle interrogation, devenant efficace à la fin de la série de sons, pour déterminer la présence du signal de démarrage (St) au niveau de l'entrée de commande du commutateur bistable (Sch).
4. Générateur de son selon l'une des revendications 1 à 3, caractérisé par le fait que l'oscillateur RC (O) produit, après le branchement par le circuit de stabilisation de tension (St), une impulsion de remise à l'état initial qui remet la commande séquentielle (AS) dans l'état initial qui est nécessaire pour la production de la série de sons.
5. Générateur de son selon l'une des revendications 1 à 4, caractérisé par le fait que l'entrée de circuit (1*) qui est à charger par le signal de démarrage (St), est prévue pour la commande d'un multivibrateur bistable qui représente le commutateur bistable (Sch), son signal de sortie étant prévu pour charger le circuit de stabilisation de la tension (St).
6. Générateur de son selon la revendication 5, caractérisé par le fait que la borne (1*) du circuit de démarrage, et qui est à charger avec le signal de démarrage (St), est reliée à la base d'un premier transistor npn (4) dont l'émetteur est au potentiel de référence et dont le collecteur est relié, par l'intermédiaire d'un diviseur de tension (6, 7) à la sortie (2*) du circuit, qui est au potentiel d'alimentation (UB), que le point de division dudit diviseur de tension (6, 7) est relié à la base d'un transistor pnp (8) dont l'émetteur est relié au potentiel d'alimentation et dont le collecteur est relié d'une part, par l'intermédiaire d'une première résistance (9, 10), au potentiel de référence et, en outre, et par l'intermédiaire d'une seconde résistance (11), à la base d'un second transistor npn (15) dont l'émetteur fournit le potentiel de fonctionnement stabilisé, étant, pour ce faire, relié d'une part directement avec la base d'un troisième transistor npn (16) et, d'autre part, et par l'intermédiaire d'une résistance (14), à sa propre base, qu'en outre les collecteurs des second et troisième transistors npn (15, 16) sont reliés directement au potentiel d'alimentation (UB) et, par voie de conséquence, à l'émetteur dudit transistor pnp (8), qu'en outre la base du second transistor npn (15) est reliée, par l'intermédiaire d'une combinaison de diodes servant à la stabilisation de la tension, au potentiel de référence, et que finalement l'entrée de démarrage (1 *) du circuit, et qui est constituée par la base du premier transistor npn (4), est relée au potentiel de référence par l'intermédiaire d'une seconde combinaison de résistances et de diodes (1, 2, 3).
7. Générateur de son selon la revendication 6, caractérisé par le fait que l'émetteur et le collecteur du premier transistor npn (4) sont reliés directement à l'émetteur et au collecteur d'un troisième transistor npn (5), qu'en outre la base du quatrième transistor npn (5) est reliée, par l'intermédiaire d'une résistance (9) au collecteur du transistor npn et par l'intermédiaire d'une autre résistance (10) au potentiel de référence et, en outre à la sortie non inverseuse d'un multivibrateur bistable RS (N4, N5) qui, à son tour, est commandé par le diviseur de fréquence (TT).
8. Générateur de son selon les revendications 6 et 7, caractérisé par le fait que l'émetteur du troisième transistor npn (16) est couplé à la sortie (3*) d'un amplificateur, par l'intermédiaire du circuit collecteur-émetteur d'un transistor npn (49) qui est prévu dans ledit amplificateur (V).
9. Générateur de son selon les revendications 6 à 8, caractérisé par le fait que la sortie des signaux (c) de l'oscillateur RC (O) est prévue pour la commande du diviseur de fréquence (TT) qui fournit les oscillations qui sont nécessaires pour la série de sons, la sortie (I) du diviseur de tension (TT), qui fournit la fréquence la plus élevée, étant prévue pour l'alimentation de la cadence d'un autre étage de division (FT4, FT5 et FR-F10), qui constitue la commande séquentielle (AS) et qui servent avec les sorties d'audiofréquences (I, 11, III) du diviseur de fréquence proprement dit (TT) pour la commande du modulateur (Mo).
10. Générateur de son selon l'une des revendications 1 à 9, caractérisé par le fait que lesdites parties de circuit (G1, G2, G3) du modulateur (Mo) sont constituées par plusieurs portes logiques identiques et opérant indépendamment l'une de l'autre, portes qui sont attaquées de façon différente entre elles aussi bien par une sortie du diviseur de fréquence (TT) que par les sorties de la commande séquentielle (AS) et dont les sorties sont prévues pour la commande analogique commune de l'entrée (e) de l'amplificateur basse fréquence (V).
11. Générateur de son selon la revendication 10, caractérisé par le fait que les portes logiques qui constituent le modulateur sont formées par des circuits ET (U1-U12) dont chacun comporte trois entrées de signaux parmi lesquelles l'une est reliée à une sortie du diviseur de fréquence (TT) et les deux autres respectivement à une sortie de la commande séquentielle (AS).
12. Générateur de son selon la revendication 9 ou 10, caractérisé par le fait que pour obtenir une charge analogique de l'entrée (e) de l'amplificateur basse fréquence (V), cette entrée (e) est reliée par respectivement une résistance (Ri-R;2) aux sorties des portes logiques (U1-U12) prévues dans le modulateur (Mo), et que les valeurs de ces résistances sont accordées entre elles, pour tenir compte du branchement des portes logiques associées (U1-U12) de telle manière qu'une valeur analogique de signal parvienne à l'amplificateur basse fréquence (V), qui correspond au nombre de portes logiques (U1-U12) qui appartiennent à une sortie d'audiofréquence (I, II, III) du diviseur de fréquence (TT) et activées en même temps par la commande séquentielle (AS).
13. Générateur de son selon l'une des revendications 1 à 12, caractérisé par le fait que l'entrée de démarrage (1 *) du circuit (To) et l'entrée d'alimentation (2*) qui est au potentiel d'alimentation (UB) sont shuntées par un commutateur manuel (Dt), qu'en outre le transducteur électro-acoustique (L) est relié, d'une part et par l'intermédiaire d'un condensateur (C5), à la borne de sortie (3*) de l'amplificateur base fréquence (V) et, d'autre part et directement, à l'entrée (4*) à relier au potentiel de référence, et que le potentiel de service stabilisé est appliqué, par l'intermédiaire d'une borne (6*) du stabilisateur de tension (ST), à un circuit série qui détermine la fréquence de l'oscillateur (O) et qui est constitué par une résistance (R1) et par un condensateur (C1), le point de liaison entre le condensateur et la résistance étant relié à l'entrée de commande (5*) qui sert à la commande de la fréquence de l'oscillateur (O), alors que l'autre point du condensateur est au potentiel de référence.
14. Générateur de son selon la revendication 13, caractérisé par le fait que l'entrée de signaux (e) de l'amplificateur basse fréquence (V) est reliée, par l'intermédiaire d'un condensateur (C2), au potentiel de référence.
15. Générateur de son selon l'une des revendications 1 à 14, caractérisé par le fait que l'entrée des signaux (e) de l'amplificateur basse fréquence (V) est pourvue d'une entrée de commande supplémentaire (7*) qui est reliée au potentiel de référence, par l'intermédiaire d'un condensateur (C2).
EP81108368A 1980-11-18 1981-10-15 Générateur de son Expired EP0052236B1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE3043505 1980-11-18
DE19803050148 DE3050148A1 (de) 1980-11-18 1980-11-18 Tongenerator
DE19803043505 DE3043505A1 (de) 1980-11-18 1980-11-18 Tongenerator-halbleiterschaltung
DE3050148 1981-06-15

Publications (2)

Publication Number Publication Date
EP0052236A1 EP0052236A1 (fr) 1982-05-26
EP0052236B1 true EP0052236B1 (fr) 1985-05-02

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EP81108368A Expired EP0052236B1 (fr) 1980-11-18 1981-10-15 Générateur de son

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US (1) US4516113A (fr)
EP (1) EP0052236B1 (fr)
JP (1) JPS57114196A (fr)
DE (1) DE3170322D1 (fr)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5633625A (en) * 1995-03-20 1997-05-27 Saturn Electronics & Engineering, Inc. Electronic chime module and method

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2149489C3 (de) * 1971-10-04 1974-07-25 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Klangrufeinrichtung
JPS512798A (en) * 1974-06-28 1976-01-10 Hitachi Ltd Kayoseihoriimidono seizoho
JPS5184594A (en) * 1975-01-21 1976-07-23 Matsushita Electric Works Ltd Denshichaimu
US4073133A (en) * 1976-04-13 1978-02-14 General Time Corporation Electronic chime and strike system
JPS5393066A (en) * 1977-01-26 1978-08-15 Seiko Instr & Electronics Ltd Electronic watch with alarm
JPS5420714A (en) * 1977-07-15 1979-02-16 Matsushita Electric Works Ltd Audio circuit
JPS6019519B2 (ja) * 1977-08-10 1985-05-16 セイコーエプソン株式会社 電子発音装置
JPS5429996A (en) * 1977-08-10 1979-03-06 Seiko Epson Corp Electronic tone generator
JPS6042478B2 (ja) * 1978-03-06 1985-09-21 松下電工株式会社 チヤイム
DE2823097A1 (de) * 1978-05-26 1979-11-29 Bachmann Wolfgang Elektronisch akustischer signalgeber
DE2829404C2 (de) * 1978-07-05 1986-11-13 Becker Autoradiowerk Gmbh, 7516 Karlsbad Elektronische Schaltungsanordnung zur Erzeugung einer periodischen Signaltonfolge aus mindestens zwei Frequenzen
GB2032159B (en) * 1978-09-28 1982-11-24 Rca Gmbh Electronic tone generator
DE2850286C2 (de) * 1978-11-20 1986-01-16 Gebrüder Junghans GmbH, 7230 Schramberg Uhrzeitgesteuerte elektronische Melodie-Schlagwerksschaltung
JPS6344872Y2 (fr) * 1980-06-03 1988-11-21

Also Published As

Publication number Publication date
DE3170322D1 (en) 1985-06-05
EP0052236A1 (fr) 1982-05-26
JPS57114196A (en) 1982-07-15
US4516113A (en) 1985-05-07

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