EP0099655A2 - Einrichtung und Verfahren zur Steuerung einer Anzeige - Google Patents
Einrichtung und Verfahren zur Steuerung einer Anzeige Download PDFInfo
- Publication number
- EP0099655A2 EP0099655A2 EP83303617A EP83303617A EP0099655A2 EP 0099655 A2 EP0099655 A2 EP 0099655A2 EP 83303617 A EP83303617 A EP 83303617A EP 83303617 A EP83303617 A EP 83303617A EP 0099655 A2 EP0099655 A2 EP 0099655A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- display
- time limit
- picture
- crt
- displayed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
- G09G2330/022—Power management, e.g. power saving in absence of operation, e.g. no data being entered during a predetermined time
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/04—Display protection
Definitions
- This invention relates to a display control method and use in apparatus for/displaying a picture on the screen of a cathode-ray tube.
- the screen of a cathode-ray tube comprises a sheet of glass coated with a fluorescent film which, upon impact with an electron beam, emits light at the point of impact.
- a picture which is desired to be displayed on the CR T screen is broken down into a multiplicity of picture elements, the brightness of each picture element is decided and stored as picture information in a single-screen memory, and raster scanning is performed based on the picture information stored in the single-screen memory, thereby producing the desired picture on the CRT screen.
- the picture last displayed remains on the CRT screen unless it is erased by a manual operation.
- the information last called to the CRT screen continues to be displayed even if the operator does not perform any display-oriented operation using a keyboard, light pen or other device.
- a picture being displayed on a CRT screen remains unused for long periods of time, as when the operator is absent from his seat or is engaged in work which does not involve the displayed information.
- an apparatus for use in controlling a picture displayed on a CRT screen comprising discriminating means for discriminating whether a display-oriented operation has been performed within a set time limit, and display erasing means for erasing a picture displayed on the CRT screen when it is discriminated by the discriminating means that a display-oriented operation has not been performed within the set time limit.
- An embodiment of the invention may extend the life of a CRT by preventing ion burning of the fluorescent screen, by erasing a displayed picture automatically when the picture remains completely unused in excess of a predetermined period of time.
- an embodiment of the present invention may provide a display control apparatus and method capable of erasing a display automatically when no operation employing the displayed picture is performed fora predetermined period of time.
- a preferred embodiment of the invention involves discriminating whether an operation involving the displayed picture has been performed by an operator within a set time limit through use of an input unit, and erasing the picture displayed on the CRT screen when it is discriminated that the operation has not been performed within the set time limit, thereby preventing the picture from being displayed for a long period of time.
- Means are provided for setting the time limit, beyond which it is desired that a picture not be displayed, means for measuring the length of time a picture has been displayed, means for comparing the set time limit and the measured length of time for producing an output when the set time limit is exceeded, and means for erasing the picture from the CRT in response to the output from the comparison means.
- numeral 101 denotes a display controller composed of a computer having a processor, a program memory storing a control program for picture and other processing, and a data memory.
- the display controller 101 is connected to input units such as a keyboard 102 and light pen 103, and to a basic picture memory 104 for storing one or more basic pictures.
- the particular basic picture that is to be displayed is decided by operating the keyboard 102.
- Stored in the memory 104, together with each basic picture, is a flag which indicates whether or not the displayed picture is to be erased upon passage of a set period of time, as well as said set period of time, denoted by Ts.
- a character generator 105 which stores, in the form of n x m dots, Japanese kana, alphanumeric characters and various symbols.
- a vector generator 106 receives an input from the display controller 101 and delivers its output to a single-screen memory 107 in which a picture to be displayed on a CRT screen is stored in the form of picture elements. The output of the single-screen memory is applied to a CRT 108.
- a prescribed basic picture from the basic picture memory 104 is stored in the single screen memory 107, on the basis of which raster scanning is performed to display the basic picture on the CRT 108.
- Subsequent operation of the keyboard 102 or light pen 103 causes the display controller 101, which operates under the control of the stored control program, to execute prescribed processing such as numerical data creation processing and, based on the results of this processing, to generate either characters obtained from the character generator 105 or graphics made up of straight lines and arcs, these being produced by the vector generator 106.
- Characters and graphics are stored in the single-screen memory 107, and displayed on the CRT 108, superimposed on or independently of the basic picture. The foregoing processing enables prescribed pictures to be displayed on the CRT screen in successive fashion.
- a discriminating unit 109 which comprises a time limit setter 109a the input to which is the predetermined time period Ts from the display controller 101, a clock pulse generator 109b generating clock pulses CLP, a clocking circuit 109c for clocking the pulses CLP, a comparator 109d which receives outputs from the time limit setter 109a and clocking circuit 109c for checking whether the time period Ts set in the time limit setter 109a has expired without the execution of any input operation involving a displayed picture, the comparator producing a signal TOS indicative of the results of the check, a gate 109e which receives the signal TOS as an input thereto, a flip-flop 109f one of whose inputs is the output of the gate 109e and whose output is connected to the CRT 108, and an OR gate 109g whose two inputs are signals OPS, EPS, described below, the output of the OR gate 109g being connected to the clocking circuit 109
- the display controller 101 In response to operation of the keyboard 102, the display controller 101 reads in a basic picture from the basic picture memory 104 and discriminates whether the flag bit associated with the picture is logical "1" or logical "0". If the flag bit is a "1", then the control unit 101 inserts the period of time Ts into the time limit setter 109b and delivers an erase permission signal EPS to the clocking circuit 109c, via the OR gate 109g, and to the gate 109e to enable the gate.
- the clocking circuit 109c constituted by a counter, has its contents cleared by the signal EPS and then begins counting the clock pulses CLP arriving from the clock pulse generator 109b.
- the display controller 101 issues an operation signal OPS that is applied to the other input terminal of the flip-flop 109f, and which is delivered through the OR gate 109g to the clear terminal of the clocking circuit 109c, thereby clearing its contents.
- OPS operation signal
- the comparator 109d delivers the signal TOS, namely a "time over" signal.
- the signal TOS is directed through the gate 109e and applied to the flip-flip 109f, which responds by changing state.
- the output from the flip-flop 109f the cathode or first grid of the CRT 108 is biased to such an extent that the cathode can no longer generate an electron beam, causing the display to be erased from the screen of the CRT 108.
- An alternative arrangement is permissible wherein the contents of the single-screen memory 107 are cleared in response to generation of the signal TOS.
- the display controller 101 responds by producing the signal O P S, which resets the flip-flop 109f and the clocking circuit 109c.
- the flip-flop 109f is reset, the cathode or first grid of the C R T 108 is restored to the proper bias owing to the changed output of the flip-flop 109f, allowing the contents of the single-screen memory 107 to be displayed on the CRT screen.
- the clocking circuit 109c resumes counting the clock pulses CLP from zero to measure elapsed time.
- the keyboard 102 can be provided with a picture restoration key which, when pressed, resets the clocking circuit 109c and flip-flop 109f.
- F represents the flag bit.
- the character C in the flowchart represents the counter constituting the clocking circuit 109c for counting the clock pulses CLP.
- Ts represents the set time limit, namely a system parameter which is set by the operator.
- the flag bit F is found to be "1”
- the counter C is cleared and placed in the initial state, from which it resumes counting the clock pulses CLP.
- the picture is erased from the CRT screen. If the operator then causes a picture to be re-displayed, processing will return to the step for clearing the counter to the initial state (zero), which will be followed by repetition of the steps just described.
- a display is erased from the CRT 108 when the operator does not perform a display-oriented operation within the set time limit. Accordingly, a picture is displayed on the CRT screen for a comparatively short time, preventing ion burning and, hence, prolonging the life of the CRT. A picture, once erased, can be recalled to the CRT screen merely by operating the keyboard.
Landscapes
- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Digital Computer Display Output (AREA)
- Testing And Monitoring For Control Systems (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP108868/82 | 1982-06-24 | ||
| JP57108868A JPS58224381A (ja) | 1982-06-24 | 1982-06-24 | 表示制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP0099655A2 true EP0099655A2 (de) | 1984-02-01 |
| EP0099655A3 EP0099655A3 (de) | 1985-10-09 |
Family
ID=14495618
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP83303617A Withdrawn EP0099655A3 (de) | 1982-06-24 | 1983-06-23 | Einrichtung und Verfahren zur Steuerung einer Anzeige |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0099655A3 (de) |
| JP (1) | JPS58224381A (de) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0247380A3 (de) * | 1986-04-30 | 1990-09-12 | Kabushiki Kaisha Toshiba | Datenanzeige-Steuergerät für eine Datenverarbeitungseinrichtung |
| EP0590837A3 (en) * | 1992-09-29 | 1994-06-22 | Nanao Corp | Crt display unit and power supply control method therefor |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01169486A (ja) * | 1987-12-25 | 1989-07-04 | Canon Inc | 表示制御方式 |
| JPH0588656A (ja) * | 1991-09-30 | 1993-04-09 | Sharp Corp | 表示装置 |
| JP2949980B2 (ja) * | 1991-12-04 | 1999-09-20 | 富士通株式会社 | 電源制御装置及び情報処理装置 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3963961A (en) * | 1974-12-23 | 1976-06-15 | United Technologies Corporation | Cathode ray tube phosphor protection circuit |
| NL7810170A (nl) * | 1977-10-11 | 1979-04-17 | Philips Nv | Videoschakeling met beveiliging tegen inbranden. |
| US4297619A (en) * | 1981-01-02 | 1981-10-27 | Zenith Radio Corporation | Phosphor protection circuit for multiple CRT projection television |
-
1982
- 1982-06-24 JP JP57108868A patent/JPS58224381A/ja active Pending
-
1983
- 1983-06-23 EP EP83303617A patent/EP0099655A3/de not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0247380A3 (de) * | 1986-04-30 | 1990-09-12 | Kabushiki Kaisha Toshiba | Datenanzeige-Steuergerät für eine Datenverarbeitungseinrichtung |
| EP0590837A3 (en) * | 1992-09-29 | 1994-06-22 | Nanao Corp | Crt display unit and power supply control method therefor |
| EP0880278A1 (de) * | 1992-09-29 | 1998-11-25 | Nanao Corporation | Kathodenstrahlröhrenanzeigegerät und Verfahren zur Steuerung seiner Stromversorgung |
| US6504534B1 (en) | 1992-09-29 | 2003-01-07 | Nanao Corporation | CRT display unit and power supply control method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0099655A3 (de) | 1985-10-09 |
| JPS58224381A (ja) | 1983-12-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| AK | Designated contracting states |
Designated state(s): DE FR GB |
|
| PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
| AK | Designated contracting states |
Designated state(s): DE FR GB |
|
| 17P | Request for examination filed |
Effective date: 19860224 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 19870102 |
|
| RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: ONISHI, YASUSHI Inventor name: KISHI, HAJIMU Inventor name: TANAKA, KUNIO |