Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
  • G11C27/02—Sample-and-hold arrangements
  • G11C27/024—Sample-and-hold arrangements using a capacitive memory element
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/12—Analogue/digital converters
  • H03M1/22—Analogue/digital converters pattern-reading type
  • H03M1/32—Analogue/digital converters pattern-reading type using cathode-ray tubes or analoguous two-dimensional deflection systems

Definitions

• This invention relates generally to the arts of high speed analog signal sampling and analog-to-digital converting of such samples particularly wherein a cathode-ray-tube (CRT) is employed.
• CRT cathode-ray-tube
• CTR cathode-ray-tube
• CCD charge-coupled-device
• a CCD stores pockets of charge within a semiconductor, each pocket of charge being proportional to the analog signal at a correspond- ing sample time. After the required number of samples have been stored, they are clocked out at a slow rate, digitized by a low speed ADC, and stored in a low speed memory.
• ADC and memory are inexpensive, a significant amount of power is required for driving a CCD at a sample rate comparable to high speed flash con ⁇ verters. Further, " non-linearity of the CCD's is a sig ⁇ nificant problem.
• an electron beam within a CRT is intensity modulated by the continuous- analog signal to be sampled.
• the electron beam is de ⁇ flected repeatedly over the same pattern across a target surface, most conveniently a circular pattern.
• the output is a continuous number of suc ⁇ cessive samples of the continuous analog signal. These samples can be held and subsequently digitized by low speed, accurate and inexpensive available ADCs.
• Fig. 1 illustrates a continuous analog waveform that is to be sampled by the techniques of the present invention
• Fig. 2 shows a preferred form of a CRT sampling device according to the present invention
• Fig. 3 is a diagram of an electronic circuit for use with the sampling device of Fig. 2;
• Fig. 4 illustrates in block diagram form a com ⁇ plete system utilizing the samples obtained by the system of Figs. 2 and 3.
• a continuous analog waveform 11 is shown as an example of the type of voltage waveform that is desired to be sampled in a wide variety of electronic instruments and systems.
• the wave ⁇ form 11 is shown to be sinusoidal, but the techniques herein work equally well for other analog waveform shapes. It is desired to obtain a voltage at various sample times 13, 15, 17, 19, and so on, at a fixed time interval of X. These analog voltage samples are then either used directly by the instrument or system, but most frequently are digitized, the sampling process being done prior to holding for digitization.
• a typically shaped CRT vacuum envelope 21 contains a standard electron gun 23 at its narrow end and provides at its other end a somewhat larger target surface 25 which supports targets impinged upon by an electron beam 27 from the gun 23.
• a high voltage power supply 38 provides an accelerating voltage in the order of 10,000 volts, and its positive output line 40 is grounded, as is the anode 42 of the CRT.
• a pair of plates 29 deflects the beam 27 in a vertical di ⁇ rection, and a pair of plates 31 deflects the beam in a horizontal direction, a standard arrangement.
• a standard magnetic deflection system would serve the same purpose.
• the beam 27 is driven at a constant speed over a circular pattern across the target surface 25.
• This deflection is accomplished by generating in de ⁇ flection circuitry 33 a sine wave in a conductor 35 and a cosine wave in a conductor 37 for the horizontal and ver ⁇ tical deflection plates, respectively.
• the analog signal to be sampled is applied through an amplifier 39 to a grid 41 in the path of the electron beam 27 which varies its intensity as a function of time in response to the varying voltage at the grid 41 from the input analog sig ⁇ nal.
• targets 43 and 45 On the target surface 25 is positioned a number of individual electrically conductive targets, such as adjacent targets 43 and 45. These targets preferably each have the same dimensions and are positioned equal distance from each other completely around a circular path that is coincident with the * path scanned by the beam 27.
• the targets are electrically insulated from one another and communicate by one or more wires through the envelope 21 to external processing circuitry.
• the loads attached to these external conductors of each of the tar ⁇ gets 43, 45, etc., are capacitive only, so the voltages are proportional to the value of the analog signal 11 at the instant that the electron beam 27 swept across the target. If the electron beam 27 travels at a uniform speed and the targets 43, 45, et al. are equally spaced in a closed path, the samples are periodically and con ⁇ tinuously taken.
• the pattern of the conductive targets 43, 45, etc., and the corresponding scanned pattern of the elec ⁇ tron beam 27 need not necessarily be circular, but such a pattern is the most convenient. So long as the conductive targets 43, 45, etc., are positioned in a continuous pat ⁇ tern and the electron beam 27 scanned over them in that same pattern, the input analog waveform will be contin ⁇ uously sampled. Such samples are assuredly made to be periodic so long as a speed of electron beam scan and spacing of the targets is coordinated, most conveniently a uniform speed scan and equal distance spaciag of the targets.
• Each of the targets 43, 45, etc. can simply be a metal conductor upon which a charge is deposited by the electron beam 27 in an amount proportional to the inten ⁇ sity of the beam when striking the target and inversely proportional to its velocity across the target.
• the vol ⁇ tage developed by each target conductor is generally pro ⁇ portional to the amount of charge deposited and inversely proportional to its capacitive load.
• targets 43, 45, etc. of a type which amplify the charge received from the electron beam 27.
• Such a device is an electron bombarded semiconductor (EBS) -6-
• diode which is known and commercially available in var ⁇ ious forms. Such a diode is characterized principally by generating in the order of 2,000 electrons for each inci ⁇ dent electron from the CRT beam when the accelerating voltage is in the range of 10,000 volts. When appropri ⁇ ately reversed biased, the larger number of electrons will be swept out of the diode into external circuitry.
• exter ⁇ nal circuitry for use with target electrodes 43, 45, etc., when in the form of EBS diodes.
• Each of the diodes 43, 45, etc. is connected to an individual sample-and-hold circuit 47, 49, etc., respectively.
• Each of the diode targets 43, 45, etc. have one terminal con ⁇ nected to a common positive voltage supply conductor 51, the second terminal of each diode going to its indepen ⁇ dent sample-and-hold circuit.
• the sample-and-hold cir ⁇ cuit 49 will be described as an example.
• the second ter ⁇ minal of diode 45 is connected to ground potential through a storage capacitor * 53 which stores the charge generated in the diode target 45 by the CRT electron beam 27.
• a voltage across the capacitor 53 is thus propor ⁇ tional to the value of the input analog signal 11 at the sample instant when the electron beam 27 scanned across the diode 45.
• the capacitor 53 is controllably dis ⁇ charged by an FET switch 55 which shorts across the capa ⁇ citor 53 in response to an input pulse in a circuit 57. Operation of the FET switch 55 clears the sample-and-hold circuit 49 and prepares it for receiving another charge the next time the electron beam 27 scans across the diode target 45.
• a buffer FET amplifier 59 is also connected to the capacitor 53 in a source follower circuit that produces in a conductor 61 a low impedance output with -7-
• the voltage between the conductor 61 and ground is proportional to a sample of the input analog waveform 11.
• the output conductor 61, and the outputs of each of the other sample-and-hold cir ⁇ cuits, are applied to a multiplex and hold circuit 63 and thence as analog .voltage signal inputs to an analog-to- digital converter 65.
• An output of the ADC 65 is in the form of digital words which give the magnitude of each of the samples of the analog waveform 11, these words being stored in a digital memory 67.
• Control circuits 69 coor ⁇ dinate the cooperative operation of these Fig. 4 ele ⁇ ments, as well as ' providing the clearing pulse for the sample-and-hold circuit 49 in the line 57 and the synch ⁇ ronization signal in line 34 for the deflection circuitry 33.
• the digitized sample values held in the memory 67 can be used in any one of a number of applications.
• a common one is in a display device wherein the samples are selectively read out of the ffte ory 67 into a digital-to- analog converter 69 and the analog signals then displayed by a visual display device 71.
• a display device 71 is most usually a CRT display but can also be of other types, such as an X-Y recorder.
• a certain number such as 1,000, of consecutive samples of the analog waveform.
• the num ⁇ ber of targets 43, 45, etc. (Fig. 2), can be made equal to the number of samples desired at one time, each target then having its individual sample and hold circuit, such as the circuit 49 (Fig. 3) previously described.
• the various outputs of the sample-and-hold circuits are then
• OMPI applied by the multiplexing circuit 63 (Fig. 4) one at a time to a single ADC 65, thus digitizing each sample in time sequence after the full set has been acquired; how ⁇ ever, for large numbers of samples, providing a separate target 43, 45, etc., for each sample makes the CRT sam ⁇ pling device physically large and expensive.
• each sample and hold circuit such as the circuit 49
• a similar analog voltage storage device within a circuit 63 (Fig. 4) as soon as possible after the electron beam has impinged upon its target.
• a particular sample-and-hold circuit such as the circuit 49
• its storage capacitor is discharged by receipt of a clear pulse to ready the cir ⁇ cuit to receive a new voltage. This transfer and clear must occur before the electron beam circulates back around to the given target again.
• the desired num ⁇ ber of samples are accumulated in the circuit 63, they can then be digitized by serial application to the ADC 65.
• multiple ADC's can be used for parallel processing in order to speed up the process, but in any event, the type of ADC 65 that is utilized will be a high quality one. This is possible since speed of digitizing a signal is not critical in this system.
• a plurality of sample and hold cir ⁇ cuits such as the circuit 49 previously described, could be provided for each of the target conductors with some type of switching mechanism to successively connect the target to a different sample and hold circuit each time the beam impinges upon the target.
• the number of targets 43, 45, etc. must be sufficient that the voltage generated upon each impingement of the electron beam with it can be acquired and stored in less than one revolution of the electron beam.
• Exactly 199 such targets are advanta ⁇ geously utilized, in a specific example utilizing the various aspects of the present invention. This is enough for a sampling rate of up to 2 GHz. With a minimum of . two samples per cycle of the analog signal, the maximum bandwidth possible of the signal is 1 GHz.
• an odd number 199 of target has a fur ⁇ ther particular advantage that a lesser- sampling rate than the maximum designed rate can selectively be used without changing any of -the geometry, electron beam rota ⁇ tion speed, etc.
• every second diode is used during the first elec ⁇ tron beam sweep.
• the remaining alternate diodes are sub ⁇ sequently used in the second circular sweep of the elec ⁇ tron beam.
• a signal from every fourth target around the target array is uti ⁇ lized, in each of these cases, a number of samples of the analog signal that are acquired are continuous.
• Each revolution of the electron beam automatically causes every second, fourth, or whatever desired factor, diode to give a desired sample because of the particular number of diodes utilized. This number will usually be odd, and something other than 199 can certainly be utilized, de ⁇ pending upon the particular sampling reduction factors desired and the speed of rotation of the electron beam. It is standard to provide an ability to select a reduc ⁇ tion of the maximum sampling rate by the factors of 2, 4, 10, 20, 40, 100, and so on.
• a specific example of the configuration of diode targets 43, 45, etc., is for them to be 15 mils, wide with a separation between them of 5 mils, around the circle.
• the cross-sectional size of the electron beam 27 is made to be as small as possible, generally within the range of 5-10 mils, in diameter.
• the voltage output of the target diodes, because of their width, will integrate that portion of the analog signal 11 (Fig. 1) that occurs while the beam is crossing the finite width of each tar ⁇ get 43, 45, etc.

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• Analogue/Digital Conversion (AREA)
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• 1983
  • 1983-01-17 JP JP58500853A patent/JPS59500079A/ja active Pending
  • 1983-01-17 EP EP19830900761 patent/EP0101487A4/en not_active Withdrawn
  • 1983-01-17 WO PCT/US1983/000075 patent/WO1983002697A1/en not_active Ceased

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