EP0192437A2 - Verfahren und Vorrichtung für binär-dezimale Umsetzung - Google Patents

Verfahren und Vorrichtung für binär-dezimale Umsetzung Download PDF

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Publication number
EP0192437A2
EP0192437A2 EP86301037A EP86301037A EP0192437A2 EP 0192437 A2 EP0192437 A2 EP 0192437A2 EP 86301037 A EP86301037 A EP 86301037A EP 86301037 A EP86301037 A EP 86301037A EP 0192437 A2 EP0192437 A2 EP 0192437A2
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EP
European Patent Office
Prior art keywords
binary
decimal
value
bit
code
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Granted
Application number
EP86301037A
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English (en)
French (fr)
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EP0192437A3 (en
EP0192437B1 (de
Inventor
Shingo Co Patents Division Yamauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
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Sony Corp
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Application filed by Sony Corp filed Critical Sony Corp
Priority to AT86301037T priority Critical patent/ATE78124T1/de
Publication of EP0192437A2 publication Critical patent/EP0192437A2/de
Publication of EP0192437A3 publication Critical patent/EP0192437A3/en
Application granted granted Critical
Publication of EP0192437B1 publication Critical patent/EP0192437B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
    • H03M7/06—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word the radix thereof being a positive integer different from two
    • H03M7/08—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word the radix thereof being a positive integer different from two the radix being ten, i.e. pure decimal code

Definitions

  • This invention relates to methods and apparatus for binary-to-decimal conversion and vice versa, and in particular, to conversion between 8-bit hexadecimal and decimal notations.
  • the invention is particularly, but not exclusively, applicable to binary-to-decimal conversion of data transmission codes representative of alphanumerical characters and the like into decimal digit sequences.
  • Binary codes most often hexadecimal codes, are commonly used to represent alphanumeric characters and the like. In order to duplicate these hexadecimal codes in bar code using the two-out-of-five decimal notation system, the hexadecimal codes must first be converted to decimal notation.
  • the JIS and ASCII 8-bit codes provide 256 combinations, each representing a specific character or command. But, among these combinations, the ranges (00)H to (1F)H and (80)H to (9F)H are used as control codes for controlling the operation of printers and other external devices. Therefore, these cannot be used to represent alphanumeric characters or the like.
  • a binary code processor for processing binary codes which represent at least first and second types of information in different ranges of value, the processor comprising:
  • a method of converting a string of decimal digits, produced by this binary-to-decimal conversion method back into binary JIS or ASCII format comprises; converting the attribute digit into three attribute bits, each corresponding to one pair of decimal digits, converting pairs of decimal digits into binary values, adding (20)H to the binary values, and adding (80)H to each binary value of which the corresponding attribute bit indicates that the original 8-bit value was greater than (80)H.
  • embodiments of the present invention provide methods and apparatus for performing binary-to-decimal conversion which ignores the aforementioned control codes and thus performs conversion more efficiently. Furthermore, they provide methods and apparatus for binary-to-decimal conversion in which a major attribute of each 8-bit value is encoded in a decimal digit which also represents the attributes of two other 8-bit values. This helps make the binary-to-decimal conversion even more efficient.
  • a method of performing binary-to-decimal conversion distinguishes between two major sub-divisions of the information represented by the binary values and signifies the type of information for each value by a so-called attribute bit.
  • the attribute bits for several binary values can be encoded into a single decimal digit, while each binary value is itself converted to a reduced number of decimal digits.
  • the binary code to be binary-to-decimal converted is compressed during conversion for more efficient transmission.
  • An embodiment of binary-to-decimal conversion apparatus breaks each binary value down into an encoded value representing either of two specific pieces of information and an attribute bit specifying which piece of information is represented.
  • the conversion apparatus then converts the encoded values for three binary values into decimal digits, and the three corresponding attribute bits into a single decimal digit for application in a two-out-of-five notation bar-code system. Since fewer decimal digits are needed to represent a given number of binary values, the number of the decimal digits in the bar code can be reduced.
  • the binary code is a hexadecimal code.
  • the identification code generating means includes a comparator for comparing the hexadecimal code with a predetermined value. The comparator produces a single binary bit.
  • the compressing means includes a subtractor for subtracting a predetermined value from the hexadecimal code.
  • a method of converting a plurality of 8-bit JIS or ASCII values into a corresponding sequence of decimal digits comprising generating for each 8-bit value an attribute bit indicating whether the value is greater than a first given value, truncating the most-significant bit of every 8-bit value, subtracting a second given value from each resulting 7-bit value, converting the resulting value for each original 8-bit value into a pair of decimal digits, concatenating the attribute bits for no more than three 8-bit values into a 3-bit attribute value, converting the 3-bit attribute value into a decimal attribute digit, and concatenating the attribute digit and the decimal digits for the three corresponding 8-bit values.
  • the conversion system includes a buffer memory 1 which stores a plurality of binary codes to be converted to decimal.
  • the buffer memory 1 avoids binary codes serving as control codes, since such control codes need not be converted.
  • the stored binary codes are read out one-by-one under the control of a control unit 8 and fed to a subtractor 2 and a discriminator 3.
  • the subtractor 2 subtracts (20)H from the value of the read binary code.
  • the output of the subtractor is transmitted to a second subtractor 4.
  • the discriminator 3 distinguishes between binary codes that represent alphanumerical characters and those that represent Japanese katakana characters. For this purpose, the discriminator 3 compares the value of the input binary code with (80)H. If the input binary code is representative of a Japanese katakana character, and thus its value is equal to or greater than (80)H, the output value of the discriminator 3 goes to "1". On the other hand, if the binary code is representative of an alphanumeric character, and thus the value of the binary code is less than (80)H, the output value of the discriminator 3 goes to "0". The output of the discriminator 3 is supplied to the subtractor 4 and to a buffer memory 5.
  • the subtractor 4 is responsive to a discriminator output of "1" to subtract (80)H from the data value of the input from the subtractor 2. Otherwise, the subtractor 4 has no effect on the input data from the subtractor 2. As a result of this operation, corresponding Japanese katakana characters and alphanumeric characters are represented by the same binary code.
  • the buffer memory 5 is controlled by the control unit 8 and accumulates discriminator outputs by shifting data in the order received.
  • the data stored in the buffer memory 5 serves as attributes of the binary codes to be converted indicative of the kind of character, that is Japanese katakana or alphanumeric, represented by the corresponding binary codes.
  • the accumulated data in the buffer memory 5 are transferred to a binary-to-decimal converter 6.
  • the data from the buffer memory 5 is converted to binary coded decimal (BCD) code by the binary-to-decimal converter 6 and stored in a buffer memory 7 in the order received as attribute codes.
  • the outputs of the subtractor 4 are fed to the binary-to-decimal converter 6 and converted into BCD code.
  • the BCD codes derived from the outputs of the subtractor 4 are also accumulated in the buffer memory 7 with the attribute codes in a specified order under the control of the control unit 8.
  • This embodiment can be composed of digital circuit elements. It would also be possible to perform this binary-to-decimal conversion by means of a microprocessor programmed to perform the various functions set forth above.
  • Figure 2A illustrates the process of binary-to-decimal conversion of (4D)H representing the letter "M".
  • the binary code of (4D)H is read from the buffer memory 1 and sent to the subtractor 2 and the discriminator 3.
  • the value (20)H is subtracted from the value (4D)H. Therefore, the output of the subtractor 2 becomes (2D)H.
  • the data value (4D)H is smaller than (80)H. Therefore, the output value of the discriminator 3 is "0".
  • the subtractor 4 thus does not perform its subtracting operation, but rather transmits the value (2D)H to the binary-to-decimal converter 6 directly.
  • the binary-to-decimal converter 6 converts the binary code (2D)H from the subtractor 4 into the BCD code (45).
  • the BCD code (45) derived by the binary-to-decimal converter 6 is stored in the buffer memory 7, leaving open a 4-bit slot which will be explained later.
  • the output "0" of the discriminator 3 is fed to the buffer memory 5 and stored therein.
  • Figure 2B shows the conversion process for the binary code of (CD)H which is representative of the Japanese katakana character " ⁇ ".
  • the value (CD)H is read from the buffer memory 1 and fed to the subtractor 2 and the discriminator 3.
  • the subtractor 2 substracts the value (20)H from the value (CD)H. In this case, the result of the subtraction will be (AD)H.
  • the discriminator 3 compares the value (CD)H with the value (80)H.
  • the data value (CD)H is greater than (80)H. Therefore, the output of the discriminator 3 will be "1".
  • This discriminator output "1" triggers the subtractor 4 to subtract (80)H from the output (AD)H of the subtractor 2.
  • the subtractor 4 supplies the value (2D)H to the binary-to-decimal converter 6.
  • the binary-to-decimal converter 6 then performs binary-to-decimal conversion to derive the corresponding BCD code. In case of the data value (2D)H, the derived BCD code will be (45).
  • the output "1" of the discriminator 3 is also stored in the buffer memory 5.
  • Figure 2C illustrates the process of binary-to-decimal conversion of the binary code (B6)H which is representative of the Japanese katakana character t 1 ".
  • the value (20)H is subtracted from the value (B6)H, resulting in the value (96)H.
  • the value (B6)H is greater than the value (80)H, and thus the discriminator output will be "1".
  • the subtractor 4 responds to the "1" discriminator output by subtracting (80)H from the output (96)H of the subtractor 2 and supplying the resulting value (16)H to the binary-to-decimal converter 6.
  • the binary-to-decimal converter 6 converts the binary code value 16(H) into BCD code value (22).
  • the resultant BCD code (22) is sent to the buffer memory 7 and stored therein.
  • the discriminator output "1" is fed to the buffer memory 5 and accumulated therein. Since, at this time, the binary codes for three characters have all been converted into BCD code, the control unit 6 supplies a command for copying the accumulated value in the buffer memory 5 to the binary-to-decimal converter 6. In this case, the accumulated value is (011), which when converted to BCD code has the value (3). Therefore, this converted BCD code (3) is fed to the buffer memory 7 and stored in the slot previously allocated therefor.
  • Each of the decimal digits thus converted from binary will be further converted into a special 5-bit code and then into the two-out-of-five system bar code, when the embodiment of the code conversion apparatus is applied to a bar-code encoding system.
  • Figure 3 shows an embodiment of decimal-to-binary conversion apparatus which may be used to convert the decimal digit sequence produced by the binary-to-decimal conversion system of Figure 1 back into binary notation.
  • the decimal-to-binary conversion system includes a buffer memory 11 for storing a decimal digit sequence, wherein out of every seven digits the first holds attribute information.
  • the buffer memory 11 stores the decimal digit sequence decoded from the bar codes.
  • the buffer memory 11 is connected to a decimal-to-binary converter 12 and a decimal-to-hexadecimal converter 14.
  • the decimal-to-binary converter 12 receives the decimal attribute digit from the buffer memory 11 and converts the decimal attribute digit into binary code.
  • the binary attribute code derived by the decimal-to-binary converter 12 is saved in a buffer memory 13.
  • decimal-to-hexadecimal converter 14 The remaining decimal digits of each group of seven digits are fed to the decimal-to-hexadecimal converter 14 in two-digit groups.
  • the adder 15 receives the corresponding attribute bit from the buffer memory 13 and adds (80)H whenever the corresponding attribute bit is "1" and otherwise does not perform the addition.
  • the output of the adder 15 is fed to another adder 16.
  • the adder 16 adds the value (20)H to the value from the adder 15.
  • the output of the adder 16 is written into a buffer memory 17 at a timing controlled by a control unit 18.
  • the embodiment of the decimal-to-binary conversion system can be implemented with a combination of the digital circuit elements.
  • the conversion system can also be implemented by a microprocessor so programmed as to perform the process set forth above.
  • Figure 4A first the attribute data (3) and the first two digits (45) of the decimal digit sequence are converted.
  • the attribute data (3) is read out from the buffer memory 11 and transmitted to the decimal-to-binary converter 12.
  • the decimal-to-binary converter 12 converts the decimal value (3) into the 3-bit binary value (011).
  • the converted binary value (011) is fed to the buffer memory 13 to be stored therein.
  • the next two decimal digits (45) are read from the buffer memory 11 and sent to the decimal-to-hexadecimal converter 14.
  • the decimal-to-hexadecimal converter 14 generates an 8-bit code (2D)H corresponding to the decimal value (45).
  • the output of the decimal-to-hexadecimal converter 14 is sent to the adder 15.
  • the control unit 18 orders the first attribute bit to be supplied by the buffer memory 13.
  • the adder 15 since the first bit of the buffer memory is "0", which means that the character identified by the 8-bit code (2D)H is a letter, the adder 15 does nothing and simply passes the output of the decimal-to-hexadecimal converter 14 to the adder 16.
  • the adder 16 adds (20)H to the output (2D)H of the decimal-to-hexadecimal converter 14 and thus supplies the 8-bit code (4D)H which identifies the letter "M".
  • the converted 8-bit code (4D)H is stored in the buffer memory 17.
  • the decimal number sequence (45) is read out from the buffer memory 11 and fed to the decimal-to-hexadecimal converter 14.
  • the decimal-to-hexadecimal converter generates the 8-bit code (2D)H corresponding to the decimal value (45).
  • the output of the decimal-to-hexadecimal converter 14 is sent to the adder 15.
  • the second attribute bit is "1", which means that the character identified by the 8-bit code (2D)H is a katakana character, so the adder 15 adds (80)H to the output value (2D)H from the decimal-to-hexadecimal converter and sends the result (AD)H to the adder 16.
  • the adder 16 adds (20)H to the output (AD)H of the decimal-to-hexadecimal converter 14 and thus supplies the 8-bit code (CD)H which identifies the Japanese katakana character " ⁇ ".
  • the converted 8-bit code (CD)H is stored in the buffer memory 17.
  • the decimal digits (22) are read from the buffer memory 11 and sent to the decimal-to-hexadecimal converter 14.
  • the decimal-to-hexadecimal converter generates the 8-bit code (16)H corresponding to the decimal value (22).
  • the output of the decimal-to-hexadecimal converter 14 is fed to the adder 15.
  • the adder 15 adds (80)H to the output value (16)H from the decimal-to-hexadecimal converter and sends the result (96)H to the adder 16.
  • the adder 16 adds (20)H to the output (96)H of the decimal-to-hexadecimal converter 14 and thus supplies the 8-bit code (B6)H which identifies the Japanese katakana character "h ".
  • the converted 8-bit code (B6)H is stored in the buffer memory 17.
  • the JIS 8-bit codes (4D)H, (CD)H and (B6)H respectively identifying the letter "M” and the Japanese katakana characters " " and " " are stored in the buffer memory 17.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Document Processing Apparatus (AREA)
  • Calculators And Similar Devices (AREA)
  • Steroid Compounds (AREA)
  • Liquid Crystal Substances (AREA)
EP86301037A 1985-02-16 1986-02-14 Verfahren und Vorrichtung für binär-dezimale Umsetzung Expired - Lifetime EP0192437B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT86301037T ATE78124T1 (de) 1985-02-16 1986-02-14 Verfahren und vorrichtung fuer binaer-dezimale umsetzung.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60029885A JPH0644714B2 (ja) 1985-02-16 1985-02-16 コ−ド変換装置
JP29885/85 1985-02-16

Publications (3)

Publication Number Publication Date
EP0192437A2 true EP0192437A2 (de) 1986-08-27
EP0192437A3 EP0192437A3 (en) 1990-03-14
EP0192437B1 EP0192437B1 (de) 1992-07-08

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ID=12288426

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EP86301037A Expired - Lifetime EP0192437B1 (de) 1985-02-16 1986-02-14 Verfahren und Vorrichtung für binär-dezimale Umsetzung

Country Status (8)

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US (1) US4719450A (de)
EP (1) EP0192437B1 (de)
JP (1) JPH0644714B2 (de)
KR (1) KR940003198B1 (de)
AT (1) ATE78124T1 (de)
AU (1) AU593235B2 (de)
CA (1) CA1331810C (de)
DE (1) DE3685888T2 (de)

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US5038309A (en) * 1989-09-15 1991-08-06 Sun Microsystems, Inc. Number conversion apparatus
CN1034383C (zh) * 1994-07-22 1997-03-26 中国航空工业总公司第014中心 多位十进制-bcd码快速转换电路
US5745796A (en) * 1995-04-07 1998-04-28 Adventures In Ancestry, Inc. Method for compacting and storing date information by converting alphanumeric data into base eleven numbers which consists of numbers and characters representative of unknown digits
US5796641A (en) * 1996-05-20 1998-08-18 International Business Machines Corporation System and table-based method for converting binary floating-point numbers to a decimal representation
GB0102154D0 (en) * 2001-01-27 2001-03-14 Ibm Decimal to binary coder/decoder
US7660838B2 (en) * 2005-02-09 2010-02-09 International Business Machines Corporation System and method for performing decimal to binary conversion
US20060179090A1 (en) * 2005-02-09 2006-08-10 International Business Machines Corporation System and method for converting binary to decimal
CN100377173C (zh) * 2006-03-17 2008-03-26 北京紫光捷通科技有限公司 一种基于十六进制编码的构建二维码的方法
CN101996298A (zh) * 2009-08-14 2011-03-30 鸿富锦精密工业（深圳）有限公司 加密方法及与加密方法相对应的解密方法
WO2013095578A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Systems, apparatuses, and methods for mapping a source operand to a different range
US9710227B2 (en) 2012-09-15 2017-07-18 John W. Ogilvie Formatting floating point numbers
US9143159B2 (en) 2012-10-04 2015-09-22 Silminds, Inc. DPD/BCD to BID converters
US9134958B2 (en) 2012-10-22 2015-09-15 Silminds, Inc. Bid to BCD/DPD converters
EP3538377A4 (de) 2016-11-09 2019-12-11 IDEMIA Identity & Security USA LLC Einbettung von sicherheitsinformationen in ein bild
EP3563300A4 (de) 2016-12-30 2019-11-06 Robert L. Jones Eingebettete variable linienmuster
CN107463542B (zh) * 2017-08-08 2023-10-20 郭铮铮 一种使用ascii打印字符表示二进制数的方法
US11314996B1 (en) 2019-06-04 2022-04-26 Idemia Identity & Security USA LLC Embedded line patterns using square-wave linecode
US11360769B1 (en) 2021-02-26 2022-06-14 International Business Machines Corporation Decimal scale and convert and split to hexadecimal floating point instruction
US11663004B2 (en) 2021-02-26 2023-05-30 International Business Machines Corporation Vector convert hexadecimal floating point to scaled decimal instruction

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US3700872A (en) * 1969-08-22 1972-10-24 Ibm Radix conversion circuits
US3636329A (en) * 1970-04-28 1972-01-18 Us Navy Five-bit binary to decimal translator
US3736412A (en) * 1971-05-17 1973-05-29 Rca Corp Conversion of base b number to base r number, where r is a variable
GB2080584B (en) * 1980-07-24 1984-05-23 Int Computers Ltd Binary-coded-decimal to binary converter
US4630030A (en) * 1984-06-28 1986-12-16 Wang Laboratories, Inc. Compression of data for storage

Also Published As

Publication number Publication date
JPH0644714B2 (ja) 1994-06-08
DE3685888T2 (de) 1993-07-01
EP0192437A3 (en) 1990-03-14
KR860006879A (ko) 1986-09-15
AU5348586A (en) 1986-09-04
DE3685888D1 (de) 1992-08-13
ATE78124T1 (de) 1992-07-15
AU593235B2 (en) 1990-02-08
KR940003198B1 (ko) 1994-04-15
US4719450A (en) 1988-01-12
CA1331810C (en) 1994-08-30
EP0192437B1 (de) 1992-07-08
JPS61189024A (ja) 1986-08-22

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