EP0296603A2 - Photoelektrischer Umwandler - Google Patents

Photoelektrischer Umwandler Download PDF

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Publication number
EP0296603A2
EP0296603A2 EP88110054A EP88110054A EP0296603A2 EP 0296603 A2 EP0296603 A2 EP 0296603A2 EP 88110054 A EP88110054 A EP 88110054A EP 88110054 A EP88110054 A EP 88110054A EP 0296603 A2 EP0296603 A2 EP 0296603A2
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EP
European Patent Office
Prior art keywords
photoelectric conversion
conversion elements
potential
common lines
separate electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP88110054A
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English (en)
French (fr)
Other versions
EP0296603A3 (de
Inventor
Katsunori Hatanaka
Toshihiro Saika
Takayuki Ishii
Katsuhiko Yamada
Satoshi Itabashi
Kazuaki Tashiro
Tetsuya Shimada
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Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62160511A external-priority patent/JPS645058A/ja
Priority claimed from JP62160509A external-priority patent/JPS645056A/ja
Priority claimed from JP62160505A external-priority patent/JPH06103743B2/ja
Priority claimed from JP62160513A external-priority patent/JPH07107931B2/ja
Priority claimed from JP62160512A external-priority patent/JPH07107930B2/ja
Application filed by Canon Inc filed Critical Canon Inc
Publication of EP0296603A2 publication Critical patent/EP0296603A2/de
Publication of EP0296603A3 publication Critical patent/EP0296603A3/de
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/024—Details of scanning heads ; Means for illuminating the original
    • H04N1/028—Details of scanning heads ; Means for illuminating the original for picture information pick-up
    • H04N1/03—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a substantially linear array
    • H04N1/031—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a substantially linear array the photodetectors having a one-to-one and optically positive correspondence with the scanned picture elements, e.g. linear contact sensors
    • H04N1/0315—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a substantially linear array the photodetectors having a one-to-one and optically positive correspondence with the scanned picture elements, e.g. linear contact sensors using photodetectors and illumination means mounted on separate supports or substrates or mounted in different planes
    • H04N1/0316—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a substantially linear array the photodetectors having a one-to-one and optically positive correspondence with the scanned picture elements, e.g. linear contact sensors using photodetectors and illumination means mounted on separate supports or substrates or mounted in different planes illuminating the scanned image elements through the plane of the photodetector, e.g. back-light illumination
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/024—Details of scanning heads ; Means for illuminating the original
    • H04N1/028—Details of scanning heads ; Means for illuminating the original for picture information pick-up
    • H04N1/03—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a substantially linear array
    • H04N1/031—Details of scanning heads ; Means for illuminating the original for picture information pick-up with photodetectors arranged in a substantially linear array the photodetectors having a one-to-one and optically positive correspondence with the scanned picture elements, e.g. linear contact sensors
    • H04N1/0313—Direct contact pick-up heads, i.e. heads having no array of elements to project the scanned image elements onto the photodectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/28—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices being characterised by field-effect operation, e.g. junction field-effect phototransistors
    • H10F30/285—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices being characterised by field-effect operation, e.g. junction field-effect phototransistors the devices having PN homojunction gates
    • H10F30/2863—Field-effect phototransistors having PN homojunction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/191—Photoconductor image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements

Definitions

  • the present invention relates to a photoelectric converter and more particularly, to a photoelectric converter used as an input unit of a facsimile system, an image reader, a digital copying machine, an electronic blackboard or the like.
  • a typical photoelectric converter is exemplified by an image sensor represented by a contact type line sensor used in a facsimile system, an image scanner or the like.
  • the contact type line sensor includes a reading unit having the same size as that of a width of an original.
  • a conventional image sensor of this type is manufactured or formed using a photoconductive material such as hydrogenated amorphous silicon (to be referred to as a-Si:H hereinafter), CdS, and CdSe on an elongated substrate consisting of glass or the like according to a thin-film deposition technique such as deposition.
  • the present applicant proposed a photoelectric converter in Japanese Patent Application No. 61-144990.
  • thin-film transistors to be referred to as TFTs hereinafter
  • TFTs thin-film transistors of a-Si:H or poly-Si
  • TFT sensor elements storage capacitors, and the like are formed on a single substrate.
  • Fig. 1 shows an equivalent circuit diagram of a matrix driven image sensor.
  • the image sensor includes TFT sensors S1 to S n ⁇ m′ storage capacitors C s1 to C sn ⁇ m for storing photocurrents from the sensors S1 to S n ⁇ m′ switches (TFT) U1 to U n ⁇ m for resetting the charges of the storage capacitors C s1 to S sn ⁇ m′ and switches (TFT) T1 to T n ⁇ m for reading out the charges from the storage capacitors C s1 to C sn ⁇ m and transferring them to readout capacitors C L1 to C Ln .
  • the reset and transfer TFTs are blocked in an n x m matrix.
  • the image sensor also includes a shift register/driver 11 for sequentially selecting and driving gate lines (1 to m+1) and a switch array 12 for reading voltages of signal lines (1 to n) and serially converting and outputting the read voltages.
  • Fig. 2 shows a one-bit wiring pattern of the image sensor of the equivalent circuit diagram shown in Fig. 1.
  • the one-bit wiring pattern includes a signal line matrix unit 13, a sensor 14, a contact hole 15, a storage capacitor 16, a transfer TFT 17, a reset TFT 18, a gate wiring unit 19, and an illumination window 20.
  • light reflected by an original and illuminated through the window 20 is directly received by the sensor, thus constituting a "lensless" type arrangement.
  • Fig. 3 is a sectional view of the pattern of Fig. 2 along the line X - X′ of Fig. 2
  • Fig. 4 is a sectional view thereof along the line Y - Y′ of Fig. 2.
  • the pattern in Fig. 3 comprises a glass substrate 1, a lower electrode 21, an insulating layer 3, an a-Si:H layer 4, an n+-type doped layer 5, and an upper electrode layer 22.
  • the pattern in Fig. 4 comprises a glass substrate 1, lower electrodes 21, an insulating layer 3, an a-Si:H layer 4, an n+-type doped layer 5, and upper electrode layers 22 and 23.
  • the TFT sensor since the TFT sensor is used, photosensitivity is as large as 10 to 100 times that of a photodiode type sensor.
  • the above pattern has advantages in a high light trans­mission rate and a high illuminance on the sensor surface.
  • the large storage capacitance is advantageous from the viewpoint of characteristics such as an S/N ratio and the dynamic range, the large storage capacitance is not necessarily advantageous from the viewpoint of manufacturing cost. More specifically, when the storage capacitance is increased, the substrate size is increased by an area corresponding to an increased capacitance component. Therefore, the number of sensors per batch is undesirably decreased.
  • signal processing ICs Integrated Circuits
  • the number of photo­electric conversion elements is 1728 in an A4 size when the photoelectric converter complies with the facsimile G3 standard.
  • a large number of signal processing ICs are thus required. For this reason, the number of mounting steps is increased, the manufacturing cost is increased, and sensor reliability is degraded.
  • Matrix wiring is employed to reduce the number of signal processing ICs and the number of mounting steps.
  • Fig. 5 is a block diagram of a photoelectric converter employing matrix wiring.
  • the photoelectric converter includes a photoelectric conversion unit 201, a scanning unit 201, a signal processing unit 203, and a matrix wiring unit 204.
  • Fig. 6 is a plan view of the conventional matrix wiring unit, and Figs. 7A and 7B arc sectional views of the matrix wiring unit of Fig. 6 along the lines A - A′ and B - B′, respectively.
  • the matrix wiring unit includes a substrate 301, separate electrodes 302 to 305, an insulating layer 306, common lines 307 to 309, and a through hole 310 for bringing the separate electrode into ohmic contact with the corresponding common line.
  • the number of signal processing circuits in the signal processing unit 203 is equal to that of output lines of the matrix. Therefore, the signal processing unit can be advantageously made compact and the photo­electric converter becomes inexpensive.
  • Fig. 8 shows a illustrative sectional view of such photoelectric converter.
  • a light incident window 178 is provided at a mount base 175.
  • a light from a light source 174 illuminates via the light incident window 178.
  • a photoelectric converter 175 having photoelectric conversion elements (not shown) adjacent via a thin transparent spacer 177 to the original, and IC176 for processing a light signal from the photoelectric conversion device 173 are provided.
  • the light passing through the incident light window illuminates via the photoelectric conversion device 173 the original 178 fed by a paper feed roller 171.
  • a light reflected from the original is read by the photo­electric conversion element on the device 173.
  • the photoelectric converter using the conventional matrix wiring has the following problems.
  • Each matrix common line extends in the longitudinal direction of the photoelectric converter and undesirably has a length of, e.g., 210 mm in a line sensor having a length corresponding to an A4 width. For this reason, when a capacitance between the common lines is not sufficiently decreased, crosstalk occurs between the output signals. This disadvantage results in a large matrix unit.
  • the pitch of the output separate electrodes of the photoelectric conversion elements is as small as, e.g., 125 ⁇ m in a photoelectric converter having a resolution of 8 lines/mm. For this reason, crosstalk occurs between the output signals unless the capacitance between the separate electrodes is sufficiently decreased.
  • an image sensor comprising a photo­electric conversion unit, a charge storage unit, a switch unit, and a wiring unit, all of which are formed on a single substrate, wherein capacitors of the charge storage unit are formed at the same substrate positions as a wiring unit pattern. Therefore, the number of insulating layers and the number of wiring layers can be increased to form the storage capacitors at the same substrate position as the wiring unit. Even if a sensor photocurrent and the capacitance are increased, the width of the sensor substrate can be reduced, thus solving the conventional problems described above.
  • a photoelectric converter including a plurality of one-­dimensionally arranged photoelectric conversion elements, a plurality of thin-film transistors respectively connected to the photoelectric conversion elements, and a plurality of common lines each for commonly connecting at least two of output lines of the plurality of thin-film transistors, comprising: a conductive layer formed at intersections between output separate electrodes and common lines so as to maintain a potential at a predeter­mined level; and a wiring pattern formed between the separate electrodes and between the common lines so as to maintain a potential at a predetermined level, wherein the photoelectric conversion elements and the plurality of common lines are formed on a single substrate.
  • the conductive layer is formed at the intersec­tions between the output separate electrodes of the photoelectric conversion elements and the common lines so as to maintain the potential at the predetermined level, so that stray capacitances at the insulating intersections between the separate electrodes and the common lines can be eliminated.
  • the wiring pattern is formed between the separate electrodes and between the common lines to maintain the potential at the predetermined level, so that capacitances between the electrodes and between the lines can be eliminated.
  • a photoelectric converter comprising a plurality of one-dimensionally arranged photoelectric conversion elements, a plurality of common lines each for commonly connecting at least two of output separate electrodes of the photoelectric conversion elements, a conductive layer formed at intersections between the output separate electrodes and the common lines so as to maintain a potential at a predetermined level, and a wiring pattern formed between the separate electrodes and between the common lines so as to maintain a potential at a pre­determined level, wherein the photoelectric conversion elements and the plurality of common lines are formed on a single substrate and the potentials are sufficiently higher than a maximum potential of the output lines.
  • the conductive layer is formed at the intersec­tions between the output separate electrodes of the photoelectric conversion elements and the common lines so as to maintain the potential at the predetermined level, so that stray capacitances at the insulating intersections between the separate electrodes and the common lines can be eliminated.
  • the wiring pattern is formed between the separate electrodes and between the common lines to maintain the potential at the predetermined level, so that capacitances between the electrodes and between the lines can be eliminated.
  • a photoelectric converter including a plurality of one-­dimensionally arranged photoelectric conversion elements, a plurality of thin-film transistors respectively connected to the photoelectric conversion elements, and a plurality of common lines each for commonly connecting at least two of output lines of the plurality of thin-film transistors, comprising: a conductive layer formed at intersections between output separate electrodes and common lines so as to maintain a potential at a predeter­mined level; and a light-shielding layer formed on the thin-film transistors so as to oppose an original, the light-shielding layer being located at a position nearer to the original with respect to at least channel regions.
  • the conductive layer is formed at the intersections between the output separate electrodes of the photoelectric conversion elements and the common lines so as to maintain the potential at the predetermined level, so that stray capacitances at the insulating intersections between the separate electrodes and the common lines can be eliminated.
  • the light-­shielding layer is formed in the channel regions of the thin-film transistors, so that an increase in current leakage can be prevented.
  • the photoelectric converter including a photoelectric conversion unit, a charge storage unit, a switch unit, and a wiring unit, all of which are formed on a single substrate, thereby solving the various operational problems.
  • a typical arrangement of this photoelectric converter is shown in Figs. 9 and 10A and 10B.
  • the photo­electric converter includes a capacitor unit 1010, a TFT unit 1011, and a matrix unit 1012. Referring to Figs.
  • the photoelectric converter includes a glass substrate 1109, a first conductive layer 1102, an a-Si:N layer 1103, an a-Si:H layer 1104, an n+-type a-Si:H doping layer, a second conductive layer 1106, and channels 1107.
  • the photoelectric converter includes a photoelectric conversion element 1019, an incident window 1016, a thin-film transistor (TFT) 1011, a capacitor 1010, and a matrix 1015.
  • TFT thin-film transistor
  • an image reading apparatus including a plurality of photoelectric conversion elements using a thin-film semiconductor, a peripheral circuit of thin-film transistors, and a wiring matrix, all of which are formed on a single substrate, comprising: a conductive layer for maintaining a potential at a predetermined level at intersections between output separate electrodes of the photoelectric conversion elements and common lines, and a wiring pattern formed between the output separate electrodes and between the common lines so as to maintain a potential at a predetermined level, wherein the same material as that of the electrode layer of a first gate is used to form a second gate at a side opposing the first gate of the thin-film transistor.
  • the conductive layer is formed at the intersections between the output separate electrodes of the photoelectric conversion elements and the common lines to maintain the potential at a predetermined level, so that stray capacitances formed at the insulating intersections of the separate electrodes and the common lines can be eliminated.
  • the wiring pattern is formed between the separate electrodes and the common lines so as to maintain a potential at a predetermined level, so that capacitances are not formed between the electrodes and between the lines.
  • the second gate electrode of the TFT is formed by using the same material as that of the electrode metal of the first gate in a single process. Light reflected and scattered by the surface of the original is not incident on the channel regions of the TFTs.
  • the upper and lower gates are formed to vertically widen a depletion layer in the semiconductor thin film in the OFF state of the TFT, thereby preventing a flow of carriers.
  • the carriers are then discharged from an interface with an insulating film having a large leakage current, and thus a large OFF resistance can be obtained.
  • an ON current can be increased.
  • an S/N ratio can be increased.
  • the first gate is electrically connected to the second gate through the contact hole 116.
  • the first and second gates are kept at the same potential.
  • the first and second gates may be connected to different wiring layers, and different voltages may be applied thereto, thereby electrically controlling the interface between the semiconductor and insulating layers.
  • Fig. 11 is a plan view showing a pattern of an image sensor according to an embodiment of the present invention. Dotted lines represent a wiring pattern of a first layer, solid lines represent a wiring pattern of a second layer, and hatched lines represent a wiring pattern of a third layer.
  • the image sensor includes a signal line matrix unit 13, a sensor 14, storage capacitors 16 respectively formed in the signal line matrix unit 13 and a gate wiring unit 19, a transfer TFT 17, a reset TFT 18, and an illumination window 20.
  • Figs. 12, 13 and 14 are sectional views of the image sensor shown in Fig. 11 along the lines A - A′, B - B′, and C - C′, respectively.
  • the image sensor includes a glass substrate 1, an insulating layer 3, an a-Si:H layer 4, an n+-type a-Si:H doping layer 5, first layer electrodes 6 such as a gate electrode, a sensor gate electrode, and a storage capacitor electrode, second layer electrodes 7 such as source and drain electrodes of the TFT and a counter electrode of the capacitor, an insulating layer 8, third layer electrodes 9 extending in the longitudinal direction of the substrate, and a transparent protective layer 10.
  • a pel density in the A4 read width is given as 8 pels/mm and 1728 pels are connected to a matrix pattern of 32 x 54 lines, 32 signal lines and 54 gate lines are required.
  • a process rule is given as a line width of 20 ⁇ m and an interline space of 20 ⁇ m
  • the wiring pattern required for matrix connections on the substrate has a width of about 3.4 mm along the longi­tudinal direction of the substrate.
  • an area required for forming a 40-pF capacitor is about 3 x 10 ⁇ 3 cm2.
  • the capacitor area becomes 100 ⁇ m x 3 mm, which allows formation of a sufficient wiring pattern.
  • the capacitor pattern area can be eliminated, and the substrate width can be decreased by about 3 mm.
  • the pattern areas of the matrix wiring unit and the storage capacitor unit are more than a half of the entire area of the sensor substrate. Therefore, a decrease in substrate width according to the arrangement of the present invention can greatly increase a yield per fabrication batch, thus reducing fabrication cost.
  • the storage capacitors are formed at the same position as that of the wiring pattern, i.e., the storage capacitors and the wiring pattern overlap each other, the following effects are obtained:
  • Fig. 15 is a plan view of a photoelectric converter according to another embodiment of the present invention
  • Fig. 16 is a view showing a cross section of the photoelectric converter shown in Fig. 15.
  • the second conductive layer of the matrix unit in Fig. 15 is omitted.
  • a light-shielding layer of the TFT is represented by the alternate long and short dashed line.
  • Figs. 17A to 17F are sectional views for explaining the steps in manufacturing the photoelectric converter shown in Fig. 16.
  • incident light 109 from a light source is incident on an original 107 through a transparent spacer 106 and is reflected by the original 107, and reflected light 110 is incident on a photo­electric conversion unit 101.
  • the photoelectric converter also includes a substrate 108 and a matrix unit 105.
  • a first conductive layer 112 of Al, Cr, or the like is deposited on a glass tube transparent substrate 108 by sputtering, deposition, or the like and is patterned into a desired shape (Fig. 17A).
  • An SiN layer 113 as a first insulating film known in plasma CVD, an a-Si:H layer 114, and an n+-type a-Si:H doping layer 115 are formed and patterned into a desired shape (Fig. 17B).
  • a second conductive layer 116 of Al, Cr, or the like is deposited by sputtering, deposition, or the like and patterned into a desired shape (Fig. 17C).
  • n+-type doping layer of the channel region of TFT and the gap of the photoelectric conversion unit is removed by etching (Fig. 17D).
  • a second insulating layer 117 of a polyimide or SiN film or the like is formed on the second conductive layer 116, and necessary contact holes are formed or desired patterning is performed as needed (Fig. 17E).
  • a third conductive layer 118 of Al, Cr, or the like is formed on the second insulating layer 117 by sputtering or deposition and is patterned in a desired shape (Fig. 17F). Part 118′ of the layer 118 is not formed in the structure shown in Fig. 16.
  • the conductive layer is formed between the separate electrodes and the common lines so as to maintain the potential at a predetermined level
  • stray capacitances between the separate electrodes and the common lines can be eliminated.
  • wiring patterns are formed between the separate electrodes and the common lines to maintain the potential at a predeter­mined level, so that interline capacitances are not formed between the separate electrodes and the common lines. Therefore, the lines are not capacitively coupled, and crosstalk between the output signals can be prevented.
  • a photoelectric converter free from crosstalk between the output signals and having a compact matrix wiring unit.
  • the conductive layer and the wiring pattern are kept at a potential sufficiently higher than the maximum potential of the output line. Therefore, the capacitance between the signal lines of a MIS structure and the conductive layer and the wiring pattern can be reduced.
  • Fig. 18A shows a C-V curve of the capacitor having a MIS structure as in the above embodiment.
  • Fig. 18B shows a sectional view of a structure including the first conductive layer to the second conductive layer.
  • the MIS structure consists of a substrate 501, a first conductive layer 502, an SiN first insulating layer 503, an a-Si:H semiconductor layer 504, and a second conductive layer 505. In this structure, an n+-type a-Si:H doping layer is not illustrated.
  • a gate the first conductive layer 502 of the MIS capacitor is held at a negative potential
  • a depletion layer spreads in the semiconductor layer 504, and a capacitance is decreased (a region 442).
  • the capacitance is kept to be a small value (a region 443).
  • the capacitance between the first and second conductive layers is small.
  • the first conductive layer 502 serves as signal lines.
  • the second conductive layer 505 is kept at a potential sufficiently higher than that of the signal lines, the portion between the conductive layers can be used as a region having a small constant capacitance.
  • Fig. 19 shows an equivalent circuit diagram of a portion having the ith block as a main region.
  • the wiring lines between the second conductive layer of the matrix unit and the signal lines are kept at a potential V M .
  • the thickness of the SiN first insulating layer is 3,000 ⁇ and the thickness of the semiconductor layer is about 5,000 ⁇ , a gate voltage required for perfectly spreading the depletion layer in Fig. 18A is -1 V or less. Therefore, the voltage V M must always be higher by 1 V or more than the potential of the first conductive layer. This condition varies depending on various conditions such as sensor bias voltages and sensor capacitances.
  • Fig. 20 is a sectional view of a photoelectric converter according to still another embodiment of the present invention. This arrangement is substantially the same as that of Fig. 16 except for a light-shielding layer 619.
  • This structure can be manufactured in the same steps of Figs. 17A to 17F. However, in the process of Fig. 17F, the third conductive layer 618 constitutes a necessary wiring pattern at the matrix unit but is left on the TFT so as to cover the channels.
  • the converter shown in Fig. 20 is prepared by the above steps. Referring to Fig. 20, incident light 609 from a light source in a direction indicated by an arrow reaches an original 607 through a glass substrate 608, a window 604 through which light can pass, and a transparent spacer 606.
  • the transparent spacer 606 protects a reading apparatus including the sensor and assures a predetermined distance between the original and the sensor.
  • Reflected light 610 from the original reaches a photoelectric conversion unit 1 and the optical signal is converted into an electrical signal according to image information.
  • An unspecified light component 611 of light reflected by the original is reflected toward the TFT.
  • the component 611 is not incident on the channel regions of the TFT due to the presence of a TFT light-shielding layer 603 formed of a third conductive layer 618.
  • FIG. 21 The Vg-Id characteristics of the TFT are shown in Fig. 21.
  • a solid curve A in Fig. 21 represents the characteristics of the TFT in a dark state
  • a dotted curve B represents the characteristics of the TFT when light is incident (10 1x) on the TFT.
  • a leakage current is increased.
  • the leakage current in the OFF state of the TFT is not increased. Therefore, the designed operation coinciding with the solid curve A in Fig. 21 can be obtained.
  • the light-shielding layer 619 In order to obtain a more stable TFT operation, it is desirable to set the light-shielding layer 619 at a low potential. In the OFF state of the TFT, the light-shielding layer 619 serves as a floating gate and the TFT is not turned on. In practice, the light-­shielding layer 619 is kept at the same potential as that of the TFT gate or the same potential as that of the TFT gate in the OFF state. However, the light-­shielding layer 619 may be set at a potential lower than that of the TFT gate in the OFF state.
  • Figs. 22A and 22B show a case wherein a gate line 621 and a light-shielding layer 619 are kept at a common potential and are connected to a gate line 621 through a contact hole 620.
  • Fig. 22B shows a case wherein the gate line 621 and the light-shielding layer 619 are kept at different potentials, and the light-­shielding layer 619 is kept at a constant potential equal to or lower than that of the TFT gate in the OFF state.
  • the same effect as described above can be obtained even if the potentials of the gate line and the light-­shielding layer are changed between potentials lower than that of the gate TFT in synchronism with the ON/OFF operation of the TFT gate.
  • the third conductive layer may be used to stabilize the photoelectric conversion unit, and its embodiment is shown in the sectional view of Fig. 23.
  • Fig. 24 is a plan view showing a region near a photoelectric conver­sion unit 601 of Fig. 23.
  • An electrostatic shielding layer 621 of a third conductive layer is formed in a portion except for a gap region 622 serving as a photoelectric conversion region of the photoelectric conversion unit 601.
  • An electrostatic component is generated between an original and spacer (e.g., a thin glass plate) surface near the original side when an image reading apparatus reads an image from the original. This electrostatic component generates an electric field applied to the photoelectric conversion unit 601, and a stable photocurrent is not often obtained.
  • the electrostatic shielding layer 621 is formed on the photoelectric conversion element and is kept at a predetermined potential, thereby obtaining a stable photocurrent.
  • the potential of the electrostatic shielding layer 621 may be a ground potential or may be the same potential as one of the opposite electrodes of the photoelectric conversion unit 601.
  • the potential of the electrostatic shielding layer can be set to be equal to that of the light-shielding layer of the photoelectric conversion unit 601.
  • the shielding layer for preventing the influence of the electrostatic component on the upper surface of the spacer which is in sliding contact with the original surface can be constituted as the third conductive layer.
  • Fig. 25 shows an equivalent circuit diagram wherein the light-shielding layer 618 of the TFT having an arrangement in Fig. 23 is set at a predetermined potential V T and the electrostatic shielding layer 621 of the sensor unit is set at the same potential as the predetermined potential V SG .
  • a bias V S is applied to the sensor and a voltage V SG is applied to the sensor light-shielding layer.
  • a reset potential is represented by V R and signal lines are represented by S1, S2, ... S32.
  • the second conductive layer of the matrix unit 605 is kept at a potential V M .
  • the light-shielding layer 618 of the TFT may be directly connected to the gate of the TFT.
  • the TFT light-shielding layer 618 is driven by a gate potential V Gi .
  • the electrostatic shielding layer 621 of the sensor may be set at a predetermined potential independently of the voltage V SG .
  • the potential of the second conductive layer may be the ground potential and can be arbitrarily selected.
  • the stray capacitances can be eliminated in the matrix unit, and light-shielding of the thin-film transistor can be performed, thereby reducing the leakage current and obtaining stable operation free from crosstalk.
  • the electrostatic shielding layer is formed on the surface of the sensor unit on the original side in the same step as in the process for forming other components, thereby improving stability of the photocurrent.
  • the light-shielding layer of the thin-film transistor, the electrostatic shielding layer, and the third conductive layer of the matrix are constituted by the common conductive layer, thereby simplifying the fabrication process.
  • Fig. 26 is a plan view showing a photoelectric converter according to still another embodiment of the present invention
  • Figs. 27A and 27B are sectional views of the converter shown in Fig. 26 along the lines A - A′ and B - B′, respectively.
  • Fig. 28 shows an equivalent circuit diagram of the converter shown in Fig. 26.
  • Figs. 29A to 29F are sectional views for explaining the steps in manufacturing the converter shown in Fig. 26.
  • the converter includes a TFT drive gate matrix 715, a photoelectric conversion unit 709, a light incident window 716, capacitor 710 a TFT unit 711, and a signal matrix unit 712.
  • the converter also includes ith block gate lines Gi, a photoelectric conversion element bias line Vs, a lower electrode V SG of the photoelectric conversion unit, a lower electrode V R of the capacitor, ground lines Gn of the common lines, common signal lines Si.
  • a first conductive layer 802, an SiN layer 803, an a-Si:H layer 804, an n+-type a-Si:H doping layer 805, a second conductive layer 806, a second insulating layer 807, and a third conductive layer 808 are sequentially formed on a glass substrate 801.
  • a conductive film of Al, Cr, or the like is formed on a clean transparent substrate 801 of glass or the like by sputtering, deposition, or the like and is patterned into a desired shape to obtain the first conductive layer 802.
  • the SiN film 803 as the first insulating film, the a-Si:H film 804, and the n+-type a-Si:H doping film 805 are continuously formed, and the third layer is patterned into a desired shape, thereby forming each element isolation region 813 so as to form a first contact hole 814.
  • a conductive film of Al, Cr, or the like is formed by sputtering, deposition, or the like and is patterned into a desired shape, thereby forming the second conductive film 806.
  • Unnecessary n+-type a-Si:H doping layer portions such as a gap region of the photoelectric converter and the channel regions of the TFT are removed by etching.
  • An SiN or polyimide film as the second insulating film 807 is formed on the second conductive layer and is patterned to form a second contact hole 815 above the first contact hole.
  • a conductive film of Al, Cr, or the like is formed on the second insulating film by sputtering, deposition, or the like and is patterned into a desired shape, thereby forming the third conductive layer 808.
  • a portion of the third conductive layer in the matrix unit serves as a necessary wiring pattern and another portion thereof is left to cover the channel regions above the TFT.
  • the conductive layer is formed at the intersections between the output separate electrodes of the photo­electric conversion elements and the common lines so as to maintain the potential at a predetermined level, thereby decreasing the stray capacitances formed at the insulating intersections between the separate electrodes and the common lines.
  • signal crosstalk caused by a capacitive component can be decreased, and an S/N ratio can be increased because a low-level signal can be processed.
  • the wiring patterns are formed between the separate electrodes and between the common lines so as to maintain the potential at a predetermined level, so that capacitances between the electrodes and between the lines can be decreased. Therefore, signal crosstalk can be suppressed and an S/N ratio can be increased because a low-level signal can be processed.
  • the uppermost metal layer of the wiring layers serves as the second gate of the TFT, so that the characteristics of the TFT can be improved.
  • a special light-shielding means for the TFT need not be arranged.
  • the TFT second gate can be formed simultaneously with other wiring patterns by using the same material as that of these patterns. Therefore, the fabrication process can be simplified at low cost.
  • An image sensor includes a photoelectric conversion unit, a charge storage unit, a switch unit, and a wiring unit, all of which are formed on a single substrate.
  • a capacitor of the charge storage unit is formed at the same substrate position as that of a pattern of said wiring unit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
EP88110054A 1987-06-26 1988-06-23 Photoelektrischer Umwandler Withdrawn EP0296603A3 (de)

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
JP160512/87 1987-06-26
JP62160511A JPS645058A (en) 1987-06-26 1987-06-26 Photoelectric converting device
JP62160509A JPS645056A (en) 1987-06-26 1987-06-26 Photoelectric converting device
JP62160505A JPH06103743B2 (ja) 1987-06-26 1987-06-26 イメ−ジセンサ
JP62160513A JPH07107931B2 (ja) 1987-06-26 1987-06-26 光電変換装置の製造法
JP62160512A JPH07107930B2 (ja) 1987-06-26 1987-06-26 光電変換装置の製造法
JP160513/87 1987-06-26
JP160505/87 1987-06-26
JP160511/87 1987-06-26
JP160509/87 1987-06-26

Publications (2)

Publication Number Publication Date
EP0296603A2 true EP0296603A2 (de) 1988-12-28
EP0296603A3 EP0296603A3 (de) 1989-02-08

Family

ID=27528234

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88110054A Withdrawn EP0296603A3 (de) 1987-06-26 1988-06-23 Photoelektrischer Umwandler

Country Status (1)

Country Link
EP (1) EP0296603A3 (de)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2228367A (en) * 1989-02-21 1990-08-22 Canon Kk Matrix wiring in photoelectric conversion devices
EP0461362A3 (en) * 1990-04-17 1992-03-04 Canon Kabushiki Kaisha Thin film semiconductor device and process for preparing the same
EP0267591A3 (de) * 1986-11-11 1992-08-19 Canon Kabushiki Kaisha Lichtelektrischer Wandler
EP0594195A1 (de) * 1992-10-23 1994-04-27 Matsushita Electric Industrial Co., Ltd. Direktkontakt-Bildsensor, eine Bildsensoreinheit und Verfahren zu deren Herstellung
WO1996003773A1 (en) * 1994-07-27 1996-02-08 Litton Systems Canada Limited Radiation imaging panel
EP0660421A3 (de) * 1993-12-27 1997-11-05 Canon Kabushiki Kaisha Photoelektrischer Umwandler, sein Steuerverfahren und System mit diesem photoelektrischen Umwandler
EP0798783A3 (de) * 1996-03-26 1998-07-29 Canon Kabushiki Kaisha Photoelektrische Umwandlungsanordnung und Bildlesegerätssystem unter Verwendung derselben
US7897930B2 (en) 2006-06-09 2011-03-01 Canon Kabushiki Kaisha Radiation imaging apparatus and radiation imaging system

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Publication number Priority date Publication date Assignee Title
JPS5544788A (en) * 1978-09-27 1980-03-29 Matsushita Electronics Corp Charge transfer method
JPS5678364U (de) * 1979-11-14 1981-06-25
JPS58171850A (ja) * 1982-03-31 1983-10-08 Sony Corp 固体撮像素子
US4691244A (en) * 1984-05-04 1987-09-01 Energy Conversion Devices, Inc. Contact-type document scanner including static shield
US4577232A (en) * 1984-08-31 1986-03-18 Texas Instruments Incorporated Line addressed charge coupled imager
KR900003772B1 (ko) * 1984-11-28 1990-05-31 가부시끼가이샤 도시바 이미지 센서(image sensor)

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0267591A3 (de) * 1986-11-11 1992-08-19 Canon Kabushiki Kaisha Lichtelektrischer Wandler
EP0576040A1 (de) * 1986-11-11 1993-12-29 Canon Kabushiki Kaisha Lichtelektrischer Wandler
DE4005494A1 (de) * 1989-02-21 1990-08-23 Canon Kk Halbleiter-bauelement mit einer matrix-leiterfuehrung und halbleiter-vorrichtung, die das bauelement verwendet sowie eine lichtelektrische umwandlungsfunktion hat
FR2643509A1 (fr) * 1989-02-21 1990-08-24 Canon Kk Dispositif a semi-conducteurs, dispositif de conversion photo-electrique et appareil de lecture d'images
US5061979A (en) * 1989-02-21 1991-10-29 Canon Kabushiki Kaisha Semiconductor photoelectric device having a matrix wiring section
GB2228367B (en) * 1989-02-21 1993-04-07 Canon Kk Semiconductor device having matrix wiring section,and semiconductor device using the same and having photoelectric conversion function
GB2228367A (en) * 1989-02-21 1990-08-22 Canon Kk Matrix wiring in photoelectric conversion devices
US5510640A (en) * 1990-04-17 1996-04-23 Cannon Kabushiki Kaisha Semiconductor device and process for preparing the same
EP0461362A3 (en) * 1990-04-17 1992-03-04 Canon Kabushiki Kaisha Thin film semiconductor device and process for preparing the same
US5556809A (en) * 1992-10-23 1996-09-17 Matsushita Electric Industrial Co., Ltd. Direct-contact type image sensor device, an image sensor unit, and methods for producing the same
US5477047A (en) * 1992-10-23 1995-12-19 Matsushita Electric Industrial Co., Ltd. Direct-contact type image sensor device, an image sensor unit, and methods for producing the same
EP0594195A1 (de) * 1992-10-23 1994-04-27 Matsushita Electric Industrial Co., Ltd. Direktkontakt-Bildsensor, eine Bildsensoreinheit und Verfahren zu deren Herstellung
US6075256A (en) * 1993-12-16 2000-06-13 Canon Kabushiki Kaisha Photoelectric converter, its driving method, and system including the photoelectric converter
US7022997B2 (en) 1993-12-27 2006-04-04 Canon Kabushiki Kaisha Photoelectric converter, its driving method, and system including the photoelectric converter
EP0660421A3 (de) * 1993-12-27 1997-11-05 Canon Kabushiki Kaisha Photoelektrischer Umwandler, sein Steuerverfahren und System mit diesem photoelektrischen Umwandler
US6512279B2 (en) 1993-12-27 2003-01-28 Canon Kabushiki Kaisha Photoelectric converter, its driving method, and system including the photoelectric converter
US6982422B2 (en) 1993-12-27 2006-01-03 Canon Kabushiki Kaisha Photoelectric converter, its driving method, and system including the photoelectric converter
USRE39780E1 (en) * 1993-12-27 2007-08-21 Canon Kabushiki Kaisha Photoelectric converter, its driving method, and system including the photoelectric converter
USRE42157E1 (en) 1993-12-27 2011-02-22 Canon Kabushiki Kaisha Photoelectric converter, its driving method, and system including the photoelectric converter
WO1996003773A1 (en) * 1994-07-27 1996-02-08 Litton Systems Canada Limited Radiation imaging panel
EP0798783A3 (de) * 1996-03-26 1998-07-29 Canon Kabushiki Kaisha Photoelektrische Umwandlungsanordnung und Bildlesegerätssystem unter Verwendung derselben
US6160260A (en) * 1996-03-26 2000-12-12 Canon Kabushiki Kaisha Photoelectric conversion device, and system and image reading method using the device
US7897930B2 (en) 2006-06-09 2011-03-01 Canon Kabushiki Kaisha Radiation imaging apparatus and radiation imaging system
US8084745B2 (en) 2006-06-09 2011-12-27 Canon Kabushiki Kaisha Radiation imaging apparatus and radiation imaging system

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