EP0470416A2 - Circuit de voie avec corrélation croisée - Google Patents

Circuit de voie avec corrélation croisée Download PDF

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Publication number
EP0470416A2
EP0470416A2 EP19910112161 EP91112161A EP0470416A2 EP 0470416 A2 EP0470416 A2 EP 0470416A2 EP 19910112161 EP19910112161 EP 19910112161 EP 91112161 A EP91112161 A EP 91112161A EP 0470416 A2 EP0470416 A2 EP 0470416A2
Authority
EP
European Patent Office
Prior art keywords
track
track circuit
signal
transmitter
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19910112161
Other languages
German (de)
English (en)
Other versions
EP0470416B1 (fr
EP0470416A3 (en
Inventor
Helmut Uebel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent Deutschland AG
Original Assignee
Alcatel SEL AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel SEL AG filed Critical Alcatel SEL AG
Publication of EP0470416A2 publication Critical patent/EP0470416A2/fr
Publication of EP0470416A3 publication Critical patent/EP0470416A3/de
Application granted granted Critical
Publication of EP0470416B1 publication Critical patent/EP0470416B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B61RAILWAYS
    • B61LGUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L1/00Devices along the route controlled by interaction with the vehicle or train
    • B61L1/18Railway track circuits
    • B61L1/181Details
    • B61L1/188Use of coded current

Definitions

  • the invention relates to a track circuit according to the preamble of claim 1.
  • Such a track circuit is known from an essay by D. Poole and D. Barker with the title “Digitally coded track circuit", the content of which at the international conference "Electric Railway Systems for a New Century", which took place from September 22nd to 25th 1987, was held in London, England, and was also printed as conference paper (IEE, London, England, 1987, pp xii + 400.).
  • a correlation of the modulation signal obtained on the receiver side with a target signal known to the track circuit receiver and modulated on the track current on the transmitter side is carried out here.
  • So-called gold codes which have particularly well-defined autocorrelation properties, are used as modulation signals.
  • Such a track circuit is also known from "Signal + Draht" 81 (1989) Issue 7/8, pages 158 ff.
  • a code comparator is used to compare the modulation signal obtained on the receiver side with a target code used for modulation in the track current circuit transmitter.
  • the known track circuits are complex due to the components required for filtering and demodulation and are not drift-free due to the use of analog techniques.
  • the invention has for its object to provide a track circuit of the type mentioned that does not require special filters and demodulators and works without drift.
  • the track circuit according to the invention no longer requires filter components, since the cross-correlation itself has an excellent filter effect. Only those signal components of the track voltage contribute to the value of the cross-correlation function which, over time, correspond to the reference voltage synchronous with the modulated output voltage of the track circuit transmitter.
  • the track circuit receiver knows the output voltage of the track circuit transmitter can, for example, as stated in claim 2, be ensured by a direct supply of this output voltage to the track circuit receiver, which is particularly useful when the track circuit transmitter and track circuit receiver are housed in the same subrack.
  • a further development of the invention is specified in claim 3 and provides for the output of the finished modulated track circuit end signal from a pre-programmed read-only memory. This saves a special modulator for modulating a track current carrier signal. Since the track current circuit end signal is available here in digital form, it does not represent a major effort to transmit it in digital form as a reference signal to the receiver. The transmission is thus less susceptible to interference. A special A / D conversion in the track circuit receiver with digitally working correlator is not necessary.
  • An embodiment of the invention reproduced in claim 4 relates to the conversion of the track current circuit end signal stored in digital form into a control signal for a track current source.
  • patent claim 7, which refers back to patent claims 5 and 6, provides for the generation of the reference voltage required by the correlator in the track circuit receiver with the aid of a read-only memory which is preprogrammed in the same way as the read-only memory of the track circuit transmitter and with a reading frequency of the track circuit transmitter which is the same frequency Clock is read out.
  • This eliminates the need for a transmission line between the track circuit transmitter and the track circuit receiver. The latter is particularly advantageous when the track circuit transmitter and the track circuit receiver are to be accommodated in a spatially separate manner.
  • Claim 8 relates to a possibility of distinguishing a busy message due to real occupancy of the track circuit from a busy message due to a fault (e.g. overloading of the track circuit receiver input when the loop is interrupted).
  • a development of the invention specified in claim 9 relates to simplification in the direct transmission of a reference signal from the track circuit transmitter to the track circuit receiver.
  • Claim 10 finally, relates to the use of a computer for performing the correlator function and evaluating the correlator output voltage.
  • FIG. 1 shows a track GL, the rails SCH of which are electrically connected to one another by two rail connectors (so-called S connectors) SV1 and SV2.
  • the rail connectors are short-circuits, which firstly allow the drive reverse current to be equalized between the two rails and secondly form electrical isolating joints that each separate two adjacent track circuits.
  • a track section GA lying between the two rail connectors SV1 and SV2 is secured by a track circuit. It is fed at a feed point ES by a track current circuit transmitter S via a first coupling loop KS1, which is inductively coupled to the rails and the rail connector SV1, with a modulated track current.
  • the track current flows via the rail connector SV2 located at an exit point AS and induces a track voltage in a second coupling loop KS2 which is inductively coupled to the rail connector SV2 and the rails and is evaluated by a track circuit receiver E.
  • Further coupling loops KS3, KS4 shown in FIG. 1 belong to neighboring track circuits.
  • a signal line L connects the track current circuit transmitter S and the track circuit receiver E to one another and is used for the transmission of synchronization signals or code selection signals.
  • a direct feed-in and feed-out or a direct feed-in with inductive coupling-out can also be provided. The latter is e.g. common in middle-fed double track circuits.
  • the track circuit receiver E then outputs a track clear signal via a track clear signal channel GF to an interlocking SW if the track voltage picked up via the coupling loop KS2 exceeds a predetermined threshold value and additionally has the modulation impressed on the track current by the track current circuit transmitter. If the track circuit is short-circuited by axles of a vehicle, the track voltage drops below the threshold value and a busy message is output to the signal box via a track occupancy signaling channel GB.
  • the track circuit shown schematically in Fig. 1 and implemented in a known manner contains a large number of components, e.g. Tuning modules and input filters that ensure the selective reception of the track current frequency and other frequencies, e.g. filter out the different track current frequencies of the neighboring tracks.
  • the tuning modules and input filters must be specially designed for each track current frequency and individually adapted to each track circuit.
  • a track circuit transmitter is shown schematically how it can be used in a track circuit according to the invention.
  • transmission signal sequences are stored in advance in the form of a sequence of bytes in a programmable read-only memory PLC. Each byte contained in the memory specifies a very specific amplitude value of the transmission signal.
  • a clock generator TG controls two counters Z1 and Z2, the counter Z2 directly and the counter Z1 via a divider TL.
  • the counter Z1 outputs a sequence of addresses of the bytes stored in the read-only memory and thus ensures that a corresponding sequence of bytes is output on the adjustable counter Z2.
  • This sequence of bytes if it is dense enough, e.g. 10 bytes per carrier period already represents the finished (modulated) transmission signal, which, repeated cyclically, only needs to be converted into an analog signal and amplified by a low-pass filter in order to be fed into the track GL.
  • the counter Z2 takes care of the D / A conversion if it is preset in parallel by each byte read in and is clocked back by the fast clock of the clock generator and, for example, L- during the clocking back. Outputs signal at its output. It thus generates a pulse width modulated analog signal at its output, which can be used directly to control a track power source.
  • the read-only memory can easily be designed so large that several different transmission signal cycles are stored and e.g. can be selected using a selector switch TA, not shown, using the higher-order address bits of the memory. Different track current profiles can thus be assigned to neighboring track circuits.
  • the output signal of the read-only memory is additionally transmitted in digital form to the track circuit receiver E via a data line L1 and is fed there to a correlator which carries out a cross-correlation between a track voltage tapped at the exit point of the track section and the voltage transmitted by the track circuit transmitter.
  • the track voltage is amplified and converted into digital form.
  • a microcomputer is expediently used as the correlator, which has the value of the cross-correlation function For example, calculated over each signal cycle and the shift time 7 adjusted so that KKF becomes maximum.
  • the computer also evaluates the height of the maximum in relation to a predetermined, permanently stored threshold value and emits a track vacancy signal if the maximum of the cross-correlation function exceeds the threshold value. If the maximum of the cross-correlation function remains below the threshold value, the track section is reported occupied. An additional error message is issued if a high RMS value of the track voltage is determined, but the correlation function has a low maximum value.
  • the RMS value of the track voltage can be determined by calculating the autocorrelation function of the track voltage signal, the value of which corresponds to the RMS value.
  • FIG. 3 shows a track circuit receiver which, as described above, has a computer R as a correlator and an A / D converter W for converting the track voltage tapped at track GL into digital form.
  • the computer gets its work cycle from a quartz-stabilized clock generator TG1. However, the computer does not receive its reference signal required for correlation with the track voltage signal from the track current circuit transmitter, but from a receiver-side read-only memory SPE, the size and content of which corresponds exactly to the read-only memory PLC of the track current circuit transmitter.
  • the computer controls the output of the respectively selected signal cycle via a bus B and reads it in as a reference signal.
  • the signal read out by the computer R from the memory SPE corresponds exactly to the transmission signal of the track circuit transmitter and can be used as a reference signal . Small deviations in the quartz frequencies of the two clock generators are corrected by tracking the time shift 7 when determining the maximum of the cross-correlation function.
  • the track circuit receiver according to FIG. 3 thus enables the output of a track vacancy signal to a track vacancy detection channel GF, a track occupancy report to a track occupancy reporting channel GB and a fault report to a fault reporting channel ST without requiring an additional direct connection between the track circuit transmitter and the track circuit receiver.

Landscapes

  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Mechanical Engineering (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Holo Graphy (AREA)
  • Testing Of Coins (AREA)
  • Golf Clubs (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
EP91112161A 1990-08-09 1991-07-20 Circuit de voie avec corrélation croisée Expired - Lifetime EP0470416B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4025194 1990-08-09
DE4025194A DE4025194A1 (de) 1990-08-09 1990-08-09 Gleisstromkreis mit kreuzkorrelation

Publications (3)

Publication Number Publication Date
EP0470416A2 true EP0470416A2 (fr) 1992-02-12
EP0470416A3 EP0470416A3 (en) 1993-05-12
EP0470416B1 EP0470416B1 (fr) 1994-10-12

Family

ID=6411893

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91112161A Expired - Lifetime EP0470416B1 (fr) 1990-08-09 1991-07-20 Circuit de voie avec corrélation croisée

Country Status (4)

Country Link
EP (1) EP0470416B1 (fr)
AT (1) ATE112735T1 (fr)
DE (2) DE4025194A1 (fr)
ES (1) ES2065584T3 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1473209A2 (fr) 2003-04-30 2004-11-03 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'une aiguillage ou d'une section de voie
EP1746008A3 (fr) * 2005-07-20 2007-09-19 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'un aiguillage ou d'une section de voie
EP1746009A3 (fr) * 2005-07-20 2007-09-19 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'un aiguillage ou d'une section de voie
CZ303498B6 (cs) * 2008-11-26 2012-10-24 Ažd Praha S. R. O. Zpusob úpravy kolejového a referencního napetí pro napájení dvoufázových paralelních kolejových obvodu pro železnici

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4732355A (en) * 1986-01-09 1988-03-22 General Signal Corporation Rate code decoding system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1473209A2 (fr) 2003-04-30 2004-11-03 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'une aiguillage ou d'une section de voie
EP1473209A3 (fr) * 2003-04-30 2007-09-12 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'une aiguillage ou d'une section de voie
EP1746008A3 (fr) * 2005-07-20 2007-09-19 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'un aiguillage ou d'une section de voie
EP1746009A3 (fr) * 2005-07-20 2007-09-19 Siemens Aktiengesellschaft Circuit pour surveiller l'occupation d'un aiguillage ou d'une section de voie
CZ303498B6 (cs) * 2008-11-26 2012-10-24 Ažd Praha S. R. O. Zpusob úpravy kolejového a referencního napetí pro napájení dvoufázových paralelních kolejových obvodu pro železnici

Also Published As

Publication number Publication date
ES2065584T3 (es) 1995-02-16
DE4025194A1 (de) 1992-02-13
EP0470416B1 (fr) 1994-10-12
ATE112735T1 (de) 1994-10-15
DE59103215D1 (de) 1994-11-17
EP0470416A3 (en) 1993-05-12

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