EP0484360A1 - Circuit de commutation electrique. - Google Patents

Circuit de commutation electrique.

Info

Publication number
EP0484360A1
EP0484360A1 EP90910728A EP90910728A EP0484360A1 EP 0484360 A1 EP0484360 A1 EP 0484360A1 EP 90910728 A EP90910728 A EP 90910728A EP 90910728 A EP90910728 A EP 90910728A EP 0484360 A1 EP0484360 A1 EP 0484360A1
Authority
EP
European Patent Office
Prior art keywords
input
current
transistor
output
electrical circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP90910728A
Other languages
German (de)
English (en)
Other versions
EP0484360B1 (fr
Inventor
Heinz Rinderle
Rolf Boehme
Guenter Gleim
Elke Roesch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefunken Electronic GmbH
Deutsche Thomson Brandt GmbH
Original Assignee
Telefunken Electronic GmbH
Deutsche Thomson Brandt GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Electronic GmbH, Deutsche Thomson Brandt GmbH filed Critical Telefunken Electronic GmbH
Publication of EP0484360A1 publication Critical patent/EP0484360A1/fr
Application granted granted Critical
Publication of EP0484360B1 publication Critical patent/EP0484360B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/59—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

Definitions

  • the invention relates to an electrical circuit with a plurality of current-voltage converters, the parameters of which depend in approximately the same way on external factors.
  • the transmission resistance of a current-voltage converter depends on the temperature and other influencing variables.
  • the temperature dependency in integrated circuits is particularly pronounced because of the strong changes in diffused or implanted resistors.
  • the invention solves this problem in that one of the IU converters is provided as a reference IU converter, in that its transmission resistance is compared with the value of a reference resistor and in that a comparison criterion is used for setting the transmission resistance of all IU converters is derived.
  • Figure 1 shows a first embodiment of the invention
  • Figure 2 shows a simple way of generating the reference current
  • Figure 4 shows the symmetry of the reference voltage
  • FIG. 5a shows the electricity generation for the balancing
  • FIG. 5b shows the power generation with reversal of direction for the metering
  • Figure 6 shows the breakdown of the IU converter into an input stage, a control stage and an output stage
  • Figure 7 shows an IU converter with discretely controlled transmission resistance.
  • an integrated circuit contains several, but at least two, IU converters Wr, W1, ..., Wn.
  • Each IU converter has a current-sensitive, preferably low-input, a live output and a control input.
  • One of the IU converters is provided as a reference IU converter Wr.
  • a reference current Iref is generated in a reference current source Iq by means of a reference voltage source Uref and a reference resistor Rref and is supplied to the input of the reference IU converter Wr.
  • the first input of a comparator V1 is connected to the output of the reference IU converter Wr and the second input is connected to the reference voltage source Uref.
  • the control inputs of all IU converters Wr, Wl, ..., Wn are connected to the output of the comparator V1.
  • the reference resistance Rref lies between the reference voltage source Uref and the input of the reference IU converter Wr. With this arrangement, the potential at the input of the reference IU converter Wr must be equal to the potential of the ground terminal. If the reference resistor Rref is connected externally, two connections are required on the integrated circuit.
  • a differential amplifier Vd controls two current sources Iq1 and Iq2, which are shown here in the form of two transistors T1 and T2 with emitter resistors R1 and R2.
  • the output of the differential amplifier Vd is connected to the bases of the transistors T1 and T2.
  • the emitter resistors R1 and R2 lead to a common supply voltage source Ub1.
  • the collector of the first transistor T1, which corresponds to the output of the first current source Iq1 is connected to the reference resistor Rref and the first input terminal of the differential amplifier Vd.
  • the Kollek ⁇ gate of the second transistor T2, which corresponds to the output of the second current source Iq2, the reference IU converter Wr is connected to the input.
  • the voltage drop across the reference resistor Rref must be equal to the reference voltage Urefi.
  • the current required for this is supplied by the first current source Iq1.
  • the current Iref to the input of the reference IU wall Lers Wr is supplied by the second current source Iq2.
  • the current sources Iq1 and Iq2 can be dimensioned in such a way that their currents are identical to one another or that what is indicated by emp Chen IU converters is advantageous, the current Iref is a fraction K1 of the current through the reference resistor Rref.
  • stabilization can be significantly better than with a chip-based resistance can be achieved.
  • symmetrical signals are preferred.
  • the reference IU converter Wr supplies the output signal Ur to two connection terminals with opposite polarity, the instantaneous voltage of both output terminals being dependent on the temperature or other influencing factors.
  • a comparison of the symmetrical output signal Ur of the reference IU converter Wr with the asymmetrical reference voltage Uref must therefore be carried out.
  • this can be done by a differential stage comprising two transistors T3 and T4, which is fed by a current source Iv, the current source Iv being dependent on the reference voltage Uref.
  • An emitter resistor R3 is connected upstream of one of the two transistors.
  • the bases of the transistors T3 and T4 are connected to the output terminals of the reference IU converter Wr.
  • the collectors of the transistors T3 and T4 are connected to a current mirror Ssp.
  • a signal Uv is taken from the output A of the current mirror Ssp, which e.g. is converted into a control signal Sr by an output amplifier.
  • the function of this part of the comparator V1 results from the fact that, in the case of a mirror ifactor one of the current mirror Ssp and, in the balanced state, the rain Isch Lei fe, the same currents Iv / 2 flow through the two branches with the transistors T1 and T2 and that the voltage Ur must therefore be equal to the voltage drop Ur3 across the resistor R3.
  • the current Iv is shown in FIG. 5 - "formed by the reference voltage Uref In figure-5a i st ⁇ n ⁇ Di ⁇ ei fferenzverEntr V2 vorge see, whose first input is connected to the one pole of the voltage source Uref Referenzspan-, whose second input is connected to the one terminal of a reference resistor Rref2 and the output thereof is connected to the base of a current source transistor T5, and the emitter of the current source transistor T5 is connected to the second input of the D fference amplifier V2 connected.
  • the other pole of the reference voltage source Uref and the other connection of the reference resistor Rref2 are at ground or at a reference point.
  • the voltage drop across the reference resistor Rref2 becomes equal to the reference voltage Uref.
  • the current that can be drawn from the collector of the current source transistor T5 then corresponds to the current through the reference resistance Rref2, except for the low base current.
  • the circuit from FIG. 5b differs from the circuit from FIG. 5a in the arrangement of the current source transistor T5, the collector of which is connected here to the second input of the differential amplifier V2, while the emitter represents the current source Len output Ai. While in FIG. 5a the second input of the differential amplifier V2 is of the inverting type, in FIG. 5b it must not be inverting. FIG. 5b also shows how a current source can be formed in the opposite direction.
  • a resistor R5 is connected between the output Ai _and a _Versorgungssj3annungsttle Ub2 ge ⁇ cha ltet._
  • the Ba ⁇ s e ls of a further transistor T6 is connected to the output of Diffe ⁇ ence amplifier V2.
  • a resistor R6 lies between the supply voltage source Ub2 and the emitter of the transistor T6.
  • the output current Iv in the opposite direction is taken from the collector of transistor T6, which is referred to as output Aj.
  • the i-th IU converter is composed of an input stage Wai, a differential stage Wbi and an output stage Wci.
  • the input stage Wai converts the input current Ii into a voltage Uai.
  • the differential stage Wbi lying between the input stage Wai and the output stage Wci is made up of bipolar transistors T7 and T8, the bases of which are connected to the output of the input stage Wai, the emitters of which are connected to a current source Ibi and the collectors of which are connected to the inputs of the Output stage Wci are connected.
  • the output stage Wci forms the output voltage Ui from the Ko L detector currents of the differential stage Wbi.
  • the mode of operation is based on the fact that the steepness of the differential stage and thus its amplification is proportional to the current of the current source Ibi.
  • the current Ibi In order to ensure that the i-th converter Wi has K times the transmission resistance compared to the reference IU converter Wr, the current Ibi must assume the K times the value of the current Ibr of the reference IU converter Wr. The technical means for this are known and therefore need not be described here. The possibility of making the factor K variable and thus controllable is included.
  • FIG. 7 One possibility of making the transmission resistance discretely controllable and thus programmable is shown in FIG. 7.
  • Several differential stages made of bipolar transistors T71 ,. T81; T72, T82; T73, T83; ... are connected on the input side to the Wai input section and on the output side to the Wci output section. They are fed by current sources Ib1, Ib2, Ib3 ... which can be switched on and off by controllable switches S1, S2, S3 ... If for the transistors T71, T81; T72, T82; T73, T83; ... the differential stages emitter resistors R71, R81; R72, R82; R73, R83; ... are provided, the linearity and other properties are improved.
  • the steepness of the middle part Wbi results from the sum of the steepness of the differential stages switched on.
  • the slope can be changed in stages by means of the controllable switches K1, K2, K3,. It is particularly advantageous to select the currents Ib1, Ib2, Ib3, ... in accordance with a sequence of potencies to the base 2. If emitter resistors are provided, their values must be assigned inversely. In addition, it is recommended that the areas of the transistors T71, T81; T72, T82; ... also staggered in the ratio of the currents, because this enables maximum accuracy and stability to be achieved.

Landscapes

  • Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)
  • Networks Using Active Elements (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Paper (AREA)
  • Manufacture And Refinement Of Metals (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

Est décrit un circuit de commutation électrique comportant une pluralité de transformateurs de tension. L'impédance de transfert d'un transformateur de tension dépend fortement de la température , notamment dans des circuits intégrés. Afin de supprimer la dérive de l'impédance de transfert dans une pluralité de transformateurs de tension (Wr, W1, ..., Wn), un des transformateurs est un transformateur de tension de courant de référence (Wr), dont l'impédance de transfert est comparée à une résistance de référence (Rref). Le résultat sert à déduire un critère permettant de régler l'impédance de transfert de tous les transformateurs de tension de courant (Wr, W1, ..., Wn). Application à des circuits intégrés dotés d'une pluralité de transformateurs de tension.
EP90910728A 1989-07-27 1990-07-04 Circuit de commutation electrique Expired - Lifetime EP0484360B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE3924804A DE3924804A1 (de) 1989-07-27 1989-07-27 Elektrischer schaltkreis
DE3924804 1989-07-27
PCT/EP1990/001067 WO1991002301A1 (fr) 1989-07-27 1990-07-04 Circuit de commutation electrique

Publications (2)

Publication Number Publication Date
EP0484360A1 true EP0484360A1 (fr) 1992-05-13
EP0484360B1 EP0484360B1 (fr) 1995-01-04

Family

ID=6385923

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90910728A Expired - Lifetime EP0484360B1 (fr) 1989-07-27 1990-07-04 Circuit de commutation electrique

Country Status (15)

Country Link
US (1) US5245218A (fr)
EP (1) EP0484360B1 (fr)
JP (1) JP2871850B2 (fr)
KR (1) KR0135629B1 (fr)
CN (1) CN1043272C (fr)
AT (1) ATE116750T1 (fr)
AU (1) AU6073890A (fr)
DD (1) DD295441A5 (fr)
DE (2) DE3924804A1 (fr)
FI (1) FI920357A7 (fr)
HK (1) HK106397A (fr)
HU (1) HU218058B (fr)
MY (1) MY107257A (fr)
TR (1) TR25653A (fr)
WO (1) WO1991002301A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930010834A (ko) * 1991-11-25 1993-06-23 프레데릭 얀 스미트 기준 전류 루프
JP3102396B2 (ja) 1997-12-03 2000-10-23 日本電気株式会社 電圧制御発振回路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3956638A (en) * 1974-12-20 1976-05-11 Hughes Aircraft Company Battery paralleling system
US3986101A (en) * 1975-03-10 1976-10-12 Ncr Corporation Automatic V-I crossover regulator
US4032830A (en) * 1975-07-03 1977-06-28 Burroughs Corporation Modular constant current power supply
CH659156A5 (en) * 1982-11-30 1986-12-31 Hasler Ag Method for the protected supply of a load with a rectified DC voltage
US4618779A (en) * 1984-06-22 1986-10-21 Storage Technology Partners System for parallel power supplies

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9102301A1 *

Also Published As

Publication number Publication date
CN1049065A (zh) 1991-02-06
JP2871850B2 (ja) 1999-03-17
DE59008203D1 (de) 1995-02-16
US5245218A (en) 1993-09-14
JPH05501180A (ja) 1993-03-04
KR0135629B1 (ko) 1998-05-15
HUT60046A (en) 1992-07-28
ATE116750T1 (de) 1995-01-15
FI920357A0 (fi) 1992-01-27
KR920704210A (ko) 1992-12-19
EP0484360B1 (fr) 1995-01-04
HU218058B (hu) 2000-05-28
AU6073890A (en) 1991-03-11
HU9200206D0 (en) 1992-04-28
TR25653A (tr) 1993-07-01
WO1991002301A1 (fr) 1991-02-21
HK106397A (en) 1997-08-22
CN1043272C (zh) 1999-05-05
MY107257A (en) 1995-10-31
DE3924804A1 (de) 1991-01-31
FI920357A7 (fi) 1992-01-27
DD295441A5 (de) 1991-10-31

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