EP0533113A2 - Verfahren zur Herstellung einer Dünnschicht aus Hg1-xCdxTe - Google Patents

Verfahren zur Herstellung einer Dünnschicht aus Hg1-xCdxTe Download PDF

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Publication number
EP0533113A2
EP0533113A2 EP92115775A EP92115775A EP0533113A2 EP 0533113 A2 EP0533113 A2 EP 0533113A2 EP 92115775 A EP92115775 A EP 92115775A EP 92115775 A EP92115775 A EP 92115775A EP 0533113 A2 EP0533113 A2 EP 0533113A2
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EP
European Patent Office
Prior art keywords
film
buffer layer
substrate
manufacturing
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP92115775A
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English (en)
French (fr)
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EP0533113A3 (en
Inventor
Tokuhito Sasaki
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NEC Corp
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NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of EP0533113A2 publication Critical patent/EP0533113A2/de
Publication of EP0533113A3 publication Critical patent/EP0533113A3/en
Withdrawn legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/002—Controlling or regulating
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/46—Sulfur-, selenium- or tellurium-containing compounds
    • C30B29/48—AIIBVI compounds wherein A is Zn, Cd or Hg, and B is S, Se or Te
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2907—Materials being Group IIIA-VA materials
    • H10P14/2911—Arsenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3224—Materials thereof being Group IIB-VIA semiconductors
    • H10P14/3232—Tellurides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3424—Deposited materials, e.g. layers characterised by the chemical composition being Group IIB-VIA materials
    • H10P14/3432—Tellurides
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/901—Levitation, reduced gravity, microgravity, space
    • Y10S117/902—Specified orientation, shape, crystallography, or size of seed or substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/064—Gp II-VI compounds

Definitions

  • This invention relates to a method of manufacturing Hg 1-x Cd x Te (also, hereinafter referred to as HgCdTe), and in more particular to a method of using a GaAs(211)B substrate and growing a CdTe buffer layer and a thin HgCdTe infrared detection layer on the substrate with high crystalline quality.
  • HgCdTe Hg 1-x Cd x Te
  • GaAs was used as a substrate material for a HgCdTe infrared detector
  • mainly the (100) plane and GaAs surfaces tilted slightly away from the (100) plane were used, and depending on the substrate heat treatment temperature and substrate heat treatment during exposure to a Te flux or Arsenic flux, a CdTe buffer layer was selected to be grown in the (100) or (111) orientation on the substrate, and a HgCdTe infrared detection layer was grown in either of these plane orientations on the substrates.
  • the prescribed substrate temperature is set within the range of not less than 200 o C and less than 290 o C to control the CdTe plane orientation to be a (211)B orientation and it is set within the range between 300 o C and 360 o C to control the CdTe plane orientation to be a (133) orientation, whereby crystalline quality can be improved.
  • the above subscript "x" is preferably within the range between about 0.17 and about 0.7.
  • a method of manufacturing an infrared detector material on a GaAs(211)B substrate through a CdTe buffer layer in which the surface of the substrate is exposed to a Te flux and heat treatment is performed at a lower temperature when compared to a (100) GaAs substrate, making it possible to prevent surface roughness which occurs due to the heat treatment.
  • the CdTe buffer layer is formed on the treated GaAs(211)B substrate, it is possible to control the plane orientation for growth using the specified substrate temperature. If the CdTe buffer layer is grown in a (211)B or (133) plane orientation, it is possible to improve the crystalline quality of the buffer layer.
  • Hg 1-x Cd x Te 0 to 1
  • the plane orientations it is possible to control the plane orientations to be the (211)B and (133) orientations by growing the CdTe buffer layers at a substrate temperature of not less than 200 o C and less than 290 o C and at the temperature between 300 o C and 360 o C, respectively.
  • the subscript "x" of Hg 1-x Cd x Te is selected to detect an intended infrared wavelengh range.
  • the CdTe buffer layer is grown in the (211)B or (133) plane orientation, whereby it is possible to deposit layers of good quality crystals to form a HgCdTe infrared detector with the same orientation.
  • the HgCdTe film is formed using a molecular-beam epitaxy (MBE) device, it is possible to monitor the condition of the crystal surface using high speed electron diffraction.
  • MBE molecular-beam epitaxy
  • the substrate temperature was kept in the range of not less than 200 o C and less than 290 o C, such as 220 o C, 250 o C, 270 o C and 280 o C, and preferably in the range between 270 o C and 290 o C, it was possible to control the growth of the CdTe buffer layer on the above treated surface to the (211) plane orientation with high crystalline quality.
  • the above preferable range is selected to keep reproducibility with respect of the (211) plane orientation and high crystalline quality.
  • the substrate temperature was kept in the range between 300 o C and 360 o C, such as 300 o C, 335 o C, 340 o C and 355 o C, and preferably in the range between 310 o C and 330 o C, it was possible to control the growth of the CdTe buffer layer thereon to the (133) plane orientation with high crystalline quality.
  • the defect such as numerous fine projections appears on the crystal surface. Therefore, the above preferable range is selected to keep reproducibility with respect of the (133) plane orientation and high crystalline quality. If the substrate temperature was kept in the range of 290 o C to 300 o C, it is quite hard to reproduce the same plane orientation as before.
  • Table 1 T substrate ( o C) DCRC-FWHM (arcsec.) Growth orientation 190 300 (211) 220 127 (211) 250 287 (211) 270 107 (211) 280 121 (211) 300 78 (133) 335 108 (133) 340 126 (133) 355 98 (133) 365 142 (133)
  • the ordinate axis of the diagram shows the evaluated crystalline quality based on X-ray double-crystal rocking curves (DCRCs) and the transverse axis shows the substrate temperature.
  • DCRCs X-ray double-crystal rocking curves
  • the substrate temperature it was possible to control the plane orientation for growth to be either the (211) or (133) orientation. If the substrate temperature was kept in the preferable range mentioned above to grow the CdTe buffer layer, the growth of the CdTe buffer layer on the substrate could be more satisfactorily or selectively controlled to the desired plane orientations.
  • the substrate temperature was kept out of the above ranges, i.e. at 190 o C and 365 o C, the crystalline quality of thus obtained CdTe was low as compared with that of CdTe grown according to this invention and thus was not efficient in the art.
  • FIG. 2 shows the evaluation result on CdTe using X-ray double-crystal rocking curve when the CdTe was grown in the (133) orientation on the GaAs(211)B substrate at 330 o C. From the diagram, it can be seen that CdTe having high crystalline quality with a full width at half maximum (FWHM) of approximately 60 sec. was obtained. This type of result could not be obtained for the prior GaAs(100) oriented substrate or for the prior GaAs substrate slightly tilted with respect to the substrate (refer to K. Zanio, SPIE, Vol. 1308, "Infrared Detectors and Focal Plane Arrays", (1990) 184).
  • the crystalline quality of the buffer layer determines the quality of the crystal film formed on top of it.
  • the CdTe buffer layer having high crystalline quality for specific growth orientations.
  • HgCdTe was grown on this good quality buffer layer as a base at a substrate temperature of about 1800 to about 200 o C, it was possible to form a HgCdTe layer having high crystalline quality. In this way it was possible to form a high quality HgCdTe layer and it can be expected that the operation characteristics of this layer be good.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Light Receiving Elements (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
EP92115775A 1991-09-19 1992-09-15 Method of manufacturing a thin hg1-xcdxte film Withdrawn EP0533113A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP238465/91 1991-09-19
JP3238465A JP2795002B2 (ja) 1991-09-19 1991-09-19 ＨｇＣｄＴｅ薄膜の製造方法

Publications (2)

Publication Number Publication Date
EP0533113A2 true EP0533113A2 (de) 1993-03-24
EP0533113A3 EP0533113A3 (en) 1995-02-08

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP92115775A Withdrawn EP0533113A3 (en) 1991-09-19 1992-09-15 Method of manufacturing a thin hg1-xcdxte film

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US (1) US5290394A (de)
EP (1) EP0533113A3 (de)
JP (1) JP2795002B2 (de)

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US5906859A (en) * 1998-07-10 1999-05-25 Dow Corning Corporation Method for producing low dielectric coatings from hydrogen silsequioxane resin
US7011868B2 (en) * 2000-03-20 2006-03-14 Axcelis Technologies, Inc. Fluorine-free plasma curing process for porous low-k materials
US6759098B2 (en) 2000-03-20 2004-07-06 Axcelis Technologies, Inc. Plasma curing of MSQ-based porous low-k film materials
US6576300B1 (en) 2000-03-20 2003-06-10 Dow Corning Corporation High modulus, low dielectric constant coatings
US6913796B2 (en) * 2000-03-20 2005-07-05 Axcelis Technologies, Inc. Plasma curing process for porous low-k materials
US6558755B2 (en) 2000-03-20 2003-05-06 Dow Corning Corporation Plasma curing process for porous silica thin film
US6756085B2 (en) * 2001-09-14 2004-06-29 Axcelis Technologies, Inc. Ultraviolet curing processes for advanced low-k materials
GB0407804D0 (en) * 2004-04-06 2004-05-12 Qinetiq Ltd Manufacture of cadmium mercury telluride
JP2008508741A (ja) * 2004-08-02 2008-03-21 キネテイツク・リミテツド パターン加工済みのシリコン上でのテルル化カドミウム水銀の製造
CN102867859B (zh) * 2012-09-06 2015-07-29 中国电子科技集团公司第十一研究所 双色红外探测材料的制备方法及系统
CN106029556B (zh) 2014-04-09 2019-06-18 美国陶氏有机硅公司 疏水制品
CN106461811B (zh) 2014-04-09 2019-03-12 美国陶氏有机硅公司 光学元件

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US4648917A (en) * 1985-08-26 1987-03-10 Ford Aerospace & Communications Corporation Non isothermal method for epitaxially growing HgCdTe
US4960728A (en) * 1987-10-05 1990-10-02 Texas Instruments Incorporated Homogenization anneal of II-VI compounds
JPH0779087B2 (ja) * 1991-03-27 1995-08-23 株式会社エイ・ティ・アール光電波通信研究所 ＧａＡｓ（１１１）Ａ面基板の表面処理方法

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JPH0570936A (ja) 1993-03-23
US5290394A (en) 1994-03-01
EP0533113A3 (en) 1995-02-08
JP2795002B2 (ja) 1998-09-10

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