EP0793159A2 - Circuit pour générer une tension d'alimentation - Google Patents

Circuit pour générer une tension d'alimentation Download PDF

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Publication number
EP0793159A2
EP0793159A2 EP97101955A EP97101955A EP0793159A2 EP 0793159 A2 EP0793159 A2 EP 0793159A2 EP 97101955 A EP97101955 A EP 97101955A EP 97101955 A EP97101955 A EP 97101955A EP 0793159 A2 EP0793159 A2 EP 0793159A2
Authority
EP
European Patent Office
Prior art keywords
voltage
supply voltage
input
circuit arrangement
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP97101955A
Other languages
German (de)
English (en)
Other versions
EP0793159B1 (fr
EP0793159A3 (fr
Inventor
Roland Schropp
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Germany GmbH
Original Assignee
Temic Telefunken Microelectronic GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Temic Telefunken Microelectronic GmbH filed Critical Temic Telefunken Microelectronic GmbH
Publication of EP0793159A2 publication Critical patent/EP0793159A2/fr
Publication of EP0793159A3 publication Critical patent/EP0793159A3/fr
Application granted granted Critical
Publication of EP0793159B1 publication Critical patent/EP0793159B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/462—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators

Definitions

  • the invention relates to a circuit arrangement for generating a supply voltage according to the preamble of claim 1.
  • Such circuit arrangements with a subsequent filter stage are used, for. B. sensors with a voltage that has an improved signal-to-noise ratio compared to the input voltage. Circuit arrangements are usually used for this which keep the supply voltage for the sensor below the input voltage by a certain amount ⁇ U. The amount of the voltage difference ⁇ U is constant. This reduced voltage is fed to a smoothing and filtering stage in order to filter out voltage peaks and fluctuations. If the consumer to be supplied works over a wide range of the input voltage, it is necessary to adapt the amount of the voltage difference ⁇ U by which the input voltage is reduced to the absolute amount of the input voltage. It has turned out to be advantageous to keep the voltage difference with which the supply voltage for the consumer is below the input voltage, as shown in FIG. 2, up to a first value of the input voltage at a first, constant value and from a certain value to keep the input voltage constant at a second, larger value. In the intermediate transition area, the supply voltage remains constant and is independent of the input voltage.
  • the object of the invention is to provide a circuit arrangement for generating a supply voltage with which the course of the supply voltage described above can be achieved in a simple manner as a function of the input voltage.
  • FIG. 1 shows the basic principle of the circuit arrangement according to the invention in a block diagram.
  • the input voltage V IN is connected to the ground potential via the resistor R DU and the controllable current source I 1 .
  • a voltage drop V RDU arises along the resistance.
  • the connection point between the current source I 1 and the resistor R DU is connected to the input of an impedance converter or driver / buffer amplifier.
  • the supply voltage for the consumer is made available at its output. At the same time, this output is connected to the ground potential via a voltage divider consisting of the two resistors R 1 and R 2 .
  • the first input of a comparator stage K is connected at the connection point of the two resistors.
  • the second input of the comparator stage is connected to a reference voltage V REF .
  • the output is connected to the control input of the controllable current source I 1 .
  • the current I 1 is dependent on the output signal of the comparator stage K.
  • the circuit arrangement can assume three states.
  • the control circuit running via the comparator K intervenes and the supply voltage V OUT is kept at a constant value.
  • the supply voltage V OUT is set such that the voltage V T at the connection point of the two resistors R 1 , R 2 of the voltage divider is equal to the reference voltage V REF .
  • a reference current source I REF supplies the current mirror from the input transistor Q A connected as a diode and the two transistors Q B1 and Q B2 with a constant input current I A.
  • the constant input current I A in the integrated variant of the circuit arrangement is dependent on the temperature in such a way that the temperature dependence of the resistance R DU is compensated for. This compensates for the temperature coefficient of the integrated resistor R DU .
  • the emitter of the transistor Q A connected as a diode is connected to the resistor R A with the ground potential.
  • the collector of the first mirror transistor Q B1 is connected to the resistor R DU and the input of the buffer amplifier 1. The emitter is over the resistor R B1 at ground potential.
  • the base is connected to the base of Q A.
  • the emitter-collector path of the second mirror transistor Q B2 is switched off at this operating point.
  • a constant current I C1 therefore flows through this transistor against the ground potential.
  • the size of this current determines the voltage drop V RDU and thus the size of the voltage difference V B for small input voltages.
  • Parallel to the first transistor Q B1 is a second mirror transistor Q B2 , the collector of which is connected to the collector of the first transistor Q B1 and the base of which is connected to the base of the first transistor Q B1 . Its emitter is connected to the ground potential via the resistor R B2 .
  • the emitter of the second transistor Q B2 is also connected to the output of the controllable current source I 2 , which in turn is controlled by the output of the comparator stage.
  • the second transistor Q B2 is switched off because the product I.
  • R * R B2 Tension at emitter Q B2 is greater than the base voltage of Q B2 minus U BE .
  • the current I C1 flows through the first transistor Q B1 through the resistor R DU .
  • An exemplary embodiment for the comparator stage K is also shown in the circuit arrangement according to FIG. It consists of a differential amplifier consisting of transistors Q 3 and Q 4 , the emitters of which are connected to a current source I D , the base of transistor Q 3 having the voltage reference V REF and the base of transistor Q 4 having the voltage at the connection point of the two resistors of the voltage divider is connected.
  • the output of the differential stage is formed by a current mirror consisting of the transistors Q 1 and Q 2 , the current in the collector branch of the transistor Q 3 in the connection point between the second transistor Q B2 of the first current mirror with the resistor R B2 with a certain factor n reflects.
  • the supply voltage V OUT of the circuit arrangement can be used, for example, to supply a voltage to a voltage follower stage whose output voltage can only change at a certain maximum speed.
  • the voltage gap that is always present to the input voltage V IN represents a working range of this subsequent stage. A reduction in the interference on the supply voltage V OUT with respect to the input voltage V IN is thus achieved.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)
EP19970101955 1996-03-01 1997-02-07 Circuit pour générer une tension d'alimentation Expired - Lifetime EP0793159B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19607802 1996-03-01
DE1996107802 DE19607802C2 (de) 1996-03-01 1996-03-01 Schaltungsanordnung zum Erzeugen einer Versorgungsspannung

Publications (3)

Publication Number Publication Date
EP0793159A2 true EP0793159A2 (fr) 1997-09-03
EP0793159A3 EP0793159A3 (fr) 1998-03-11
EP0793159B1 EP0793159B1 (fr) 2008-01-16

Family

ID=7786863

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19970101955 Expired - Lifetime EP0793159B1 (fr) 1996-03-01 1997-02-07 Circuit pour générer une tension d'alimentation

Country Status (2)

Country Link
EP (1) EP0793159B1 (fr)
DE (2) DE19607802C2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6150874A (en) * 1997-02-25 2000-11-21 Temic Telefunken Microelectronic Gmbh Circuit layout and process for generating a supply DC voltage

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19906090C1 (de) * 1999-02-13 2000-05-31 Daimler Chrysler Ag Verfahren zum Erzeugen einer Versorgungsgleichspannung aus einer nicht konstanten Eingangsgleichspannung
TW518825B (en) 2000-10-05 2003-01-21 Benq Corp System to correct the resistance error due to IC process

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2533199C3 (de) * 1975-07-24 1981-08-20 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur Erzeugung einer von Änderungen der Versorgungsspannung unabhängigen Hilfsspannung
DE4131170A1 (de) * 1991-09-19 1993-03-25 Telefunken Electronic Gmbh Vorrichtung zur erzeugung von zwischenspannungen
US5532618A (en) * 1992-11-30 1996-07-02 United Memories, Inc. Stress mode circuit for an integrated circuit with on-chip voltage down converter
JP3071600B2 (ja) * 1993-02-26 2000-07-31 日本電気株式会社 半導体記憶装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6150874A (en) * 1997-02-25 2000-11-21 Temic Telefunken Microelectronic Gmbh Circuit layout and process for generating a supply DC voltage

Also Published As

Publication number Publication date
DE19607802C2 (de) 1999-08-19
DE59712912D1 (de) 2008-03-06
EP0793159B1 (fr) 2008-01-16
EP0793159A3 (fr) 1998-03-11
DE19607802A1 (de) 1997-09-04

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