EP0838800A1 - Méthode et dispositif de commande d'échelle des gris non linéaire - Google Patents

Méthode et dispositif de commande d'échelle des gris non linéaire Download PDF

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Publication number
EP0838800A1
EP0838800A1 EP97116848A EP97116848A EP0838800A1 EP 0838800 A1 EP0838800 A1 EP 0838800A1 EP 97116848 A EP97116848 A EP 97116848A EP 97116848 A EP97116848 A EP 97116848A EP 0838800 A1 EP0838800 A1 EP 0838800A1
Authority
EP
European Patent Office
Prior art keywords
nonlinear
clock
output
display
luminance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97116848A
Other languages
German (de)
English (en)
Inventor
Scott Chiu
Karen E. Jachimowicz
George R. Kelly
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
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Motorola Inc
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Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of EP0838800A1 publication Critical patent/EP0838800A1/fr
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction

Definitions

  • the present invention relates in general to display devices and, more particularly, to gray scale correction of display devices.
  • Communications devices are frequently upgraded to provide greater functionality so that the devices receive and process increasing amounts of data.
  • pagers are reaching a level of complexity that requires a graphics user interface (GUI) to enable a user to control the operation of the pagers.
  • GUI graphics user interface
  • a high resolution, emissive display such as an integrated light-emitting diode (LED) display provides a GUI for viewing graphics images which achieves high visibility at low power levels.
  • Digital luminance data provides information needed for illuminating the LED display pixels to a desired level of brightness.
  • the LED pixels which comprise the LED display are characterized by a linear gray scale in which the LED pixels are illuminated in a finite series of equal luminance steps over the range of possible values of luminance data. Brightness is distinguished from luminance in that luminance is physically measurable whereas brightness is the subjective perception of luminance as viewed by the human eye.
  • a problem with LED displays is that a linear luminance scale does not result in a linear brightness scale because the human eye has a nonlinear, logarithmic response to luminance. At low luminance levels, a small change in luminance is readily perceived as a change in brightness. However, at high luminance levels a comparable luminance change produces almost no perceptible change in brightness.
  • FIG. 1 shows a block diagram of a wireless communications device 100, such as a pager or cellular telephone.
  • Antenna 102, RF circuit 104 and demodulator 106 comprise a receiver circuit portion of wireless communication device 100.
  • Antenna 102 receives a transmitted RF carrier signal which typically is modulated with digital signals such as control data for operating communications device 100 and video data representative of a downloaded image.
  • the RF carrier signal is coupled to RF circuit 104 for tuning and amplification.
  • the amplified RF carrier signal is received by demodulator 106 to recover a four bit, digital, video data stream V DATA at a four conductor output bus 120, which is coupled to a data input of row control circuit 108.
  • the width of output bus 120 can be varied as required by wireless communications device 100, including a single conductor which provides video data stream V DATA in a serial mode.
  • Video data stream V DATA includes digital control information and a stream of four-bit luminance words for displaying a graphics image on display 110.
  • Display 110 is a display device which includes an array of LED devices organized into 72 rows and 120 columns.
  • Display 110 has 72 rows coupled to nodes ROW 0 through ROW 71 and to corresponding outputs of row control circuit 108.
  • Display 110 has 120 columns coupled to nodes COL 0 through COL 119 and to corresponding outputs of column control circuit 112. A LED pixel is illuminated when a column is selected and a row is activated.
  • Column control circuit 112 operates in a column scan mode in which one column of display 110 is selected by providing a column drive signal to display 110 on one of the nodes COL 0 through COL 119 .
  • Column control circuit 112 is repetitively clocked through the columns by a column select signal V COL .
  • the LED pixels in a selected column are activated in parallel by respective outputs of row control circuit 108.
  • Luminance words of video data stream V DATA are loaded into individual driver cells of row control circuit 108 by a system clock V CLOCK typically operating at 1.25 megahertz.
  • System clock V CLOCK is a linear clock signal in that pulses are produced at equal time intervals.
  • Row control circuit 108 controls the luminance of a selected LED pixel based on the value of the luminance word.
  • FIG. 2 shows a normalized graph of luminance and brightness as a function of the magnitude of video data stream V DATA carrying luminance words for driving LED pixels in display 110.
  • Luminance curve 21 shows the luminance produced by a LED pixel as a function of a luminance word. Luminance curve 21 thus represents the gray scale shading of the LED pixel as its luminance is varied over the range of the luminance word. Luminance curve 21 shows luminance to be linearly proportional to the luminance word such that equal increments in the magnitude of the luminance word produce equal increments in the luminance of the LED pixel.
  • Brightness curve 22 shows the brightness of the LED pixel as it appears to a viewer.
  • luminance curve 21 shows gray scale shading objectively in terms of emitted light
  • brightness curve 22 shows the gray scale shading subjectively in terms of a viewer's perception. Note that brightness curve 22 "flattens out” at higher levels, indicating a decreased "gain" of the human eye and an inability to distinguish luminance increments.
  • an LED's brightness rather than its luminance, be linear.
  • a nonlinear correction represented by correction curve 23 is used to offset the nonlinearity of brightness curve 22 to produce a linear brightness function which is collinear with luminance curve 21.
  • Correction curve 23 shows an ideal correction as a continuous function.
  • a luminance word comprises four bits
  • luminance of a LED pixel is produced in sixteen possible magnitudes corresponding to the sixteen possible values of a luminance word.
  • the present invention implements four-bit, nonlinear gray scale shading by generating a discrete approximation of correction curve 23 to precorrect an activating signal prior to driving a LED pixel.
  • Display 110 includes an array of LED devices operating as display pixels organized into 72 rows and 120 columns. Each row is coupled to one of the nodes ROW 0 through ROW 71 , and each column is coupled to one of the nodes COL 0 through COL 119 . Each LED pixel has an anode and cathode uniquely connected to a column and a row for illuminating the LED pixel by driving the column and row with column and row drive signals. For example, LED 202 is illuminated by providing a column drive signal on node COL 0 and a row drive signal to node ROW 1 .
  • a frame is refreshed at a 60.0 hertz rate, or every 16.7 milliseconds.
  • Most LED displays are operated in a text mode in which the individual LEDs are either turned off or turned on to a fixed brightness level, rather than in a graphics mode where the brightness of each LED pixel is variable.
  • video data stream V DATA comprises a sequence of four-bit luminance words which are recovered from video data stream V DATA to control a brightness level of each LED pixel.
  • text mode a single bit in video data stream V DATA controls whether a LED pixel is turned off or turned on for a fixed period when the column is selected. Because more data is transferred in graphics mode than in text mode, more complex circuitry is needed. Graphics mode further requires circuits to convert the luminance word to a variable brightness level in the LED pixel.
  • the present invention produces a variable brightness level in a LED pixel by taking advantage of the integrating response of the human eye.
  • each of the 120 columns is selected for a period of approximately 140 microseconds, or (16.7 milliseconds)/120.
  • a row is active for a period of time determined by the value of the luminance word.
  • the LED pixel is illuminated for the period when the column is selected and the row is active, such that the maximum luminance is produced when the row is active for 140 microseconds. For example, if the luminance word determines that ROW 1 is active for 70.0 microseconds while COL 0 is selected, then LED 202 is illuminated for 70.0 microseconds, thereby producing one-half of the maximum luminance.
  • the human eye effectively integrates the luminance produced by LED 202 and perceives LED 202 as having a reduced brightness.
  • Column control circuit 112 includes a column counter 342 and a column decoder 344.
  • Column counter 342 comprises a seven stage counter whose count is incremented one count on each pulse of column select signal V COL received at a clock input.
  • Column select signal V COL has a period of 140 microseconds.
  • column counter 342 wraps around to a zero count.
  • a seven-bit output provides a binary column address which is decoded by column decoder 344 to sequentially assert a column select signal on nodes COL 0 through COL 119 for selecting a column of display 110. After COL 119 is selected, a column select signal is asserted on COL 0 and the cycle repeats.
  • Row control circuit 108 is shown including a data latch 304, a stack of 72 row drivers 306 and a nonlinear clock circuit 302.
  • Data latch 304 is configured as a serial load, parallel out 72-stage shift register having a data capacity of four bits per stage.
  • Video data stream V DATA is clocked into a serial input of data latch 304 by system clock V CLOCK to produce 72 luminance words at 72 four-bit outputs when data latch 304 is clocked by column select signal V COL .
  • the 72 four-bit outputs are coupled to data inputs of row drivers 306.
  • Row driver 306 is a pulse generator which produces a nonlinear, pulsewidth modulated pulse at one of the nodes ROW 0 through ROW 71 having a pulsewidth determined by the value of the luminance word and nonlinear clock V NLCLOCK .
  • the nonlinear pulse activates a LED pixel for a portion of the column select period to produce a luminance whose gray scale shading is corrected by the nonlinear spacing of pulses of nonlinear clock V NLCLOCK .
  • Nonlinear clock circuit 302 is a clock generator comprising a timeslot data table 362 and a timeslot counter 364.
  • Nonlinear clock circuit 302 has a clock input for receiving system clock V CLOCK running at 1.25 megahertz and an output for providing a free-running nonlinear clock V NLCLOCK to each row driver 306 in the stack of 72 row drivers.
  • system clock V CLOCK produces 174 pulses and nonlinear clock V NLCLOCK generates fifteen clock pulses for each of the values 1-15 of a four-bit luminance word. No pulse is generated if the luminance word equals zero.
  • the fifteen pulses from V NLCLOCK are nonlinearly spaced to provide brightness correction determined by entries in timeslot data table 362.
  • Timeslot data table 362 comprises a plurality of memory locations for storing timeslot data words representing a number of pulses of system clock V CLOCK over one period of column select clock V COL . Following is a list of timeslot data words stored in timeslot data table 362 as well as the incremental spacing between successive pulses of nonlinear clock V NLCLOCK in an embodiment of nonlinear clock circuit 302 to demonstrate the nonlinearity of V NLCLOCK as shown in Table 1 below.
  • Timeslot counter 364 is a parallel load, free-running down counter which is clocked by system clock V CLOCK .
  • Timeslot counter 364 has a load input for receiving a load pulse from column select signal V COL when a new column is selected.
  • Column select signal V COL loads a timeslot data word into timeslot counter 364.
  • Timeslot counter 364 is decremented by system clock V CLOCK and, when a zero count is reached, a pulse of nonlinear clock signal V NLCLOCK is produced at the output of timeslot counter 364 and the next timeslot data word is loaded. The cycle repeats with a pulse of nonlinear clock V NLCLOCK being generated after system clock V CLOCK counts the timeslot data word to decrement timeslot counter to zero.
  • an alternative embodiment stores the number of pulses between successive pulses of V NLCLOCK in a timeslot data table and a separate segment data table stores the number of pulses of V NLCLOCK which are equally spaced.
  • a parallel load, free-running segment counter can be decremented by the output of the timeslot counter.
  • FIG. 4 shows further detail of row driver 306 driving node ROW 0 , including a pulse modulation counter 402, a compare circuit 404 and a R-S flip-flop 406.
  • Pulse modulation counter 402 is a free-running up counter which counts from 0-15 in response to nonlinear clock V NLCLOCK .
  • Pulse modulation counter 402 produces a four-bit binary count at a four-bit output which is coupled to a first input of compare circuit 404.
  • a second input of compare circuit 404 receives a luminance word from data latch 304.
  • compare circuit 404 When the value of the luminance word is zero, the output of compare circuit 404 holds flip-flop 406 in a reset state and prevents a nonlinear pulse from being generated.
  • column select signal V COL resets pulse modulation counter 402 to a count of zero and sets flip-flop 406 to begin a nonlinear pulse at node ROW 0 .
  • the nonlinear pulse is terminated when the binary count of pulse modulation counter 402 reaches the value of the luminance word and compare circuit 404 resets flip-flop 406.
  • pulse modulation counter 402 is configured as a parallel-loaded down counter such that the luminance word is loaded into pulse modulation counter 402, which decrements to zero to reset flip-flop 406 and terminate the nonlinear pulse.
  • the width of the nonlinear pulse in terms of clock cycles of system clock V CLOCK corresponds to the nonlinear pulse spacing of nonlinear clock V NLCLOCK .
  • the unequal increments of the nonlinear pulses provides the desired gray scale correction to improve the appearance of an image displayed on display 110.
  • a nonlinear clock signal is generated by counting timeslot and segment data words corresponding to a piecewise linear approximation of the desired correction curve.
  • the nonlinear clock increments a counter whose output is compared to the image's luminance data for a corresponding LED pixel, which generates a nonlinear pulse for illuminating the LED pixel.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Picture Signal Circuits (AREA)
  • Controls And Circuits For Display Device (AREA)
EP97116848A 1996-10-24 1997-09-29 Méthode et dispositif de commande d'échelle des gris non linéaire Withdrawn EP0838800A1 (fr)

Applications Claiming Priority (2)

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US74005396A 1996-10-24 1996-10-24
US740053 1996-10-24

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JP (1) JPH10133615A (fr)
KR (1) KR19980033274A (fr)
CN (1) CN1181678A (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0936596A1 (fr) * 1998-02-16 1999-08-18 Canon Kabushiki Kaisha Dispositif et procédé d'affichage utilisant un système de modulation de la largeur d'impulsion avec modulation de l'horloge
FR2821694A1 (fr) * 2001-03-01 2002-09-06 Boris Givone Procede et dispositif permettant d'obtenir une courbe d'energie lumineuse parabolique pour les sources de lumiere electroluminescentes affichant des images sur ecrans geants
US10283037B1 (en) 2015-09-25 2019-05-07 Apple Inc. Digital architecture with merged non-linear emission clock signals for a display panel
US10535296B2 (en) 2015-06-10 2020-01-14 Apple Inc. Display panel redundancy schemes
US10847077B2 (en) 2015-06-05 2020-11-24 Apple Inc. Emission control apparatuses and methods for a display panel

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4012118B2 (ja) * 2003-05-19 2007-11-21 キヤノン株式会社 画像表示装置
CN106486071B (zh) * 2016-12-23 2018-11-27 福州大学 一种电润湿显示器非线性电压幅度灰度调制方法及其装置
CN114898716B (zh) * 2022-05-12 2023-10-27 福州大学 基于电压调制与时间调制协同的高灰阶电润湿显示器件的方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4255793A (en) * 1979-06-11 1981-03-10 The United States Of America As Represented By The United States Department Of Energy Apparatus for generating nonlinear pulse patterns
GB2204174A (en) * 1987-04-23 1988-11-02 Seiko Instr Inc Electro-optical modulator
WO1990003023A1 (fr) * 1988-09-16 1990-03-22 Chips And Technologies, Inc. Methode des echelles de gris et reseau de circuits pour tableau plat d'affichage graphique

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4255793A (en) * 1979-06-11 1981-03-10 The United States Of America As Represented By The United States Department Of Energy Apparatus for generating nonlinear pulse patterns
GB2204174A (en) * 1987-04-23 1988-11-02 Seiko Instr Inc Electro-optical modulator
WO1990003023A1 (fr) * 1988-09-16 1990-03-22 Chips And Technologies, Inc. Methode des echelles de gris et reseau de circuits pour tableau plat d'affichage graphique

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0936596A1 (fr) * 1998-02-16 1999-08-18 Canon Kabushiki Kaisha Dispositif et procédé d'affichage utilisant un système de modulation de la largeur d'impulsion avec modulation de l'horloge
US6947060B2 (en) 1998-02-16 2005-09-20 Canon Kabushiki Kaisha Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method
FR2821694A1 (fr) * 2001-03-01 2002-09-06 Boris Givone Procede et dispositif permettant d'obtenir une courbe d'energie lumineuse parabolique pour les sources de lumiere electroluminescentes affichant des images sur ecrans geants
WO2002071381A1 (fr) * 2001-03-01 2002-09-12 Boris Givone Procede et dispositif permettant d'obtenir une courbe d'energie lumineuse parabolique pour les sources de lumiere electroluminescentes affichant des images sur ecrans geants
US10847077B2 (en) 2015-06-05 2020-11-24 Apple Inc. Emission control apparatuses and methods for a display panel
US11138918B2 (en) 2015-06-05 2021-10-05 Apple Inc. Emission control apparatuses and methods for a display panel
US11568787B2 (en) 2015-06-05 2023-01-31 Apple Inc. Emission control apparatuses and methods for a display panel
US10535296B2 (en) 2015-06-10 2020-01-14 Apple Inc. Display panel redundancy schemes
US11056041B2 (en) 2015-06-10 2021-07-06 Apple Inc. Display panel redundancy schemes
US11568789B2 (en) 2015-06-10 2023-01-31 Apple Inc. Display panel redundancy schemes
US12315418B2 (en) 2015-06-10 2025-05-27 Apple Inc. Display panel redundancy schemes
US10283037B1 (en) 2015-09-25 2019-05-07 Apple Inc. Digital architecture with merged non-linear emission clock signals for a display panel

Also Published As

Publication number Publication date
JPH10133615A (ja) 1998-05-22
CN1181678A (zh) 1998-05-13
KR19980033274A (ko) 1998-07-25

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