EP0849882A3 - Verfahren zum Ermitteln einer Ansteuerspannung für einen spannungsgesteuerten Oszillator in einem Phasenregelkreis - Google Patents

Verfahren zum Ermitteln einer Ansteuerspannung für einen spannungsgesteuerten Oszillator in einem Phasenregelkreis Download PDF

Info

Publication number
EP0849882A3
EP0849882A3 EP97121334A EP97121334A EP0849882A3 EP 0849882 A3 EP0849882 A3 EP 0849882A3 EP 97121334 A EP97121334 A EP 97121334A EP 97121334 A EP97121334 A EP 97121334A EP 0849882 A3 EP0849882 A3 EP 0849882A3
Authority
EP
European Patent Office
Prior art keywords
controlled oscillator
counting
voltage
producing
locked loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP97121334A
Other languages
English (en)
French (fr)
Other versions
EP0849882A2 (de
EP0849882B1 (de
Inventor
Eduard Dipl.-Ing. Zwack
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of EP0849882A2 publication Critical patent/EP0849882A2/de
Publication of EP0849882A3 publication Critical patent/EP0849882A3/de
Application granted granted Critical
Publication of EP0849882B1 publication Critical patent/EP0849882B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail
    • H03L7/146—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail by using digital means for generating the oscillator control signal
    • H03L7/148—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail by using digital means for generating the oscillator control signal said digital means comprising a counter or a divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

Ein durch Phasenvergleich eines Referenztaktsignals (rts) und eines in einem spannungsgesteuerten Oszillator (VCO) gebildeten Oszillatortaktsignals (ts) ermitteltes Vergleichssignal (vs) beeinflußt die Zählrichtung eines m-stufigen Vorwärts-Rückwärts-Zählers (VRZ1,2). Die Zählergebnisse von n-höherwertigen Zählausgängen (ZA) des Vorwärts-Rückwärts-Zählers (VRZ1,2) sowie die Zählergebnisse von n-Zählerausgängen (ZA) eines die Impulse des Oszillatortaktsignals (ts) kontinuierlich zählenden Zählers (Z) werden verglichen und in Abhängigkeit vom Vergleichsergebnis ein pulsdauer- bzw. pulspausenmoduliertes Ansteuersignal (as) erzeugt.
EP97121334A 1996-12-19 1997-12-04 Verfahren zum Ermitteln einer Ansteuerspannung für einen spannungsgesteuerten Oszillator in einem Phasenregelkreis Expired - Lifetime EP0849882B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19653129 1996-12-19
DE19653129A DE19653129C2 (de) 1996-12-19 1996-12-19 Verfahren zum Erzeugen eines Ansteuersignals für einen spannungsgesteuerten Oszillator in einem Phasenregelkreis

Publications (3)

Publication Number Publication Date
EP0849882A2 EP0849882A2 (de) 1998-06-24
EP0849882A3 true EP0849882A3 (de) 2000-11-02
EP0849882B1 EP0849882B1 (de) 2003-08-13

Family

ID=7815433

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97121334A Expired - Lifetime EP0849882B1 (de) 1996-12-19 1997-12-04 Verfahren zum Ermitteln einer Ansteuerspannung für einen spannungsgesteuerten Oszillator in einem Phasenregelkreis

Country Status (2)

Country Link
EP (1) EP0849882B1 (de)
DE (2) DE19653129C2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6271733B1 (en) * 1999-12-13 2001-08-07 Agere Systems Guardian Corp. Integrated oscillator circuit with a memory based frequency control circuit and associated methods
JP4563737B2 (ja) * 2004-07-02 2010-10-13 ルネサスエレクトロニクス株式会社 パルス幅変調回路

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2735053A1 (de) * 1977-08-03 1979-02-08 Siemens Ag Digitaler phasenregelkreis
DE3540178A1 (de) * 1985-11-13 1987-05-21 Telefonbau & Normalzeit Gmbh Schaltungsanordnung zur phasenregelung
EP0321725A2 (de) * 1987-12-22 1989-06-28 Siemens Aktiengesellschaft Verfahren zum Ermitteln einer Ansteuerspannung eines spannungsgesteuerten Oszillators in einem Phasenregelkreis
US5459435A (en) * 1993-09-20 1995-10-17 Fujitsu Limited Frequency synchronous circuit for obtaining original clock signal by removing noise components

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1194538B (it) * 1983-12-23 1988-09-22 Italtel Spa Circuito numerico ad aggancio di fase (pdll)
DE4109046A1 (de) * 1990-04-03 1991-10-10 Licentia Gmbh Digitaler pll-schaltkreis

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2735053A1 (de) * 1977-08-03 1979-02-08 Siemens Ag Digitaler phasenregelkreis
DE3540178A1 (de) * 1985-11-13 1987-05-21 Telefonbau & Normalzeit Gmbh Schaltungsanordnung zur phasenregelung
EP0321725A2 (de) * 1987-12-22 1989-06-28 Siemens Aktiengesellschaft Verfahren zum Ermitteln einer Ansteuerspannung eines spannungsgesteuerten Oszillators in einem Phasenregelkreis
US5459435A (en) * 1993-09-20 1995-10-17 Fujitsu Limited Frequency synchronous circuit for obtaining original clock signal by removing noise components

Also Published As

Publication number Publication date
DE59710575D1 (de) 2003-09-18
EP0849882A2 (de) 1998-06-24
DE19653129C2 (de) 1999-01-28
DE19653129A1 (de) 1998-06-25
EP0849882B1 (de) 2003-08-13

Similar Documents

Publication Publication Date Title
EP0730357A3 (de) Synchronisierung von Frequenz und Rahmen für OFDM
DE1189024T1 (de) Inertial-Drehratensensor und -verfahren mit verbessertem Takten
EP0660562A3 (de) Taktfrequenzmodulation für sichere Mikroprozessoren.
KR970067249A (ko) Efm 데이타 복원용 클럭발생방법 및 그 방법을 수행하는 위상동기 루프
FR2711285B1 (fr) Procédé et dispositif pour commander le taux d'impulsions d'un oscillateur.
US6445253B1 (en) Voltage-controlled oscillator with ac coupling to produce highly accurate duty cycle square wave output
EP0822479A3 (de) Taktsystem
US5966033A (en) Low ripple phase detector
EP0849882A3 (de) Verfahren zum Ermitteln einer Ansteuerspannung für einen spannungsgesteuerten Oszillator in einem Phasenregelkreis
EP0980163A3 (de) Taktregenerator
EP0829960A3 (de) Verbesserungen in oder in bezug auf elektronische Filter
WO1998052284A3 (en) Phase detector arrangement
US4353123A (en) Ultrasonic transmitter
EP0893877A3 (de) Durch einen Phasenakkumulator gesteuertes Motorantriebssystem und Verfahren dazu
EP0939491B1 (de) Taktimpulsgenerator
JPS585536B2 (ja) 周期的パルス入力信号に従つて出力信号を同期させる回路配置
EP0926835A3 (de) Verfahren und Vorrichtung zur digitalen Steuerung eines Phasenregelkreises und damit erhaltener Phasenregelkreis
ATE16516T1 (de) Anordnung zur erzeugung eines ausloeseimpulses.
CA1291542C (en) Phase locked oscillator
US6211774B1 (en) Electronic horn and method for mimicking a multi-frequency tone
PT1299951E (pt) Processo e dispositivo de sintese de frequencia por meio de um lacete de regulacao de fase
KR950016217A (ko) 클럭 신호 생성 장치
ATE157491T1 (de) Verfahren und einrichtung zum steuern der wirkungsweise eines digitalen phasenregelkreises
JP2516168B2 (ja) 積分時間制御形デジタル積分回路
CA1328493C (en) Phase detector with variable gain amplifier

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): DE FR GB IT

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE CH DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

17P Request for examination filed

Effective date: 20001204

AKX Designation fees paid

Free format text: DE FR GB IT

17Q First examination report despatched

Effective date: 20020312

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Designated state(s): DE FR GB IT

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REF Corresponds to:

Ref document number: 59710575

Country of ref document: DE

Date of ref document: 20030918

Kind code of ref document: P

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20031204

Year of fee payment: 7

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 20031118

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20031219

Year of fee payment: 7

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20040216

Year of fee payment: 7

ET Fr: translation filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20040514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20041204

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20050701

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20041204

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20050831

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED.

Effective date: 20051204