EP0988700A1 - Circuit integre - Google Patents

Circuit integre

Info

Publication number
EP0988700A1
EP0988700A1 EP98934878A EP98934878A EP0988700A1 EP 0988700 A1 EP0988700 A1 EP 0988700A1 EP 98934878 A EP98934878 A EP 98934878A EP 98934878 A EP98934878 A EP 98934878A EP 0988700 A1 EP0988700 A1 EP 0988700A1
Authority
EP
European Patent Office
Prior art keywords
component
controllable
resistor
integrated circuit
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98934878A
Other languages
German (de)
English (en)
Inventor
Reinhard Schmid
Marten Swart
Reinhard Hamperl
Arnulf Pietsch
Hendrik Boezen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Koninklijke Philips NV
Siemens Corp
Original Assignee
Siemens AG
Koninklijke Philips Electronics NV
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Koninklijke Philips Electronics NV, Siemens Corp filed Critical Siemens AG
Publication of EP0988700A1 publication Critical patent/EP0988700A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level

Definitions

  • the invention relates to an integrated circuit arrangement for converting an input signal with a first DC component and an AC component into an output signal with a fixed second DC component and an AC component, as well as a circuit device with such an integrated circuit arrangement and a control method for operating such an integrated circuit arrangement.
  • the information to be transmitted by the signal is usually contained in the AC component. If the alternating component shows only slight changes in level and therefore the signal has to be subjected to an amplification before it is evaluated, the alternating component can possibly be canceled when the signal is amplified: If the level of the alternating component is low compared to the level of the direct component, the amplifier operates in its saturation range due to the high DC component level. As a result, the alternating component can no longer be recognized at the output of the amplifier.
  • a known circuit arrangement that removes signals from their low-frequency components and thus also from their DC components is a high-pass filter.
  • Such a high-pass filter preferably contains a resistor and a capacitor, the dimensions of which determine a cutoff frequency for the filter, which is decisive for the attenuation of the signal components with a frequency below the cutoff frequency.
  • the capacitor may have to have a large capacitance.
  • a capacitor with a large capacitance cannot be integrated due to the technology.
  • the object of the invention is therefore to provide an integrated circuit arrangement for converting an input signal with a first DC component and an AC component into an output signal with a fixed second DC component and an AC component, and a circuit device with such an integrated circuit arrangement and a control method for operating such an integrated component Circuit arrangement.
  • the integrated circuit arrangement has a series connection between terminals of a power supply and a powerless controllable resistor and a controllable current source.
  • a series connection of an energy storage element and a controllable switch is arranged parallel to the controllable resistor, that is to say between the terminal of the energy supply connected to the resistor and the connection point between the resistor and the current source.
  • the connection point between the energy storage element and the controllable switch is connected to a control input of the controllable resistor.
  • the controllable current source the input signal
  • the output signal is tapped at the connection point between the controllable resistor and the controllable current source.
  • this integrable circuit arrangement allows the input signal to be converted with the first DC component and the AC component in an output signal with a fixed second DC component and the AC component.
  • the components of this circuit arrangement can all be integrated.
  • Subclaims 2 to 4 relate to an advantageous selection of components of the integrated circuit arrangement.
  • a capacitor As an energy storage element, its capacity is dimensioned so small that it can be integrated without any problems.
  • the capacitor has e.g. a capacity of a few nanofarads.
  • Claim 5 is directed to an advantageous use of the integrated circuit arrangement in a circuit device in which the controllable current source has a de oduction device for phase demodulation of a phase-modulated signal.
  • controllable switch in a first step is opened by a control circuit before the same controllable switch is closed again in a second step.
  • Claims 7 and 8, which are dependent on claim 6, are designed to use the integrated circuit arrangement according to the invention in particular to convert input signals which have a variable direct component which is low in frequency to the frequency of the alternating component, into an output signal having a fixed direct component and an alternating component.
  • Figure 1 A circuit diagram of an integrated according to the invention
  • Circuit arrangement, Figure 2 and Figure 3 Exemplary input and associated output signals of the circuit arrangement of Figure 1, and
  • Figure 4 A block diagram of a control device according to the invention containing the integrated circuit arrangement according to the invention.
  • FIG. 1 shows a circuit diagram of the circuit arrangement according to the invention.
  • a controllable current source 2 is on the one hand electrically connected to the minus terminal (-) of an energy supply Uba, on the other hand to a first connection point S1.
  • the first connection point S1 is connected to a second connection point S2 via a switch 13 which can be controlled by a control circuit 3, and on the other hand via a controllable resistor 11 in the form of a p-channel field effect transistor with a plus terminal (+) of the energy supply U Ba t •
  • the second circuit point S2 is connected to the plus terminal (+) via an energy storage element 12 designed as a capacitor.
  • the second connection point S2 is also electrically connected to a control input / gate G of the controllable resistor 11. Drain D of controllable resistor 11 is connected to first connection point S1, source S to plus terminal (+).
  • the controllable current source 2 supplies an input signal E designed as a current signal, which is fed into the first connection point S1.
  • the input signal E usually has a DC component G E and an AC component W E.
  • the controllable switch 13 is closed, ie switched on. As a result of the current change at the capacitor 12 caused by the closing of the switch 13, the capacitor 12 begins to recharge.
  • the level at the second connection point S2 changes during the charging process, as a result of which the resistance value of the controllable resistor 11 changes.
  • the voltage drop Ur across the capacitor 12 corresponds to the voltage drop U w across the controllable resistor 11, the voltage drop U w across the controllable resistor 11 being the product of the resistance value of the controllable resistor 11 and him flowing current E is determined.
  • the current E can during this short
  • controllable switch 13 is opened, i. H. not switched on.
  • the controllable resistor 11 is designed to be controllable without power, so that the level at the second connection point S2 is maintained for a long time even after the switch 13 has been opened in order to permanently set the resistor 11.
  • Bipolar transistors as controllable resistors 11 are unsuitable for this application, since after opening the controllable switch 13 the capacitor 12 has been discharged by a base current flow. After opening S1 of switch 13, first connection point S1 has the same potential as second connection point S2.
  • the closing time of the controllable switch 13 is to be dimensioned such that the above-described equilibrium state can be established in each case.
  • the level at the first connection point S1 which corresponds to a DC component G A of an output signal A, which can be tapped at the first connection point S1 with reference to the plus or Mmus terminal (+, -), is given a predetermined input signal / Stream E essentially through the Dimensioning of the controllable resistor 11, in particular its threshold voltage determined.
  • an input signal E with, in particular, a high DC component G E compared to an additive AC component W E with a low level can be converted into an output signal A with a second DC component G A with a low level and an AC component W A.
  • This does not require any energy storage elements, in particular capacitors with large capacities that cannot be integrated. All components of the integrated circuit, such as energy storage element 12, controllable switch 13 and controllable resistor 11, can be integrated with little effort.
  • an input signal E described above can in particular be converted into an output signal A, which is preferably amplified in the following in order to make the small level changes of the alternating component W A easier to evaluate, without the amplifier being affected by an excessively large direct component G A is operated in its saturation range.
  • Figure 2 shows symbolically the input signal E as a current signal (I) with a DC component G E and an AC component W E and the output signal A which can be tapped at the first circuit point S1 as a voltage signal (U) with a second fixed DC component G A and an AC component W A , the corresponds in frequency and phase to the alternating component W E of the input signal.
  • the voltage signal (U) identifies the voltage between connection point S1 and plus terminal (+).
  • FIG. 3 shows qualitatively a corresponding input signal E and an associated output signal A, the input signal E in addition to its higher-frequency AC component W E having a DC component G E that fluctuates and closes at a low frequency has a level G E1 at early times and a level G E : at late times.
  • the controllable switch 13 is closed at a time t 1 at which the input signal E has the first DC component G Ei , so that a defined level G A which can be tapped off at the first connection point S1 is set for this DC component G E.
  • the controllable switch 13 is then opened again at the time t2, so that this level G A is set permanently.
  • the voltage signal (U) in turn identifies the voltage between the connection point S1 and the plus terminal (+).
  • input signals E with an alternating component W E which contains messages or information to be transmitted, and with a low-frequency, slowly changing direct component G E can thus be converted into an output signal A.
  • an alternating component W A and a constant, fixed direct component G A provided that the controlled closing and opening of the controllable switch 13 and thus the setting of the controllable resistor 11 is repeated.
  • Such a setting of the controllable resistor 11 is preferably repeated periodically at fixed time intervals, the frequency of the setting processes being greater, in particular more than twice as large as the frequency of the change in the direct component G E in the input signal E.
  • FIG. 4 shows a circuit device with a controlled current source 2 and the integrated circuit arrangement 1 according to the invention.
  • the controlled current source 2 is in particular designed as a demodulation device 21 for a phase-modulated signal M.
  • the demodulation device 21 contains a multiplier 211 and a low-pass filter 212.
  • the modulated signal M is multiplied in the multiplier 211 by the associated carrier signal T, so that a useful signal N is present at the output of the multiplier 211:
  • the useful signal N contains, in an additively superimposed manner, a DC component, a carrier oscillation component and a low-frequency signal component.
  • the basic phase between carrier signal T and modulated signal M cannot be set to a predetermined value. This phase shift caused by external influences is reflected in the useful signal N as a non-predeterminable DC component.
  • This DC component can be very large compared to the level changes of the low-frequency signal component that carries the actual information, so that the following required amplification can lead to the amplifier being operated in the saturation range and no useful signal being able to be detected.
  • the low-pass filter 212 removes the carrier oscillation T in the useful signal N, but not the low-frequency signal component, which is referred to below as an alternating component of the useful signal N.
  • a symmetrical input signal E with an unpredictable DC component G E and the high-frequency AC component W E is present at the inputs of the integrated circuit arrangement 1.
  • the preceding signals and circuit devices are of course also aligned for symmetrical operation.
  • the two paths of the input signal each drive a field effect transistor 22 of the integrated circuit arrangement 1.
  • the n-channel field effect transistors 22 are each connected to ground, on the one hand, to a circuit arrangement according to FIG.
  • each branch of the input signal E is applied to the associated first connection point S1 of the respective circuit arrangement via the field effect transistors.
  • the controllable resistors 11 and capacitors 12 of the circuit arrangements according to FIG. 1 are dimensioned such that the same level is provided for tapping at the same input current at the connection point S1.
  • the output signal A is thus also symmetrical, based on a fixed DC component G A.
  • the supply potential V can correspond to the ground potential.
  • the field effect transistors 11 which have been p-type so far according to FIGS. 1 and 3 are to be n-type, and the field-effect transistors 22 which have hitherto been n-type are p-type.
  • the polarities of the capacitors 12 must also be changed accordingly.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Networks Using Active Elements (AREA)

Abstract

L'invention concerne un circuit intégré servant à transformer un signal d'entrée (E) comportant une composante continue (GE) et une composante alternative (WE) en un signal de sortie (A) comportant une seconde composante continue (GA) fixée et une composante alternative (WA). Dans ledit circuit, une résistance (11) pouvant être commandée par le signal de courant d'entrée (E) se règle de façon que la chute de tension au niveau de cette résistance (11) reste constante, et ainsi un signal de sortie (A) comportant une composante continue (GA) fixée peut être prélevé.
EP98934878A 1997-06-09 1998-06-09 Circuit integre Withdrawn EP0988700A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19724217 1997-06-09
DE19724217 1997-06-09
PCT/DE1998/001571 WO1998057431A1 (fr) 1997-06-09 1998-06-09 Circuit integre

Publications (1)

Publication Number Publication Date
EP0988700A1 true EP0988700A1 (fr) 2000-03-29

Family

ID=7831894

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98934878A Withdrawn EP0988700A1 (fr) 1997-06-09 1998-06-09 Circuit integre

Country Status (2)

Country Link
EP (1) EP0988700A1 (fr)
WO (1) WO1998057431A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101268694B (zh) 2005-09-19 2011-11-09 汤姆逊许可证公司 用于依赖通信模式/协议的lnb电源输出的自适应阻抗

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0404476A2 (fr) * 1989-06-19 1990-12-27 RCA Thomson Licensing Corporation Circuit comparateur

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3435252A (en) * 1964-08-26 1969-03-25 Bell Telephone Labor Inc D.c. restorer
US5027017A (en) * 1990-01-19 1991-06-25 Rca Licensing Corporation Sync tip clamp circuitry
JPH06164258A (ja) * 1992-11-20 1994-06-10 Fuji Xerox Co Ltd オフセットキャンセル回路付増幅回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0404476A2 (fr) * 1989-06-19 1990-12-27 RCA Thomson Licensing Corporation Circuit comparateur

Also Published As

Publication number Publication date
WO1998057431A1 (fr) 1998-12-17

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