EP1019953A1 - Procede de cicatrisation thermique pour semi-conducteurs constitues de carbure de silicium et dopes par implantation - Google Patents

Procede de cicatrisation thermique pour semi-conducteurs constitues de carbure de silicium et dopes par implantation

Info

Publication number
EP1019953A1
EP1019953A1 EP98955323A EP98955323A EP1019953A1 EP 1019953 A1 EP1019953 A1 EP 1019953A1 EP 98955323 A EP98955323 A EP 98955323A EP 98955323 A EP98955323 A EP 98955323A EP 1019953 A1 EP1019953 A1 EP 1019953A1
Authority
EP
European Patent Office
Prior art keywords
silicon carbide
gas stream
carbide semiconductor
container
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98955323A
Other languages
German (de)
English (en)
Inventor
Karlheinz HÖLZLEIN
Roland Rupp
Arno Wiedenhofer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1019953A1 publication Critical patent/EP1019953A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H10P30/2042—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors into crystalline silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants

Definitions

  • the invention relates to a method for the thermal annealing of at least one silicon carbide semiconductor doped by implantation in a gas stream.
  • Silicon carbide preferably in monocrystalline form, is a semiconductor material with excellent physical properties, which make this semiconductor material particularly interesting for optoelectronics, high-temperature electronics and power electronics. While silicon carbide light-emitting diodes are already available on the market, there are as yet no commercial power semiconductor components based on silicon carbide. This is primarily due to the complex and expensive manufacture of suitable silicon carbide substrates (wafers) and the process technology, which is more difficult than that of silicon.
  • dopant ions in single-crystalline silicon carbide substrates or in a previously grown silicon carbide epitaxial layer allows a targeted lateral variation of the dopant concentration, so that the production of semiconductor components with a planar structured surface is possible. This is a basic requirement for the Most semiconductor components are problematic. However, problematic with the doping by implantation are crystal defects (lattice defects, crystal disorder) which arise from the dopant atoms implanted with high kinetic energy in the silicon carbide crystal of the epitaxial layer and which have the electronic properties of the implanted semiconductor region and thus of the whole Component deteriorate. In addition, the dopant atoms or atomic trunks are not optimally built into the silicon carbide crystal lattice after the implantation and are therefore only partially electrically activated.
  • a method for the thermal annealing of a 6H silicon carbide semiconductor region n-doped by implantation of nitrogen ions at high implantation temperatures between 500 ° C. and 1000 ° C. is known in a 6H silicon carbide epitaxial layer doped with aluminum.
  • the 6H silicon carbide semiconductor is treated at a constant annealing temperature between 1100 ° C and 1500 ° C in an argon atmosphere.
  • the 6H silicon carbide semiconductor is placed in a crucible made of silicon carbide. During the heat treatment, the surface of the 6H silicon carbide semiconductor is in equilibrium with the silicon carbide atmosphere inside the crucible.
  • the invention is based on the object of specifying an improved method compared to the prior art for the thermal annealing of silicon carbide semiconductors doped by implantation, in which the formation or the assembly of undesired crystallographically oriented stages is reduced.
  • the healing process must therefore be designed in such a way that practically no carbon is supplied to the at least one silicon carbide semiconductor via the gas stream.
  • “practically no carbon” means a smaller proportion of carbon than that which corresponds to the equilibrium partial pressure of carbon or carbon-containing components (eg SiC 2 ) over the silicon carbide semiconductor at the respective process temperature.
  • the invention is based on the knowledge that the misaligned silicon carbide surfaces of, for example, epitaxially applied layers or of single-crystalline subrates, are only present in the ideal case
  • step heights result after the thermal annealing, which are significantly lower than the prior art, in particular at least a factor of 3 lower.
  • At least the surface of the doped region of the silicon carbide semiconductor is exposed to a gas stream which preferably contains at least one inert gas and / or nitrogen and / or hydrogen.
  • the gas stream composition can be changed during annealing, for example from an inert gas composition to a hydrogen-containing composition or even to practically pure hydrogen.
  • a preferred variant of the process control consists in heating in an inert gas stream, then keeping it at an approximately constant maximum temperature and then in a gas stream with a hydrogen content of typically at least
  • atoms can be added to the gas stream under a predetermined gas partial pressure, which atoms were also used for doping.
  • the flow rate of the gas stream is preferably set between approximately 0.5 cm / s and approximately 60 cm / s, in particular between 5 cm / s and 25 cm / s. It has been shown that a silicon carbide semiconductor which has been annealed under such a gas stream has a significantly better surface area than a silicon carbide semiconductor which has been annealed in a gas stream at a different flow rate. Flowing the silicon carbide semiconductor during the annealing has the advantage that, in contrast to the known annealing methods, the surface has a morphologically good quality despite the high temperatures, and the crystallographic stages resulting from the misorientation of the silicon carbide surface essentially are preserved and do not assemble into larger steps, and there are no other surface roughness.
  • the above-mentioned preferred range for the flow rate ensures that the flow rate is on the one hand small enough to prevent inadmissible cooling of the silicon carbide half to avoid conductor, and on the other hand large enough to remove carbon and silicon atoms emerging from the silicon carbide semiconductor, so that they cannot contribute to undesired step growth.
  • the static process pressure in a region of the gas atmosphere adjacent to at least the silicon carbide semiconductor is generally advantageously set between approximately 5000 Pa and approximately 100000 Pa (normal pressure) and preferably between approximately 10000 Pa and approximately 50,000 Pa.
  • the set negative pressure ensures particularly good suppression of the undesired growth of the crystallographically oriented steps.
  • the silicon carbide semiconductor is arranged in the interior of a container, which can preferably be heated via an HF (high-frequency) induction coil.
  • the silicon carbide semiconductor is preferably held in the interior of the container by a carrier.
  • at least one radiation shield is preferably placed in the interior of the container in relation to the gas flow direction in front of and behind the carrier in order to prevent undesired heat radiation from the interior of the container. Openings for the passage of the gas stream are preferably provided in the radiation shields.
  • the carrier, the radiation shields and the container for example at least parts of the inner wall of the container, advantageously consist of at least one metal or at least one metal compound or are at least lined or coated with the same.
  • the metal or the metal compound should advantageously only melt above 1800 ° C. due to the high process temperatures during thermal annealing.
  • the metal or the metal compound should advantageously have a vapor pressure of less than 10 "2 Pa (approx. 10 " 7 Atm) at the maximum temperature of 1800 ° C.
  • the metal or metal compound should be in the gas stream because of the intended hydrogen content advantageously be resistant to hydrogen.
  • Metals or metal compounds which contain at least one of the materials tantalum, tungsten, molybdenum, niobium, rhenium, osmium, iridium or their carbides can thus be used particularly advantageously.
  • Parts of the container that do not come into contact with the part of the gas stream that reaches the silicon carbide semiconductor can also be made of other materials such as graphite or silicon carbide. All parts which have not been listed so far but which may be present in the hot area and which come into contact with the gas stream should likewise preferably consist of the advantageous metals or metal compounds mentioned or at least be coated with the same.
  • the described advantageous selection of materials ensures that the gas stream flowing past does not remove any carbon atoms from the contact surfaces, such as the inner wall of the container or the support surface, or absorb escaped carbon atoms and leads them to the silicon carbide semiconductor.
  • a silicon carbide semiconductor doped by implantation is brought to a maximum temperature of at least 1000 ° C. by supplying heat.
  • the increase in temperature over time (heating rate) is generally limited to a maximum of 100 ° C./min, preferably to a maximum of 30 ° C./min, during this heating process.
  • the maximum temperature is advantageously set between 1100 ° C and 1800 ° C, preferably between 1400 ° C and 1750 ° C.
  • the silicon carbide semiconductor is advantageously kept at least approximately at the maximum temperature for a predetermined time interval of preferably between 2 min and 60 min, in particular between 15 min and 30 min. This high-temperature plateau brings an improvement in the degree of activation of dopants in silicon carbide semiconductors.
  • the cooling rate is advantageously limited to a maximum of 100 ° C / min, in particular to a maximum of 30 ° C / min.
  • the slow cooling process expediently ends at an intermediate temperature, which is preferably below 600 ° C.
  • the limitation of the rate of temperature change (heating and cooling rates) leads to improved electrical properties of the silicon carbide semiconductor doped by implantation and then healed.
  • the rate of heating and / or cooling does not have to be constant, but can advantageously also vary within ranges which are determined by an upper limit of 100 ° C / min and in particular by an upper limit of 30 ° C / min.
  • the temperature of the silicon carbide semiconductor is kept at least once at a predetermined temperature level during the heating and cooling process.
  • the rate of warming up or cooling down is practically 0 ° C./min.
  • FIG. 1 shows a perspective view of a container, in the interior of which there is at least one silicon carbide semiconductor for the thermal healing of the lattice defects caused by a previous implantation, and
  • FIG. 2 shows the arrangement of FIG. 1 as a longitudinal section. Corresponding parts are provided with the same reference numerals in FIGS. 1 and 2.
  • 2 shows a longitudinal section through the arrangement of FIG. 1.
  • the container 13 is cylindrical in the embodiment shown, but it can also be constructed just as well with a different geometric shape, for example as an elongated cuboid.
  • the silicon carbide semiconductors 10 1 according to FIGS. 1 and 2 can have been produced before the thermal annealing shown using the following process steps to be carried out in succession:
  • the silicon carbide substrate essentially consists of a single silicon carbide polytype, in particular of beta silicon carbide (3C silicon carbide, cubic silicon carbide) or one of the polytypes of alpha silicon carbide (hexagonal or rhombohedral silicon carbide).
  • Preferred polytypes for the silicon carbide substrate are the alpha-silicon carbide polytypes 4H, 6H and 15R.
  • CVD chemical vapor deposition
  • a CVD epitaxy method can be used in accordance with US Pat. No. 5,011,549. Because of the epitaxial growth, the silicon carbide layer, like the silicon carbide substrate, is single-crystalline and thus semiconducting. If the If the growth conditions in epitaxy are set accordingly, the silicon carbide layer is also of a single poly type which is equal to the poly type of the silicon carbide substrate.
  • the silicon carbide substrate consists of alpha-silicon carbide, it is generally prepared before the silicon carbide layer is deposited, for example by cutting and / or grinding, in such a way that the surface of the substrate provided as the growth surface is at an angle between approximately 1 ° and approximately 12 ° is inclined differently from the (0001) plane, preferably in the direction of one of the ⁇ 1120> crystal directions.
  • the silicon carbide layer is of the same alpha silicon carbide polytype as the silicon carbide substrate and in particular shows no syntax.
  • the silicon carbide layer can be doped by adding appropriate dopant compounds during growth according to a desired conductivity type.
  • An implantation method is used to generate different doping regions, in which one or more dopants are introduced into the silicon carbide semiconductors 10i.
  • the silicon carbide semiconductors 10 ⁇ can be provided with implantation masks.
  • the silicon carbide semiconductors 10i are then introduced into an implantation system (not shown).
  • the surfaces of the silicon carbide semiconductors 10i are bombarded with ions of one or more dopants with energies of typically between 10 keV and a few 100 keV depending on the dopants used and the desired depth of penetration.
  • the silicon carbide semiconductors 10 ⁇ are at temperatures from a range between during implantation about 20 ° C (room temperature) and about 1200 ° C, preferably between about 20 ° C and about 600 ° C.
  • the silicon carbide crystal lattice in the different doping regions of the silicon carbide semiconductors is damaged 10 ⁇ .
  • the silicon carbide semiconductors 10 ⁇ are now healed using a thermal annealing process.
  • the silicon carbide semiconductors 10i are introduced into the container 13 of a healing system (not shown, annealing furnace, tempering furnace) and arranged on a carrier 16 in a gas stream 12 in the container 13.
  • a healing system not shown, annealing furnace, tempering furnace
  • FIGS. 1 and 2 devices for thermal insulation and gas guidance, for example a double-walled water-cooled quartz tube, are not shown in FIGS. 1 and 2.
  • the gas routing device prevents, inter alia, an undesired lateral gas outlet through the wall of the container 13.
  • a controllable induction heater with at least one HF induction coil 18 is advantageously provided around the container 13 and the devices not shown, by means of which the container 13 is heated inductively. This also uniformly heats the silicon carbide semiconductors 10i in the interior of the container 13. However, resistance heating can also be provided.
  • the container 13 shown in FIGS. 1 and 2 is advantageously constructed from at least two layers.
  • a container layer 21 forming an outer, load-bearing wall preferably consists of graphite.
  • the container 13 can be heated particularly well via the HF induction coil, since the good conductivity of graphite leads to the formation of eddy currents favored, and as a result, the container 13 is heated.
  • the outer container layer 21 made of graphite represents a very good black radiator, by means of which the current temperature of the container 13 can be easily detected without contact.
  • it is more advantageous to provide a coating 20 see FIG.
  • the gas stream 12 should advantageously not take up any carbon atoms from the inner wall of the container and supply it to the silicon carbide semiconductors 10i.
  • the thickness of this coating is generally greater than 0.01 mm. In contrast to known full graphite containers or graphite containers coated with silicon carbide, this suppresses the undesired growth of the crystallographic stages.
  • Other metals or metal compounds can also be used for the coating 20, taking into account the special process conditions during thermal annealing. In addition to those already mentioned, metals or metal compounds which contain at least fractions of tungsten, molybdenum, niobium, rhenium, osmium, iridium or their carbides are therefore particularly suitable.
  • the carrier 16 which accommodates the silicon carbide semiconductors 10i, consists entirely or at least at the locations that are stripped by the gas stream 12, preferably from the aforementioned metals or metal compounds.
  • the carrier 16 can stand on a base plate 17, which is likewise advantageously provided with a coating 20 made of the aforementioned metals or metal compounds, at least on the surface facing the area through which the gas stream flows.
  • radiation shields 14 and 15 with openings 19 are provided in the container interior, through which the gas stream 12 is introduced and discharged.
  • the radiation shields 14 and 15 preferably consist of several individual elements, for example of perforated disks placed one behind the other, which preferably reach as close as possible to the inner wall of the container. As a result, they are determined to protect the interior of the container from heat loss through radiation. especially good.
  • the radiation shields 14 and 15 again preferably consist of the aforementioned metals or metal compounds.
  • the container 13 and the base plate 17 are not formed in two layers, the one layer then consisting of the aforementioned metals or metal compounds.
  • the gas stream 12 is preheated when it passes the radiation shield 14, for example by advantageous shaping of the individual elements, so that the gas stream 12 does not undesirably cool the silicon carbide semiconductors 10i. Because by adhering to the temperature curves recognized as advantageous on the silicon carbide semiconductors 10 ⁇ , particularly good results can be achieved when the implantation damage is healed. The result of this is an improved blocking behavior of p-n junctions, which may have been introduced, for example, into the silicon carbide semiconductors 10 in the preceding doping processes, not shown here.
  • the silicon carbide semiconductor 10 ⁇ may also be placed laterally offset to each other preferably.
  • the surfaces of the silicon carbide semiconductors 10j to be annealed instead of the vertical orientation shown in FIGS. 1 and 2, it can also advantageously be rotated, inclined or in particular arranged parallel to the main flow direction of the gas stream 12. These embodiments lead to a better and more uniform flow around, so that the carbon and silicon atoms emerging from the silicon carbide semiconductors 10i can be more easily detected and transported away by the gas stream 12. The undesirable growth of the crystallographic Oriented steps are thus avoided.
  • the parallel embodiment is particularly easy to achieve if the support 16 shown in FIG.
  • the silicon carbide semiconductors 10 are advantageously in recesses in the base plate 17, so that the surfaces of the silicon carbide semiconductors 10i to be healed are in turn oriented parallel to the main flow direction of the gas stream 12.
  • a plurality of base plates 17 with recesses are stacked one above the other, so that a higher throughput can be achieved.
  • the gas flow 12 arranged perpendicularly to the silicon carbide semiconductor 10 ⁇ , it has proven to be particularly advantageous to at least the first and the last mounting position of the carrier 16 with dummy silicon carbide semiconductors 11, which actually should not be subjected to a healing process equip.
  • These dummy silicon carbide semiconductor 11 serve to treat all be annealed silicon carbide semiconductor 10 ⁇ under equal and reproducible gas flow conditions.
  • the dummy silicon carbide semiconductors 11 also act as additional radiation shields.
  • a silicon carbide semiconductor which has been annealed with a thermal annealing method according to the invention can advantageously be used for the construction of various semiconductor components, preferably of power semiconductor components based on silicon carbide.
  • semiconductor components are pn diodes, bipolar transistors, MOSFETs, thyristors, IGBTs or MCTs.
  • the implantation process and the healing process can be carried out in succession in a single system designed for both processes.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Selon l'invention, un semi-conducteur (10i) constitué de carbure de silicium, dopé par implantation, est cicatrisé thermiquement dans un courant de gaz (12) qui ne transmet pratiquement pas de carbone audit semi-conducteur (10i). Selon une variante avantageuse, le contenant (13), le support (16), les écrans antirayonnement (14, 15) et la plaque de fond (17) sont constitués, au moins dans les zones qui sont mises en contact avec le courant de gaz (12), d'un métal ou d'un composé métallique, par exemple de tantal ou de carbure de tantal.
EP98955323A 1997-09-30 1998-09-14 Procede de cicatrisation thermique pour semi-conducteurs constitues de carbure de silicium et dopes par implantation Withdrawn EP1019953A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19743127 1997-09-30
DE19743127 1997-09-30
PCT/DE1998/002722 WO1999017345A1 (fr) 1997-09-30 1998-09-14 Procede de cicatrisation thermique pour semi-conducteurs constitues de carbure de silicium et dopes par implantation

Publications (1)

Publication Number Publication Date
EP1019953A1 true EP1019953A1 (fr) 2000-07-19

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EP98955323A Withdrawn EP1019953A1 (fr) 1997-09-30 1998-09-14 Procede de cicatrisation thermique pour semi-conducteurs constitues de carbure de silicium et dopes par implantation

Country Status (5)

Country Link
US (1) US6406983B1 (fr)
EP (1) EP1019953A1 (fr)
JP (1) JP2001518706A (fr)
CN (1) CN1272957A (fr)
WO (1) WO1999017345A1 (fr)

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Also Published As

Publication number Publication date
WO1999017345A1 (fr) 1999-04-08
CN1272957A (zh) 2000-11-08
JP2001518706A (ja) 2001-10-16
US6406983B1 (en) 2002-06-18

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