EP1222736A1 - Ensemble filtre avec filtre noyau, decimateur et interpolateur - Google Patents

Ensemble filtre avec filtre noyau, decimateur et interpolateur

Info

Publication number
EP1222736A1
EP1222736A1 EP00956750A EP00956750A EP1222736A1 EP 1222736 A1 EP1222736 A1 EP 1222736A1 EP 00956750 A EP00956750 A EP 00956750A EP 00956750 A EP00956750 A EP 00956750A EP 1222736 A1 EP1222736 A1 EP 1222736A1
Authority
EP
European Patent Office
Prior art keywords
filter
decimator
sampling rate
filter device
core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP00956750A
Other languages
German (de)
English (en)
Inventor
Heinz G. Goeckler
Alexandra Groth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telent GmbH
Original Assignee
Marconi Communications GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Communications GmbH filed Critical Marconi Communications GmbH
Publication of EP1222736A1 publication Critical patent/EP1222736A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/0248—Filters characterised by a particular frequency response or filtering method
    • H03H17/0264—Filter sets with mutual related characteristics
    • H03H17/0273—Polyphase filters
    • H03H17/0275—Polyphase filters comprising non-recursive filters

Definitions

  • the invention is based on a filter device consisting of a core filter and an input-side decimator and an output-side interpolator
  • the effort - filter operations per unit of time - can be kept low regardless of the choice of the clock rate of the core filter
  • the total computational effort due to the poor approximation of the optimal decimation factor can not be optimally minimized by an integer sample rate conversion
  • the integer approach of the sample rate reduction cannot be used in [1] if, for example in the case of a low-pass filter, the cut-off frequency f s applies to f s > f a / 4
  • the decimation factor M must be ⁇ 2, i.e. not an integer.
  • FIG. 1 shows a multirate FIR filter structure according to the prior art
  • FIG. 2 shows the computing effort depending on the sampling rate change factor
  • FIG. 3 shows a multi-rate FIR filter structure according to the invention
  • FIG. 4a shows a filter structure with computing-efficient decimators and interpolators
  • Figure 4b a computationally efficient decimator or interpolator for the non-integer sample rate conversion
  • FIG. 5 shows a detail from FIG. 4 output commutator of the decimator, core filter and input commutator of the interpolator
  • FIG. 6 shows a filter structure in which the core filter has been shifted into the branches of the commutator and combined with the delays there,
  • FIG. 7a and FIG. 7b a filter structure with swapping of the expansion and core filtering
  • FIG. 8 shows an optimized filter structure with an adjustable sampling rate
  • Figure 9 shows a multi-stage filter device according to the invention
  • an FIR filter implementation for sample rate conversion by the integer factor M consists of an input-side decimator 2, a core filter 1 and an output-side interpolator 3.
  • the letter H denotes the transfer function of the decimator 2
  • the letter G denotes the transfer function of the interpolator 3
  • Letter D 'de denotes the transfer function of the core filter 1.
  • the optimum sampling rate change factor can be determined according to [1]
  • the optimal sample rate change factor cannot be described with sufficient accuracy by this approximation, see also FIG. 2.
  • the filter structure according to FIG. 3 can be used in the entire range of filter blocking frequencies f ⁇ e (0, f a / 2)
  • FIG. 4a The structure shown in FIG. 4a is suitable for reducing computational complexity.
  • ML-parallel filter paths are provided for parallelized subsystems (such a parallelized FSRC is shown in FIG. 4b).
  • the filter functions H and G are designed in polyphase structure.
  • the input of the core filter 1 is connected to the transfer function D '(z) via an L-to-1 commutator 4 for an L-fold sampling rate expansion, cf. also the exemplary embodiment according to FIG. 5.
  • the commutator 4 cyclically samples the L-Filte ⁇ fade of decimator 3 in accordance with the implementation according to US 4,725,972 and passes these sampled signals to the input of the core filter 1
  • the output of the core filter 1 is connected to a 1-to-L commutator (distribution multiplexer) 5, that is to say a structure dual to the L-to-1 commutator 4 for an L-fold sampling rate reduction and parallelization
  • the transfer function D '(z) of the core filter 1 is converted into the parallel filter paths of the decimator 2, as shown in FIG. 6, or in a variant not shown, included in the parallel filter paths of the inteolator.
  • delayed versions of DV Z ) are defined which correspond to time-shifted impulse responses D)
  • the exchange of the expanders and the delayed versions of the core filter 1 D ' v (z) is possible by means of equivalence relationships, which have been referred to as “noble identities”.
  • the filters D ′ v (z) are each L polymer phase components D ′ v ⁇ ( z) accordingly
  • the different transfer functions are shown in Figure 7b shown in more detail with a suitable circuitry connection (rearrangement) of corresponding parallel paths, the commutators 4 and 5 can be omitted.
  • the sampling rate change factor R L / M is preferably selected so that it is as close as possible to the optimal sampling rate change factor Rop t shown in FIG. 2, which can be determined beforehand analytically
  • the sampling rate for parallelized filter paths can be set as desired by changing the numbers M and L in the same direction, without the overall computing effort changing
  • an input sampling frequency f a of 800 MHz was selected.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Filters And Equalizers (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

L'invention concerne un ensemble filtre comportant un décimateur (2), un filtre noyau (1), et un interpolateur (3). Selon l'invention, la fréquence d'échantillonnage est réduite d'un facteur L/M de modification de la fréquence d'échantillonnage non entier, avant filtrage du noyau. Ceci permet de réaliser à moindres frais une structure de filtre universelle. La parallélisation permet de créer une structure dont la fréquence d'horloge peut être réglée librement.
EP00956750A 1999-08-27 2000-08-25 Ensemble filtre avec filtre noyau, decimateur et interpolateur Withdrawn EP1222736A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE1999140926 DE19940926A1 (de) 1999-08-27 1999-08-27 Filtereinrichtung mit Kernfilter, Dezimator und Interpolator
DE19940926 1999-08-27
PCT/IB2000/001306 WO2001017108A1 (fr) 1999-08-27 2000-08-25 Ensemble filtre avec filtre noyau, decimateur et interpolateur

Publications (1)

Publication Number Publication Date
EP1222736A1 true EP1222736A1 (fr) 2002-07-17

Family

ID=7919951

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00956750A Withdrawn EP1222736A1 (fr) 1999-08-27 2000-08-25 Ensemble filtre avec filtre noyau, decimateur et interpolateur

Country Status (6)

Country Link
EP (1) EP1222736A1 (fr)
CN (1) CN1376333A (fr)
AU (1) AU6861200A (fr)
DE (1) DE19940926A1 (fr)
NO (1) NO20020927L (fr)
WO (1) WO2001017108A1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10112275B4 (de) 2001-03-14 2005-01-20 Rohde & Schwarz Gmbh & Co. Kg Interpolator
AU2002343133A1 (en) 2001-11-19 2003-06-10 Koninklijke Philips Electronics N.V. Time discrete filter comprising upsampling, sampling rate conversion and downsampling stages
CN101072213B (zh) * 2006-05-08 2011-05-25 中兴通讯股份有限公司 一种多天线的复用插值装置
CN101207372B (zh) * 2007-12-04 2012-06-06 中兴通讯股份有限公司 一种可实现固定小数采样率转换的方法及其装置
CN102064797B (zh) * 2010-11-12 2013-06-05 清华大学 分数倍采样率变换的并行实现方法及其装置
CN102412806B (zh) * 2011-10-24 2017-08-25 南京中兴新软件有限责任公司 基于逻辑电路的Farrow滤波器及其实现方法
CN106226715A (zh) * 2016-09-12 2016-12-14 厦门大学 磁共振数字接收系统
CN110190829B (zh) * 2019-05-30 2023-05-23 北京星网锐捷网络技术有限公司 一种滤波器及滤波方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5717617A (en) * 1993-04-16 1998-02-10 Harris Corporation Rate change filter and method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO0117108A1 *

Also Published As

Publication number Publication date
CN1376333A (zh) 2002-10-23
DE19940926A1 (de) 2001-03-01
NO20020927D0 (no) 2002-02-26
NO20020927L (no) 2002-03-27
AU6861200A (en) 2001-03-26
WO2001017108A1 (fr) 2001-03-08

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