EP1467474A2 - Circuit d'interface pour opérer des charges capacitives - Google Patents

Circuit d'interface pour opérer des charges capacitives Download PDF

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Publication number
EP1467474A2
EP1467474A2 EP04006568A EP04006568A EP1467474A2 EP 1467474 A2 EP1467474 A2 EP 1467474A2 EP 04006568 A EP04006568 A EP 04006568A EP 04006568 A EP04006568 A EP 04006568A EP 1467474 A2 EP1467474 A2 EP 1467474A2
Authority
EP
European Patent Office
Prior art keywords
load
interface circuit
cfl
circuit
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP04006568A
Other languages
German (de)
English (en)
Other versions
EP1467474B1 (fr
EP1467474A3 (fr
Inventor
Klaus Fischer
Josef Kreittmayr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Osram GmbH
Original Assignee
Patent Treuhand Gesellschaft fuer Elektrische Gluehlampen mbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Patent Treuhand Gesellschaft fuer Elektrische Gluehlampen mbH filed Critical Patent Treuhand Gesellschaft fuer Elektrische Gluehlampen mbH
Publication of EP1467474A2 publication Critical patent/EP1467474A2/fr
Publication of EP1467474A3 publication Critical patent/EP1467474A3/fr
Application granted granted Critical
Publication of EP1467474B1 publication Critical patent/EP1467474B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/36—Controlling
    • H05B41/38—Controlling the intensity of light
    • H05B41/39—Controlling the intensity of light continuously
    • H05B41/392—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor
    • H05B41/3921—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations
    • H05B41/3924—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations by phase control, e.g. using a triac
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/26—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC
    • H05B41/28—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC using static converters
    • H05B41/288—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC using static converters with semiconductor devices and specially adapted for lamps without preheating electrodes, e.g. for high-intensity discharge lamps, high-pressure mercury or sodium lamps or low-pressure sodium lamps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/26—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC
    • H05B41/28—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC using static converters
    • H05B41/282—Circuit arrangements in which the lamp is fed by power derived from DC by means of a converter, e.g. by high-voltage DC using static converters with semiconductor devices
    • H05B41/285—Arrangements for protecting lamps or circuits against abnormal operating conditions
    • H05B41/2851—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions
    • H05B41/2853—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions against abnormal power supply conditions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S315/00—Electric lamp and discharge devices: systems
    • Y10S315/04—Dimming circuit for fluorescent lamps

Definitions

  • the invention relates to a circuit arrangement for operating capacitive loads using the example of electrical ballasts for lamps, in particular Low-pressure discharge lamps.
  • Circuit arrangements for operating low-pressure discharge lamps are known in various designs. I. d. They usually contain a rectifier circuit for rectifying an AC voltage supply and for charging a capacitor, often referred to as a smoothing capacitor. The DC voltage applied to this capacitor is used for Supply of an inverter or inverter (hereinafter referred to as inverter), who operates the low pressure discharge lamp. Similar designs are also known for other types of lamps, for example in the form of electronic ones Transformers for halogen lamps.
  • inverter inverter
  • Similar designs are also known for other types of lamps, for example in the form of electronic ones Transformers for halogen lamps.
  • the invention relates above also very generally circuit arrangements for operating capacitive loads, the term "capacitive" means the so-called smoothing capacitor at the input of the inverter thinks. Under capacitive loads in the following in particular Such lamps can be understood with an electrical ballast are equipped with capacitive properties.
  • the invention is based on the technical problem of a circuit arrangement to operate capacitive loads on the network, the extended Possible uses for the loads, especially for electrical ones Lamps, creates.
  • an interface circuit for operating a capacitive load on a power supply circuit especially one Leading edge dimmer, which is characterized in that the interface circuit has a first switch which is designed Short circuit the input of the load when there is no power supply to the The load is received.
  • the invention is directed to an electronic ballast for a lamp with an integrated interface circuit of the above Type of operation of the lamp on a leading edge dimmer.
  • the Lamp is preferably a low pressure discharge lamp, which is the invention however, on other types of lamps such.
  • CFL low-pressure discharge lamps
  • B constant power supply
  • the basic idea of the invention is the capacitive mentioned Loads compatible with dimmer circuits through an interface circuit to make and avoid the instabilities mentioned.
  • the invention is directed to operation on leading edge dimmers, the result of the inconsistent current consumption of the capacitive Load - if namely the instantaneous value of the AC voltage present is greater than the voltage across the capacitor - at capacitive loads encounter difficulties.
  • the interface circuit should also have a current flow in the remaining times enable by the leading edge dimmer, so that one in the This current flows through the dimmer contained timer.
  • a switch preferably a first transistor, of the interface circuit always switched on as soon as the AC mains voltage Zero crossing reached.
  • the transistor can also be switched on alternatively a short time after the zero crossing.
  • the first switch is preferred immediately switched off again as soon as the instantaneous value of the mains voltage is applied to the load.
  • the switch is preferably controlled via a second switch, preferably via a second transistor. This is preferably the second Transistor at the load input via two resistors with the mains supply itself (before the rectification). This allows the second Transistor practically "read out" the input voltage at the load and determine when power is supplied and the switch is switched on or off can be switched off without the rectifier circuit or filter capacities to be disturbed.
  • the interface circuit according to the invention can also be a control circuit have a signal provided by the mains supply, preferably evaluates the supply voltage itself. This can for example, the duty cycle of the first transistor is evaluated and on proportional signal are generated to regulate the power consumption the load can be used.
  • a preferred embodiment of this control circuit has a parallel connection from a series connection with a third resistor and one third transistor, the base of which is connected to the base of the first transistor is, a second smoothing capacitor and a fourth resistor on, the parallel connection being connected in series with a fifth resistor is, the tap of the control signal for controlling the power consumption the load between the fourth resistor and the fifth Resistance is provided.
  • the fifth resistor can be used in series with said parallel connection can be connected in parallel to the load. alternative it is possible to supply the fifth resistor for example in the Load integrated inverter. In contrast to the first case, in to which the fifth resistor must have high resistance, in the latter case the fifth resistor to be low-resistance, so that voltage losses are reduced can be.
  • the functional principle outlined above can be used for all common mains voltages regardless of the actual input circuitry of loads apply. It is suitable for loads with bridge rectification in the entrance and a single sieving or smoothing capacity as well for other input circuits e.g. at least two diodes and at least two smoothing capacitors (so-called “3D-2C circuit” see FIG. 4b or “Voltage doubler” cf. 4c). With the “2C-3D circuit” instead of a single smoothing capacitor, an arrangement of 2 Capacitors and 3 diodes used. With the voltage doubler two capacitors connected via two diodes on the mains side and with connected to the inverter circuit. This allows the total load double mains peak voltage are provided, for example what enables lamps that are designed for a 220 V network to be connected to a 110 V-mains supply to operate.
  • the interface circuit according to the invention can be in its own housing be carried out separately, for example in parallel to several to connect capacitive partial loads to a dimmer. This allows multiple capacitive loads without an integrated interface function on one Dimmers can be operated inexpensively.
  • FIG. 1 An example of the use of the interface circuit according to the invention is shown in Fig. 1.
  • the load CFL is from this voltage source via a leading edge dimmer (between the points N and P).
  • Phase control dimmer deliver a periodic power supply to the load that by firing a Triac circuit breaker via a variable timing element Diac, TR, TC is activated.
  • the timer can also be in the non-conductive state of the circuit breaker (if no mains voltage is applied to the load).
  • the actual load is for the lack of power supply Timer not available, so the circuit arrangement of the actual Load has no influence on the ignition process of the circuit breaker. So can be avoided that about phase shifts occur that the Shift ignition times in every grid half-wave and ultimately with the load can lead to unwanted flickering or the like.
  • circuit breaker triac and the timer which consists of a diac, a capacitor TC and a variable resistor TR is formed, are usually still a fuse F and in the dimmer circuit Smoothing and radio interference suppression also a capacitor C and an inductor L provided.
  • the interface circuit can be in the ballast the lamp CFL can be integrated; this embodiment is detailed in Figure 4a and 4b to see.
  • the load CFL can also have a separate interface circuit operate.
  • Figure 3 shows schematically such a structure for the operation of several CFL lamps (CFL 1, CFL 2, CFL 3) on one Dimmer using a separate IF interface circuit.
  • FIG. 4a The function of the interface circuit is described with reference to FIG. 4a, in which an exemplary circuit structure is shown which describes the above Functional principle realized.
  • the mains AC voltage is converted into a pulsating one in a rectifier GL DC voltage converted.
  • a capacitor C1 is opened via a diode D1 and the rectifier GL the peak value of the input voltage applied to the load and represents, for example, an inverter INV (or Inverter), a DC voltage is available, which in this one high-frequency AC voltage for supplying a low-pressure discharge lamp CFL is converted with a predeterminable lamp current.
  • INV inverter
  • the interface circuit IF is shown in FIG Example through the resistors R1, R2, R3, R4, the diode D1, the resistors R5, R6, and transistors T1 and T2 are formed.
  • the switching path of the first transistor T1 runs in series with the diode D1 parallel to Smoothing capacitor C1, which for generating the inverter circuit INV a high-frequency alternating voltage required for the CFL lamp supplies.
  • the transistor shorts the load's supply inputs.
  • a second transistor T2 is used to switch transistor T1 on and off and is with its collector (via a resistor R5) with the base of the Transistor T1 connected.
  • the switching path of the second transistor T2 runs parallel to the series connection of the resistor R5 and Control path from the first transistor T1 (T2 thus switches T1 off and on). So the first transistor can be turned off by the second transistor is switched on.
  • the circuit works as follows:
  • the transistor T1 forms in switched on a short circuit via the bridge rectifier GL between the two network input connections.
  • the polarity of the diode D1 also prevents transistor T1 from turning on shorts the capacitor C1.
  • the input impedance is achieved the load (CFL) for both positive and negative half-waves the AC mains voltage (VS, see Figure 1) to a minimum (“Short shot”) is reduced.
  • the resistors R1, R2 and R3 represent the current input voltage formed of the circuit and via the resistor R4 to the Base of transistor T2 applied.
  • the arrangement of the resistors R1 and R2 according to the invention on the network side connected ensures that the zero crossings of the mains input voltage (Reversing the polarity of VS) safely and independently of filter capacities or parasitic capacities can be detected.
  • the transistor T1 is switched on via the resistors when the transistor T2 is switched off R5 and R6 switched on.
  • T1 can pass through R6 and R5 also by a continuous-time signal which is in the load and the Inverter INV available (for example the supply of one in the INV inverter control IC) is switched on.
  • T2 due to a positive, sufficiently large voltage drop at R3 is switched on via R4, the transistor T1 is switched off.
  • the resistances R4 and R5 serve to improve the switching behavior of T2 and T1.
  • T2 ensures that T1 is always during the time ta (see FIG. 2) is switched on, in which the instantaneous value of the Mains AC voltage VS applied across the dimmer and that in the dimmer as Switching element provided triac is not conductive.
  • a small power transistor can be used as the transistor T1 a breakdown voltage greater than the maximum mains voltage VS. must have, however, in terms of current carrying capacity and current amplification no critical requirements are made.
  • the transistor T2 which operates as a switching transistor, is usually connected to a operated small base / emitter voltage of about 0.6 V.
  • This tension is however temperature dependent, so that due to the operation of the circuit and the switching temperature vary the switching voltage can (for example between 0.4 V and 0.6 V). Therefore, measures could be taken if necessary be taken, the the temperature-dependent fluctuation of the Compensate control voltage.
  • a Zener diode connected in series to the resistor R4 shown in Figure 4a become.
  • the voltage drop across R3 e.g. around 20 V
  • the relative fluctuation of the switch of the transistor T2 required voltage is reduced.
  • the interface circuit according to the invention works independently of the input circuit used for the lamp.
  • Figure 4b shows a variant the input circuit, in which the single capacitor shown in Figure 4a C1 through a circuit of three diodes D2 - D4 and 2 capacitors C1a, C1b ("2C-3D circuit") is replaced. In operation takes place in this (Buffer) circuit a serial charging of the two capacitors.
  • the interface function as a separate device IF set up without load, it is necessary to switch on the Transistor T1 requires current through a resistor from an additional Feed capacitor. In this case, this capacitor have a relatively low capacity because it doesn't have the energy to dine a load but only provide the energy to control T1 via R6 got to.
  • An example of such a circuit is shown in Figure 4c.
  • the Load is via one of two diodes D2, D3 and two capacitors C1a, C1b existing input circuit serving as a "voltage doubler" connected to the network.
  • the interface circuit is parallel to it switched and contains a capacitor C3 (mentioned above).
  • Capacitors C1a and C1b become "voltage doubler" circuits alternating (i.e. one by the positive and the other by the negative Mains half-wave) is charged to the mains peak voltage. All in all the load INV, CFL therefore has double the mains peak voltage.
  • This circuit can be used, for example, lamps CFL, which are designed for 220 V networks, on a 110 V network (e.g. in the USA).
  • the invention can also be used to control the power consumption of a load be used.
  • CFL load
  • CFL low-pressure discharge lamp
  • CFL low-pressure discharge lamp
  • the size of the setpoint should preferably be inversely proportional be to the phase gating angle (large setpoint with low phase gating angle); in this way one obtains with the arrangement shown in FIG with "little" dimming (i.e. high brightness for a lamp) one high setpoint and vice versa. However, it is also generating one directly proportional relationship between phase angle and setpoint possible.
  • This duty cycle corresponds to the ratio of Times ta (triac switched off) and tb (triac partly switched on) within a network half-wave (see FIG. 2a).
  • FIG. 5 An exemplary circuit for implementing this control is shown in FIG. 5 shown.
  • An embodiment is shown in which the interface circuit IF (as in Figure 4) is integrated in the load and between rectifier GL and Smoothing capacitor C1 is switched.
  • a control circuit REG as part of the Interface circuit IF or switched separately from this.
  • the control unit comprises a third transistor T3, the base of which is connected to the collector of the second transistor T2 (via resistor R7) is connected and in Series with the resistor R9 part of a parallel connection from another Smoothing capacitor C2 and a resistor R10 is.
  • This parallel connection is connected in series with another resistor R8, so that this series circuit runs parallel to the smoothing capacitor C2.
  • the power consumption of the CFL lamp is controlled by the capacitor C2 smoothed voltage drop over a line as a control signal DL uncoupled.
  • the resistors R7, R8, R9 and R10 as well the smoothing capacitor C2 and the transistor T3 are used.
  • the ratio of the resistance values of R8 and R10 becomes a maximum value defined for the signal DL passed on to the inverter INV.
  • This Signal DL is used in the inverter as a setpoint value for control or Control of the power consumption of the load or the brightness of a lamp CFL.
  • This size DL can then in the inverter INV z. B. via an integrated Circuit are processed, the power consumption (brightness) of the CFL lamp controls accordingly.
  • the maximum value defined by R8 and R10 DL defines the maximum power consumption of the load or the maximum Brightness of the lamp.
  • transistor T3 If the transistor T3 is permanently on, by the ratio from the resistance value of R8 and the total resistance of the parallel connection from R10 and R9 a minimum value for that passed on to the inverter INV Signal DL defined.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)
  • Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)
  • Inverter Devices (AREA)
  • Electronic Switches (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)
EP04006568A 2003-04-04 2004-03-18 Circuit d'interface pour opérer des charges capacitives Expired - Lifetime EP1467474B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10315473 2003-04-04
DE10315473A DE10315473A1 (de) 2003-04-04 2003-04-04 Schnittstellenschaltung zum Betrieb von kapazitiven Lasten

Publications (3)

Publication Number Publication Date
EP1467474A2 true EP1467474A2 (fr) 2004-10-13
EP1467474A3 EP1467474A3 (fr) 2005-12-14
EP1467474B1 EP1467474B1 (fr) 2008-07-02

Family

ID=32864352

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04006568A Expired - Lifetime EP1467474B1 (fr) 2003-04-04 2004-03-18 Circuit d'interface pour opérer des charges capacitives

Country Status (8)

Country Link
US (1) US7129648B2 (fr)
EP (1) EP1467474B1 (fr)
JP (1) JP4518475B2 (fr)
KR (1) KR101070949B1 (fr)
CN (1) CN100525049C (fr)
CA (1) CA2462631A1 (fr)
DE (2) DE10315473A1 (fr)
TW (1) TWI362232B (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006120629A2 (fr) 2005-05-09 2006-11-16 Koninklijke Philips Electronics N.V. Procede et circuit permettant une gradation de l'intensite lumineuse au moyen d'un gradateur triac
WO2009121956A1 (fr) * 2008-04-04 2009-10-08 Lemnis Lighting Patent Holding B.V. Circuit de déclenchement de gradateur, système de gradateur et dispositif à gradation réglable
NL2002602C2 (en) * 2009-03-09 2010-09-13 Ledzworld B V Power driver for a light source.
EP1465330A3 (fr) * 2003-04-04 2011-04-13 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Procédé pour varier la consommation de puissance de charges capacitives

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7126287B2 (en) * 2004-10-16 2006-10-24 Osram Sylvania Inc. Lamp with integral voltage converter having phase-controlled dimming circuit with fuse-resistor network for reducing RMS load voltage
DE102005018793A1 (de) * 2005-04-22 2006-10-26 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Elektronisches Vorschaltgerät mit Phasendimmererkennung
EP2183946A1 (fr) * 2007-07-24 2010-05-12 A.C. Pasma Holding B.V. Procédé et circuit de commande de courant pour faire fonctionner une lampe à décharge de gaz électronique
US8829812B2 (en) * 2008-04-04 2014-09-09 Koninklijke Philips N.V. Dimmable lighting system
EP2257124B1 (fr) * 2009-05-29 2018-01-24 Silergy Corp. Circuit de connexion d'un circuit d'éclairage basse consommation à un variateur
DE102009033280A1 (de) * 2009-07-15 2011-03-24 Tridonic Gmbh & Co Kg Niedervoltversorgung für Betriebsgeräte im Standby-Zustand
DE102009051968B4 (de) 2009-11-04 2013-02-21 Insta Elektro Gmbh Verfahren zur Übertragung einer Steuerinformation von einem Steuergerät zu einer Lampeneinheit, ein dafür geeignetes Beleuchtungssystem, sowie Lampeneinheit
US20120106216A1 (en) * 2010-04-29 2012-05-03 Victor Tzinker Ac-dc converter with unity power factor
KR100995996B1 (ko) 2010-05-20 2010-11-22 심규상 전자식 스위치의 동작 전원공급장치
EP2636135B1 (fr) * 2010-11-04 2017-01-11 Philips Lighting Holding B.V. Détermination du rapport cyclique de variateur à triac
US8319451B2 (en) * 2011-02-10 2012-11-27 Osram Sylvania Inc. Two light level control circuit
CN104851726B (zh) * 2015-05-11 2018-03-30 广东小天才科技有限公司 按键结构及具有该按键结构的电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4876497A (en) * 1988-09-20 1989-10-24 Hc Power, Inc. Power factor corrector
JPH1022078A (ja) * 1996-07-06 1998-01-23 Horiuchi Denshi Sekkei:Kk 蛍光灯用リモートスイッチ
JP3532760B2 (ja) * 1998-04-01 2004-05-31 松下電器産業株式会社 放電ランプ点灯装置
IL129405A0 (en) * 1999-04-13 2000-02-17 Ein Hashofet Electrical Access A dimmer and dimming lighting system
JP2001052886A (ja) * 1999-08-12 2001-02-23 Toshiba Lighting & Technology Corp 点灯装置および照明装置
JP4505944B2 (ja) * 2000-05-11 2010-07-21 パナソニック電工株式会社 電源装置
IL147578A (en) * 2002-01-10 2006-06-11 Lightech Electronics Ind Ltd Lamp transformer for use with an electronic dimmer and method for use thereof for reducing acoustic noise

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1465330A3 (fr) * 2003-04-04 2011-04-13 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Procédé pour varier la consommation de puissance de charges capacitives
WO2006120629A2 (fr) 2005-05-09 2006-11-16 Koninklijke Philips Electronics N.V. Procede et circuit permettant une gradation de l'intensite lumineuse au moyen d'un gradateur triac
WO2006120629A3 (fr) * 2005-05-09 2007-03-08 Koninkl Philips Electronics Nv Procede et circuit permettant une gradation de l'intensite lumineuse au moyen d'un gradateur triac
WO2009121956A1 (fr) * 2008-04-04 2009-10-08 Lemnis Lighting Patent Holding B.V. Circuit de déclenchement de gradateur, système de gradateur et dispositif à gradation réglable
US8212494B2 (en) 2008-04-04 2012-07-03 Lemnis Lighting Patents Holding B.V. Dimmer triggering circuit, dimmer system and dimmable device
NL2002602C2 (en) * 2009-03-09 2010-09-13 Ledzworld B V Power driver for a light source.

Also Published As

Publication number Publication date
JP4518475B2 (ja) 2010-08-04
CA2462631A1 (fr) 2004-10-04
CN100525049C (zh) 2009-08-05
CN1536751A (zh) 2004-10-13
KR101070949B1 (ko) 2011-10-06
EP1467474B1 (fr) 2008-07-02
DE10315473A1 (de) 2004-10-21
TW200503586A (en) 2005-01-16
DE502004007468D1 (de) 2008-08-14
US20040195977A1 (en) 2004-10-07
EP1467474A3 (fr) 2005-12-14
KR20040086816A (ko) 2004-10-12
JP2004311435A (ja) 2004-11-04
TWI362232B (en) 2012-04-11
US7129648B2 (en) 2006-10-31

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