EP1520295A2 - Herstellungsverfahren für einen anisotropischen leiterfilm mit leitenden einsatzstücken - Google Patents

Herstellungsverfahren für einen anisotropischen leiterfilm mit leitenden einsatzstücken

Info

Publication number
EP1520295A2
EP1520295A2 EP03762727A EP03762727A EP1520295A2 EP 1520295 A2 EP1520295 A2 EP 1520295A2 EP 03762727 A EP03762727 A EP 03762727A EP 03762727 A EP03762727 A EP 03762727A EP 1520295 A2 EP1520295 A2 EP 1520295A2
Authority
EP
European Patent Office
Prior art keywords
inserts
substrate
pattern
cell
insert
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03762727A
Other languages
English (en)
French (fr)
Inventor
François BALERAS
Pierre Renard
Cyrille Rossat
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP1520295A2 publication Critical patent/EP1520295A2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/352Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]

Definitions

  • the present invention relates to a process for manufacturing an anisotropic conductive film with pointed conductive inserts.
  • micro-wiring TAB connection
  • ball connection ball connection
  • ACF ACF for "Anisotropic Conductive Film”
  • the connection is made by gold or aluminum wires.
  • the TAB connection uses an intermediate ribbon comprising a network of metallic conductors.
  • the input / output pads are connected by solder (fusible balls).
  • the ACF technique uses conductive films constituted by metallic particles incorporated in an insulating film or by metallic inserts included in an insulating film. The desired electrical connections between an interconnection substrate and a chip are then established by thermocompression, by placing the conductive films between the substrate and the chip.
  • FIGS. 1A-1F, 2, 3A-3C represent a known method of manufacturing conductive film with pointed inserts disclosed in French patent No. 2,766,618.
  • a first step of the method consists in etching a substrate 1, for example a silicon substrate.
  • a substrate 1 of crystallographic plane (110) is covered with a mask 3 made of silicon nitride or gold.
  • the mask 3 is etched so that the flat face 2 of the substrate appears through openings
  • the layer of polymer 7 is etched to form holes 8 in the extension of the cells 5 (cf. Figure 1D).
  • metal inserts 9 are formed, from the bottom of the cells
  • the last step consists in chemically etching the metal layer 6 in order to obtain the separation of the insulating film 7 provided with the inserts conductors 9 (see figure IF).
  • the etching of the silicon substrate 1 is carried out so that the cells 5 are of pyramidal shape with a square section.
  • the inserts 9 are consequently provided with points 10.
  • the holes 8 moreover have a circular section of dimension smaller than the section of the cells 5 at the level of the face 2 of the substrate.
  • the inserts 9 are then embedded in the insulating film 7 as shown in FIG. 2.
  • a drawback of the process for manufacturing an anisotropic conductive film described above is that it only allows the production of inserts provided with a single point. If you want to make inserts with two points (one at each end of the insert), it is necessary to modify the manufacturing process beyond the step which leads to the formation of a structure such as shown in Figure 1D. This modification of the process is illustrated in FIGS. 3A to 3C.
  • a mask 11 is then positioned, at a predetermined distance d, above the insulating film 7. The mask
  • the insulating film 7 is peeled off by chemical etching of the conductive layer 6, for example using hydrofluoric acid.
  • the result is a conductive film anisotropic 7 provided with inserts 14 having a point at each end (cf. FIG. 3C).
  • the variant of the known art method mentioned above advantageously allows the production of inserts having two pointed ends.
  • a drawback of this variant lies in the fact that a mask provided with holes must be placed very precisely above the film. The use of such a mask then limits the pitch of the inserts to around 50 ⁇ m.
  • the invention does not have the above drawbacks.
  • the invention relates to a method of manufacturing an anisotropic conductive film with conductive inserts, the method comprising etching at least one pattern in a monocrystalline substrate to form at least one cell having a bottom intended to draw the outline of a first end of an insert.
  • the design of the pattern is intended to reveal at least one protruding point and at least one hollow area in the bottom of the cell, when the pattern is etched along at least one crystallographic plane of the substrate with limiting crystallographic planes.
  • an insert formed from the cell has, at the end opposite its first end, at least one projecting point and at least one recessed area, the projecting part and the recessed area being opposite, respectively, of a hollow area and a point projecting from the first end of the insert.
  • the crystallographic plane along which the pattern is engraved is the plane (100) and the limiting crystallographic planes are the planes (111) and (110).
  • the manufacturing method according to the invention makes it possible to obtain conductive inserts of very small dimensions spaced at a very small pitch (typically, inserts of 1 to 2 ⁇ m can be spaced from 4 to 5 ⁇ m).
  • the inserts can advantageously have several points at each end, thus promoting electrical contact between the elements to be assembled.
  • the process is advantageously simple and reproducible.
  • the metal inserts are preferably produced by electrolysis. By this method, the shape of the inserts is directly linked to the topology of the cell formed in the substrate. It is also possible to produce the inserts by spraying or by evaporation of metal.
  • the topology of the cell in which the inserts are formed is obtained by etching patterns on the surface of a substrate.
  • the implantation of the patterns is preferably chosen to allow electrolytic growth capable of developing spikes at the two ends of the inserts.
  • the substrate consists of a monocrystalline material whose wet etching is anisotropic
  • Si silicon
  • SiC silicon carbide
  • the parameters to be defined for obtaining a cell topology according to the invention are: the shape of the patterns, the orientation of the patterns relative to the directions of the crystallographic planes and, in the case of several patterns, the arrangement of the patterns between them.
  • a cell can be produced, for example, from a group of simple patterns, from a truncated square, from several groups of simple patterns or from several groups of truncated squares.
  • a group of simple patterns can consist, for example, of at least four simple patterns, for example four circles or four squares, arranged and oriented in a specific manner.
  • a simple pattern is engraved according to the crystallographic plane (100) with limiting planes (111) or (110).
  • the pattern widens either because of the geometry of the pattern (for example in the case of a circle), or by the orientation of the pattern relative to the direction ⁇ 110> of the crystal lattice ( case of squares deforming), either because of the phenomenon of over-etching (etching under a mask).
  • the chosen arrangement of simple patterns means that the widening of the patterns allows them to meet.
  • the anisotropic wet etching discovers new crystalline planes other than the limiting planes (111) and (110). Then starts the engraving of the area framed by the simple patterns.
  • This zone comprising limiting crystal planes (111) and (110) and non-limiting planes, a point topology is created.
  • the etching of the substrate thus mainly consists of two phases.
  • a first phase is a phase during which the patterns are engraved independently of each other.
  • FIGS. 1A-1F and 2 represent different stages of a method of manufacturing conductive film anisotropic with pointed inserts according to the prior art
  • Figures 3A-3C show a variant of the manufacturing process shown in Figures 1A-1F and 2
  • FIGS. 4A-4F represent different stages of a first embodiment of the method for manufacturing an anisotropic conductive film with pointed inserts according to the invention
  • Figures 5A-5D, 6, 7, 8 and 9 show examples of patterns for obtaining pointed inserts according to the method of the invention
  • FIGS. 10A-10F represent different stages of a second embodiment of the method for manufacturing an anisotropic conductive film according to the invention
  • FIGS. 11A-11B and 12A-12B show examples of pointed inserts as well as examples of positioning pointed inserts in an insulating film according to the invention.
  • FIGS. 4A-4F represent different stages of a first embodiment of the method for manufacturing an anisotropic conductive film according to the invention.
  • the first step of this process consists in etching for example a silicon substrate 15.
  • the flat face 16 of the substrate 15, of crystallographic plane (110) is covered with a mask 17 made of silicon nitride, in gold, made of copper or any other material compatible with anisotropic wet etching.
  • the mask 17 is engraved so that the face 16 of the substrate 15 appears through openings 18 (FIG. 4A).
  • the visible parts of the planar face 16 then receive a chemical etching (for example using KOH) according to the crystallographic planes (111).
  • KOH chemical etching
  • a sacrificial layer for example a conductive layer 20, is deposited on the etched face 16 of the substrate 15 (cf. FIG. 4C).
  • the layer 20 follows the profile of the etched face 16. It can be made of Cu, Ti, Ni or SnPb. Its thickness is, for example, between 0.1 and 3 ⁇ m.
  • a polymer layer 21 (for example a polyimide layer 10 ⁇ m thick) is deposited on the metal layer 20. By a photolithography technique, the layer 21 is etched to form circular holes 22 aligned with the points 19 of the substrate 15 (cf. FIG. 4D).
  • metal inserts 23 are formed from the bottom of the cells to the level of the upper face of the polymer layer 21, filling the holes 22 (cf. figure 4E).
  • the metal which constitutes the metal inserts 23 can be, for example, nickel or copper (FIG. 6E).
  • the last step consists in chemically etching the metal layer 20 in order to obtain separation of the insulating film 21 provided with the inserts 23 (cf. FIG. 4F).
  • the holes 22 made in the insulating film 15 are of circular section.
  • the section of the holes 22 is less than the section of the cells at the face 16 of the substrate 15 so that the inserts are found embedded in the insulating film 15.
  • FIGS. 5A-5D, 6, 7, 8 and 9 show examples of patterns for obtaining pointed inserts according to the method of the invention.
  • FIG. 5A illustrates a first example of a pattern for producing points in the substrate.
  • the pattern consists of four circles C1, C2, C3, C4 positioned between them so that their centers define a square.
  • the axis passing through the centers of two circles which define one side of the square makes a non-zero angle, for example equal to 45 °, with the direction ⁇ 110> of the crystal lattice.
  • FIG. 5B illustrates the formation of a cavity by anisotropic wet etching (for example KOH-based etching) from the pattern shown in FIG. 5A.
  • the four circles C1, C2, C3, C4 are respectively transformed into four squares K1, K2, K3, K4 whose angles meet (cf. FIG. 5B).
  • FIG. 5B anisotropic wet etching
  • 5C illustrates the evolution of the engraving at the center of the 4 circles with the appearance of an unetched zone E in the shape of a star having several inclined planes. A progression of the etching leads to the formation of a point P provided with edges projecting from the etched area (cf. FIG. 5D). In FIGS. 5C and 5D, the engraving of the zones surrounding the central zone is not shown.
  • FIG. 6 illustrates another example of a pattern consisting of four squares, the sides of which are not oriented along the axis ⁇ 110> of the crystal lattice.
  • the four squares K5, K6, K7, K8 are implanted so as to form, together, a square pattern, each square having a side making an angle of 45 ° relative to the direction ⁇ 110> of the crystal lattice.
  • the anisotropic wet etching of the four squares gives four square cavities, the width of each square cavity being equal to the side of the initial square multiplied by V2.
  • the etching of the squares leads to the formation of cavities whose angles meet and which form a protruding point in their center.
  • Figure 7 illustrates a second example of a pattern formed on the basis of four squares.
  • the four squares K9, K10, Kll, K12 are implanted so as to form, together, a cross pattern, each square having two sides parallel to the direction ⁇ 110> of the crystal lattice.
  • Areas of over-etching SI, S2, S3, S4 surround the squares and allow them to meet. The distance between two squares depends on the desired over-etching depth.
  • FIG. 8 illustrates a truncated square pattern produced on the basis of two masked areas M1, M2. Two parallel sides of the square are parallel to the crystallographic direction ⁇ 110> of the substrate.
  • a first masked area M1 defines a square opening in which is placed a second masked area M2, also of square shape, centered in the opening defined by the masked area Ml.
  • the etching then takes place between the masked areas M1 and M2 and ends with the formation of a point centered in the area M2 and projecting from the etching area.
  • Figure 9 illustrates an example pattern for the formation of a multi-point insert. The pattern is made up of four truncated squares. It is carried out on the basis of five masked zones.
  • a first masked area M3 defines a square opening in which four other masked areas M4, M5, M6, M7 are placed.
  • the four masked areas M4, M5, M6, M7 are arranged in a square.
  • the etching of the unmasked substrate then creates a cavity which has four points projecting from the etched area.
  • FIGS. 10A-10F represent different stages of a second embodiment of the method for manufacturing an anisotropic conductive film according to the invention.
  • the method according to the second embodiment of the invention comprises the same steps as the method described above, namely: etching of a mask covering the substrate, chemical etching of the apparent substrate according to determined crystallographic planes, elimination of the mask and deposition of a sacrificial layer.
  • a photosensitive resin 24 is exposed through a mask to form holes 26 in the extension of the tips 25 formed in the cells of the substrate (cf. FIG. 10A).
  • metal inserts 27 are produced, preferably, by electrolysis (cf. FIG. 10B).
  • the resin is removed by dissolving in a solvent (see Figure 10C).
  • An insulating film 28 is then deposited by known methods of microelectronics on the metal layer 20 and the inserts 27 (cf. FIG. 10D). Plasma etching of the insulating film 28 allows the tips of the inserts to be released (see FIG. 10E). The insulating film 28 is then peeled off (cf. FIG. 10F), for example using hydrofluoric acid.
  • FIGS. 11A-11B and 12A-12B illustrate examples of the shape of inserts according to the invention, as well as the positioning of these inserts in holes in insulating film.
  • Figures 11A-11B show a tip insert and
  • Figures 12A-12B show a tip insert.
  • the inserts, in the shape of a cross, are placed in holes t of the insulating film.
  • the filling of the cells formed in the substrate can be carried out not only by electrolytic growth as mentioned above, but also by spraying or by evaporation of metal. In the latter two cases, the metal deposited on the surface of the photosensitive resin must then be removed. Several techniques are then possible such as, for example, mechanical lapping or chemical mechanical polishing.
  • the second embodiment of the invention it is also possible to deposit first the photosensitive resin between the inserts and then the insulating film.
  • the sacrificial layer is then etched and the photosensitive resin dissolved.
  • This last variant makes it possible to accentuate the protrusion of the tips of the inserts relative to the insulating film.
  • the tips of the inserts make it possible to keep a slight spacing between the film and the chip to be connected, which leaves the possibility of using a film of adhesive. on all surfaces to be contacted and therefore excellent mechanical strength.
  • the method of manufacturing anisotropic conductive film with pointed inserts according to the invention makes it possible to descend very low in the size of the inserts, typically 1 to 2 ⁇ m in diameter for a pitch of 4 to 5 ⁇ m. This allows the interconnection of chips whose inputs / outputs have a very small pitch.
  • the etching step implemented in the method according to the invention can be completed by an additional etching step to accentuate the height of the point.
  • the additional etching step can be, for example, a purely anisotropic etching (plasma etching) or a purely isotropic etching (wet etching). This engraving can be performed before or after the first.
  • the basic pattern can be in shape any, as long as it allows to obtain a central zone which is engraved less quickly.
  • the method according to the invention leads to the formation of a topology where the substrate has hollow areas having a very pronounced pointed shape.
  • these hollow zones of very pointed, pronounced shape allow obtaining very sharp metal inserts during electrolysis, and this not only on the side where the insert has a hollow part but also on the other side.
  • the growth by electrolysis of the metal inserts is improved by the presence of the strong topology of the substrate.
  • the point effect faster growth linked to current lines
  • a similar effect is obtained during the electrolysis.
  • the ends of the conductive inserts are made of a hard material (for example nickel). This allows these ends to be able to pierce the oxide layer covering the pad to be connected.
  • the inserts can be made entirely from this hard material. As a variant, only the projecting part of the inserts can be made of hard material.
  • the insulating film can be a thermoplastic polymer film or a multilayer film whose outer layers are thermoplastic. This gives it a self-adhesive function during assembly. Otherwise, you must provide the insulating film with a layer of glue before assembly.
  • the anisotropic conductive film obtained by the method of the invention makes it possible to mount a chip or an integrated circuit directly on an interconnection substrate, without it being necessary to specifically treat the pads of the chip or of the integrated circuit.

Landscapes

  • Micromachines (AREA)
  • Manufacturing Of Electric Cables (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Non-Insulated Conductors (AREA)
EP03762727A 2002-07-05 2003-07-02 Herstellungsverfahren für einen anisotropischen leiterfilm mit leitenden einsatzstücken Withdrawn EP1520295A2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0208451 2002-07-05
FR0208451A FR2842023B1 (fr) 2002-07-05 2002-07-05 Procede de fabrication de film conducteur anisotrope a inserts conducteurs pointus
PCT/FR2003/002056 WO2004006324A2 (fr) 2002-07-05 2003-07-02 Procede de fabrication de film conducteur anisotrope a inserts conducteurs pointus

Publications (1)

Publication Number Publication Date
EP1520295A2 true EP1520295A2 (de) 2005-04-06

Family

ID=29725195

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03762727A Withdrawn EP1520295A2 (de) 2002-07-05 2003-07-02 Herstellungsverfahren für einen anisotropischen leiterfilm mit leitenden einsatzstücken

Country Status (4)

Country Link
US (1) US20050233587A1 (de)
EP (1) EP1520295A2 (de)
FR (1) FR2842023B1 (de)
WO (1) WO2004006324A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10326298B4 (de) 2003-06-11 2008-03-20 Avery Dennison Zweckform Office Products Europe Gmbh Etikettenbogen
EP3365885A1 (de) 2015-10-23 2018-08-29 CCL Label, Inc. Etikettenfolienanordnung mit verbesserter druckerzuführung
USD813945S1 (en) 2016-03-22 2018-03-27 Ccl Label, Inc. Label sheet
USD862601S1 (en) 2016-07-07 2019-10-08 Ccl Label, Inc. Carrier assembly
US10038264B2 (en) 2016-11-14 2018-07-31 Microsoft Technology Licensing, Llc Universal coupling for electrically connecting a flexible printed circuit to another flexible printed circuit in multiple different orientations
CN108538792A (zh) * 2018-05-16 2018-09-14 武汉华星光电半导体显示技术有限公司 导电物质分布状态可控的异方性导电胶及其制备方法
USD914085S1 (en) 2018-08-29 2021-03-23 Ccl Label, Inc. Label sheet layout assemblies

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US5135606A (en) * 1989-12-08 1992-08-04 Canon Kabushiki Kaisha Process for preparing electrical connecting member
US5379515A (en) * 1989-12-11 1995-01-10 Canon Kabushiki Kaisha Process for preparing electrical connecting member
JPH03194876A (ja) * 1989-12-23 1991-08-26 Canon Inc 電気的接続部材の製造方法
KR0162531B1 (ko) * 1994-09-30 1998-12-15 가네꼬 히사시 액정표시장치에 사용되는 이방성 도전막의 제조방법
FR2726397B1 (fr) * 1994-10-28 1996-11-22 Commissariat Energie Atomique Film conducteur anisotrope pour la microconnectique
FR2766618B1 (fr) * 1997-07-22 2000-12-01 Commissariat Energie Atomique Procede de fabrication d'un film conducteur anisotrope a inserts conducteurs
JP2001091579A (ja) * 1999-09-24 2001-04-06 Jsr Corp シート状コネクターおよびその製造方法、半導体装置接続装置並びに検査装置
DE60107519T2 (de) * 2000-09-25 2005-12-15 Jsr Corp. Anisotropisches leitfähiges Verbindungsblatt, Herstellungsverfahren dafür und Produkt davon

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Also Published As

Publication number Publication date
US20050233587A1 (en) 2005-10-20
WO2004006324A3 (fr) 2004-12-09
FR2842023B1 (fr) 2005-09-30
FR2842023A1 (fr) 2004-01-09
WO2004006324A2 (fr) 2004-01-15

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