EP1523025A2 - Feldemissionselektronenquelle - Google Patents

Feldemissionselektronenquelle Download PDF

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Publication number
EP1523025A2
EP1523025A2 EP02022014A EP02022014A EP1523025A2 EP 1523025 A2 EP1523025 A2 EP 1523025A2 EP 02022014 A EP02022014 A EP 02022014A EP 02022014 A EP02022014 A EP 02022014A EP 1523025 A2 EP1523025 A2 EP 1523025A2
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European Patent Office
Prior art keywords
layer
electron
conductive
surface electrode
carbide
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EP02022014A
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English (en)
French (fr)
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EP1523025B1 (de
EP1523025A3 (de
Inventor
Takuya Komoda
Yoshiyuki Takegawa
Koichi Aizawa
Takashi Hatai
Tsutomu Ichihara
Yoshiaki Honda
Yoshifumi Watabe
Toru Baba
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Panasonic Corp
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Panasonic Corp
Matsushita Electric Works Ltd
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Priority claimed from JP2002083927A external-priority patent/JP3755474B2/ja
Priority claimed from JP2002083928A external-priority patent/JP2003281993A/ja
Application filed by Panasonic Corp, Matsushita Electric Works Ltd filed Critical Panasonic Corp
Publication of EP1523025A2 publication Critical patent/EP1523025A2/de
Publication of EP1523025A3 publication Critical patent/EP1523025A3/de
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02—Main electrodes
    • H01J1/30—Cold cathodes, e.g. field-emissive cathode
    • H01J1/312—Cold cathodes, e.g. field-emissive cathode having an electric field perpendicular to the surface, e.g. tunnel-effect cathodes of metal-insulator-metal [MIM] type

Definitions

  • the present invention relates to a field emission-type electron source for emitting electron beams by means of the field emission phenomenon.
  • the electron source disclosed in Japanese Patent Publication No. 2987140 includes a lower electrode, a surface electrode (upper electrode) composed of a metal thin-film, and an electron transit layer (strong-field drift layer) provided between the lower and surface electrodes.
  • the surface electrode is disposed opposed to the lower electrode with interposing the electron transit layer therebetween.
  • an oxidized or nitrided porous polycrystalline silicon layer is used as the electron transit layer.
  • a collector is positioned opposed to the surface electrode while exposing the surface electrode to a vacuum space. Then, a DC current is applied between the surface and lower electrodes such that the surface electrode has a higher potential than that of the lower electrode, and simultaneously another DC current is applied between the collector and surface electrodes such that the collector has a higher potential than that of the surface electrode.
  • electrons are injected from the lower electrode to the electron transit layer, and then emitted through the surface electrode after drifting within the electron transit layer.
  • the surface electrode is typically made of chemically stable metal (e.g. noble metal such as gold) .
  • the thickness of the surface electrode is set at about 10 nm.
  • the terms "diode current Ips" and “emission current (emission electron current) Ie” generally mean a current flowing between the surface and lower electrodes and a current flowing between the collector and surface electrodes, respectively. Greater ratio of the emission current Ie to the diode current (Ie / Ips) provides higher electrode emitting efficiency [(Ie / Ips) x 100 (%)].
  • the above electron source can emit electrons even if the DC voltage to be applied between the surface and lower electrodes is in a low range of about 10 to 20 V.
  • the electron source can exhibit enhanced electron emission characteristics having a low dependence on vacuum degree, and emit electrons stably without occurrence of the so-called popping phenomenon during electron emission.
  • the lower electrode of the electron source comprises a semiconductor substrate having a resistivity relatively close to that of a conductor, and an ohmic electrode formed on the back surface of the semiconductor substrate.
  • the lower electrode comprises an insulative substrate and a metal conductive layer formed on the insulative substrate.
  • the electron source disclosed in Japanese Patent Laid-Open Publication No. 2001-126610 comprises a surface electrode partially including a carbon region made of carbon or carbon compounds. This electron source can advantageously prevent excessive diode current Ips to provide enhanced electron emitting efficiency.
  • the conventional electron sources as described above are used in a vacuum-sealed state.
  • an assembling process of such electron sources involves a relatively high-temperature thermal process including a vacuum-sealing process (which is performed at about 500 °C), which inevitably increases the electrical resistance of the surface electrode and/or the lower electrode.
  • the increased electrical resistance makes it difficult for voltage to be adequately applied between the surface and lower electrodes and/or between the collector and surface electrodes, resulting in deteriorated electron emission characteristics (such as lowered emission current or electron emitting efficiency).
  • the surface electrode is composed of a metal thin-film.
  • the thickness of the surface electrode is set at 10 nm as in the foregoing electron source.
  • a gold thin-film commonly used as the surface electrode is involved with agglomeration at a temperature of 400 °C or more.
  • the resulting agglomeration deteriorates the thickness uniformity and continuity of the thin film, and thereby the electrical resistance of the surface electrode is increased, resulting in deteriorated electron emission characteristics.
  • Tungsten and aluminum are known as metal having high resistibility to such agglomeration.
  • the surface electrode is made of tungsten or aluminum, the surface of the electrode will be subject to oxidation, which leads to deteriorated electron emitting efficiency.
  • the lower electrode has an increased electrical resistance. The following factors are assumed as the reason for the increased electrical resistance.
  • one of the proposed electron sources has a MIM (Metal-Insulator-Metal) structure including an insulating layer serving as the electron transit layer.
  • Another electron source has a MIS (Metal-Insular-Semiconductor) including a semiconductor layer provided between the electron transit layer and the lower electrode.
  • a surface electrode includes a metal thin-film portion having a flat surface, and a plurality of island-shaped raised portions protruding from the surface of the metal thin-film portion, the raised portions being continuously and integrally formed with the thin-film portion.
  • the respective metal raised portions of this electron sources are connected with each other by the metal thin-film portion, and thereby the film thickness of the metal thin-film portion will impose a restriction on a lower limit of the electrical resistance of the surface electrode.
  • the thickness of the metal thin-film portion cannot be sufficiently reduced or the electron emitting efficiency cannot be sufficiently enhanced.
  • an electron source field emission-type electron source
  • the electron transit layer is formed on the lower electrode and composed of a composite nanocrystal layer including polycrystalline silicon and a number of nanocrystalline silicons residing adjacent to a grain boundary of the polycrystalline silicon.
  • the surface electrode is formed on the electron transit layer.
  • an electron passing through the electron transit layer is emitted through the surface electrode.
  • At least a portion of the surface electrode and/or at least a portion of the lower electrode are made of layer-structured conductive carbide or layer-structured conductive nitride.
  • the conductive carbide or conductive nitride has a relatively high conductivity, a relatively low work function, a melting point higher than noble metal, and an excellent diffusion barrier performance. In addtion, the conductive carbide or conductive nitride has an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the electron source of the present invention at least a portion of the surface electrode and/or at least a portion of the lower electrode are made of layer-structured conductive carbide or layer-structured conductive nitride.
  • the electron source of the present invention can provide enhanced thermal resistance of the surface electrode and/or the lower electrode while suppressing the deterioration of electron emission characteristics. This makes it possible to prevent electron emission characteristics from being deteriorated due to a thermal process such as a vacuum-sealing process.
  • an electron source comprising a lower electrode, a surface electrode, and an electron transit layer.
  • the electron transit layer is interposed between the lower electrode and the surface electrode to allow an electron to pass therethrough.
  • An electron passed through the electron transit layer is emitted through the surface electrode.
  • the surface electrode is composed of a multilayer film including a conductive carbide or conductive nitride layer and a noble metal layer, the surface electrode having a surface formed with a number of concave portions allowing the multilayer film to have a locally reduced thickness.
  • an energy loss due to electron scattering will be reduced in the region of the surface electrode formed with the concave portions as comparted to other region. Further, electron emission characteristics can be enhanced while suppressing the increase of electrical resistance in the surface electrode because the electrical resistance of the surface electrode is substantially determined by the film thickness of the multilayer film composed of a conductive carbide layer or conductive nitride layer and a noble metal layer.
  • an electron source 10 includes a substrate 1 composed of an insulative substrate (e.g. glass substrate or ceramic substrate), and a lower electrode 2 made of layer-structured conductive carbide and formed on one (diffusing surface) of the principal surfaces of the substrate 1.
  • a semiconductor layer or a non-doped polycrystalline silicon layer 3 is formed on the lower electrode 2.
  • An electron transit layer 6 strong field drift layer
  • a surface electrode 7 made of layer-structured conductive carbide is formed on the electron transit layer 6.
  • the surface electrode 7 and the lower electrode 2 are disposed opposed to one another, and the electron transit layer 6 is interposed between the surface electrode 7 and the lower electrode 2.
  • the thickness of the surface electrode 7 is set at 10 nm or less.
  • the first embodiment employs the insulative substrate as the substrate 1
  • any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate 1.
  • the polycrystalline silicon layer 3 is interposed between the electron transit layer 6 and the lower electrode 2 in the first embodiment, the electron transit layer 6 may be formed directly on the lower electrode 2 without interposing the polycrystalline silicon layer 3.
  • a collector 21 may be positioned opposed to the surface electrode 7, as shown in Fig. 2. Then, after evacuating the space between the surface electrode 7 and the collector 21 to provide a vacuum space, a DC voltage Vps is applied between the surface electrode 7 and the lower electrode 2 such that the surface electrode 7 has a higher potential than that of the lower electrode 2, and simultaneously a DC voltage Vc is applied between the collector 21 and the surface electrode 7 such that the collector 21 has a higher potential than that of the surface electrode 7.
  • Vps DC voltage
  • Vc DC voltage
  • the one-dot chain lines in Fig. 2 indicate the flow of the electrons e - emitted through the surface electrode 7.
  • the electron reaching the surface of the electron transit layer 6 can be considered as a hot electron.
  • the electron will be emitted into the vacuum space.
  • electrons pass through the electron transit layer 6 under an electric field between the lower electrode 2 and the surface electrode 7 which is induced when the voltage is applied between the lower and surface electrodes.
  • the electrons are moved from the lower electrode 2 to the surface electrode 7 through the electron transit layer 6 by the electric field caused when the surface electrode 7 has a higher potential than that of the lower electrode 2.
  • greater ratio (Ie / Ips) of the emission current Ie flowing between the collector 21 and the surface electrode 7 to the diode current Ips flowing between the surface electrode 7 and the lower electrode 2 provides higher electron emitting efficiency.
  • the electron transit layer 6 at least, includes a plurality of columnar polycrystalline silicon grains 51 (semiconductor crystals) disposed along with each other on the side of the selected principal surface of the substrate 1, a thin silicon oxide film 52 formed on each surface of the grains 51, a number of nano-order silicon nanocrystals 63 (semiconductor nanocrystals) interposed between the adjacent grains 51, and a number of silicon oxide films 64 each of which is formed on each surface of the silicon nanocrystals 63 and is composed of an insulating film having a film thickness less than each crystal grain size of the silicon nanocrystals 63.
  • each of the grains has a porous surface, and a crystalline state is maintained at each central region of the grains.
  • Each of the grains 51 extends in the direction perpendicular to the lower electrode 2 or in the thickness direction of the lower electrode 2.
  • the electron emission would be caused based on the following model.
  • a DC voltage Vps is applied between the surface electrode 7 and the lower electrode 2 such that the surface electrode 7 has a higher potential than that of the lower electrode 2, and simultaneously a DC voltage Vc is applied between the collector 21 and the surface electrode 7 such that the collector 21 has a higher potential than that of the surface electrode 7.
  • Vps a DC voltage
  • Vc a DC voltage
  • the collector 21 and the surface electrode 7 such that the collector 21 has a higher potential than that of the surface electrode 7.
  • the electrons After tunneling through the surface electrode 7, the electrons are emitted from the surface electrode 7 to the vacuum space.
  • the electrons injected from the lower electrode 2 into the electron transit layer 6 are accelerated by the electric field acting to silicon oxide films 64, and then emitted through the surface electrode 7 after drifting approximately without scattering due to the silicon nanocrystals 63 (ballistic electron emission phenomenon). Further, heat generated at the electron transit layer 6 can be released through the grains 51. Thus, during electron emission, the electrons can be stably emitted without occurrence of the popping phenomenon.
  • the electrons reaching the surface of the electron transit layer 6 (hot electrons) are emitted into the vacuum space after readily tunneling through the surface electrode 7.
  • the electron source based on such an operational principle is referred to as Ballistic electron Surface-emitting Device.
  • the lower electrode 2 and the surface electrode 7 is made of conductive carbide.
  • the conductive carbide has a relatively high conductivity and a relatively low work function.
  • the conductive carbide also has a melting point higher than that of noble metal such as gold, and an excellent diffusion barrier performance.
  • the conductive carbide has an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the conductive carbide having these properties includes chromium carbide, molybdenum carbide, tungsten carbide, vanadium carbide, niobium carbide, tantalum carbide, titanium carbide, zirconium carbide, and hafnium carbide. In view of thermal stability, work function and reproducibility, it is preferable to use titanium carbide, zirconium carbide or hafnium carbide.
  • the lower electrode 2 and the surface electrode 7 is made of layer-structured conductive carbide.
  • the electron source according to the first embodiment can provide enhanced thermal resistance of the lower electrode 2 and the surface electrode 7 while suppressing the deterioration of electron emission characteristics. This makes it possible to prevent not only the increase of electrical resistance in the lower electrode 2 and the surface electrode 7 due to a thermal process such as a vacuum-sealing process but also agglomeration in the surface electrode 7, and thereby to avoid undesirable deterioration of electron emission characteristics.
  • the lower electrode 2 made of the conductive carbide can prevent respective atoms constituting the substrate 1 and the semiconductor layer 3 (the electron transit layer 6 in case of omitting the semiconductor layer 3) from being diffused therebetween.
  • the materials of the substrate 1 and the semiconductor layer 3 (the electron transit layer 6 in case of omitting the semiconductor layer 3) can be selected from various alternatives.
  • the surface electrode 7 made of the conductive carbide can prevent respective atoms constituting the surface electrode 7 and the electron transit layer 6 from being diffused therebetween.
  • the materials of the surface electrode 7 and the electron transit layer 6 can be selected from various alternatives.
  • each of the lower electrode 2 and the surface electrode 7 is entirely made of layer-structured conductive carbide.
  • at least a portion of each of the lower electrode 2 and the surface electrode 7 may be made of layer-structured conductive carbide, and the remaining potion may be made of metal such as Cr, W, Ti, Al, Cu, Au, Pt or Mo; alloy containing such metal; or semiconductor material such as impurity-doped polycrystalline silicon.
  • either one of the lower electrode 2 and the surface electrode 7 may be devoid of the conductive carbide.
  • the lower electrode 2 or the surface electrode 7 may be made by using metal such as Cr, W, Ti, Al, Cu, Au, Pt or Mo; alloy containing such metal; or semiconductor material such as impurity-doped polycrystalline silicon.
  • metal such as Cr, W, Ti, Al, Cu, Au, Pt or Mo
  • alloy containing such metal or semiconductor material such as impurity-doped polycrystalline silicon.
  • semiconductor material such as impurity-doped polycrystalline silicon.
  • the glass substrate When a glass substrate is used as the substrate 1, the glass substrate may be appropriately selected from a silica glass substrate, no-alkali glass substrate, low-alkali glass substrate or soda-lime glass substrate, depending on a process temperature.
  • the substrate 1 In case of employing a ceramic substrate, the substrate 1 may be composed, for example, of an alumina substrate.
  • the electron source 10 according to the first embodiment may be used as an electron source for display devices. In this case, a suitable patterning of the lower electrode 2, the surface electrode 7 and the electron transit layer 6 may be appropriately selected.
  • a lower electrode 2 composed of a conductive carbide layer is first formed on one of the principal surfaces of a substrate 1 through a sputtering method or another suitable method. Then, a semiconductor layer or a non-doped polycrystalline silicon layer 3 is formed on the side of the selected principal surface of the substrate 1 (on the lower electrode 2 herein). Through the above step, the structure as shown in Fig. 4A is obtained.
  • a film forming method for a conductive carbide layer serving as the lower electrode 2 will be described later.
  • the polycrystalline silicon layer 3 may be formed through various film forming methods such as a CVD method (e.g. LPCVD method, plasma CVD method or catalytic-CVD method), a sputtering method or a CGS (Continuous Grain Silicon) method.
  • a porous region is provided up to a given depth of the polycrystalline silicon layer 3 by means of an anodizing process.
  • an anodizing process a processing bath is used which contains an electrolytic solution consisting of a mixture prepared by mixing a water solution containing 55 wt% of hydrogen fluoride with ethanol at the ratio of about 1 : 1.
  • the anodizing process is performed by immersing a platinum electrode (not shown) and the lower electrode 2 into the processing bath, and applying a certain voltage between the platinum electrode and the lower electrode 2 at a constant current while irradiating the polycrystalline silicon layer 3 with light, to form the porous polycrystalline silicon layer 4.
  • the obtained porous polycrystalline silicon layer 4 includes a polycrystalline silicon grain and a silicon nanocrystal. While the porous region is formed in a portion (up to a given depth) of the polycrystalline silicon layer 3 in the first embodiment, the porous region may be formed in the entire polycrystalline silicon layer 3 (up to a depth reaching the substrate 1).
  • the porous polycrystalline silicon layer 4 is oxidized through an oxidation process. Through this step, an electron transit layer 6 composed of the oxidized porous polycrystalline silicon layer is formed, and thus the structure as shown in Fig. 4C is obtained.
  • the porous polycrystalline silicon layer 4 is oxidized, for example, through a rapid heating method to form the electron transit layer 6 including the grains 51, the silicon nanocrystals 63, and the silicon oxide films 52, 64 (see Fig. 3).
  • a lamp annealing apparatus is used in the rapid heating method for the oxidation process.
  • a furnace is kept in O 2 gas atmosphere.
  • the substrate is heated from room temperature up to a given oxidation temperature (e.g. 900 °C) at a specific programming rate (e.g. 80 °C/sec).
  • the substrate is maintained at the oxidation temperature only for a given oxidation time-period (e.g. one hour) to perform a rapid thermal oxidation (RTO) processing.
  • RTO rapid thermal oxidation
  • the oxidation process is not limited to the rapid heating method.
  • the electron transit layer 6 including the grains 51, the silicon nanocrystals 63 and the silicon oxide films 52, 64 may be formed by using an oxidation-processing bath containing an electrolytic solution (e.g. 1 mole/L of H 2 SO 4 , 1 mole/L of HNO 3 , or aqua regia), and applying a constant current between a platinum electrode (not shown) and the lower electrode 2 to electrochemically oxidize the porous polycrystalline silicon layer 4.
  • an electrolytic solution e.g. 1 mole/L of H 2 SO 4 , 1 mole/L of HNO 3 , or aqua regia
  • a surface electrode 7 composed of a conductive carbide layer is formed on the electron transit layer 6, for example, through a sputtering method.
  • the electron source 10 as shown in Fig. 4D is obtained.
  • a film forming method for the conductive carbide layer serving as the surface electrode 7 will be described later in conjunction with the film forming method for the lower electrode 2.
  • the manufacturing process of the electron source 10 according to the first embodiment can provide the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics.
  • the lower electrode 2 and the surface electrode 7 each composed of the conductive carbide layer are formed through a sputtering method.
  • a usable sputtering method may be selected from various types such as an RF sputtering method, RF magnetron sputtering method, DC sputtering method and DC magnetron sputtering method.
  • the conductive carbide layer is formed through a sputtering method using a target consisting of conductive carbide. These methods can provide the conductive carbide layer with excellent stability and reproducibility as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • an existing sputtering apparatus can be readily diverted to an apparatus for forming the conductive carbide layer, which provides a downsized equipment investment and a reduced equipment cost.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the conductive carbide layer can be formed at a relatively low process temperature.
  • the film forming method for the conductive carbide layer is not limited to the aforementioned sputtering methods.
  • the conductive carbide layer may be 'formed through a vacuum evaporation method using a deposition source consisting of conductive carbide, or a reactive sputtering method using a target consisting of metal (pure metal) and gas (reactive gas) including carbon.
  • the vacuum evaporation method or the reactive sputtering method can also provide the conductive carbide layer with excellent stability and reproducibility as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the conductive carbide layer can be formed at a relatively low process temperature.
  • an existing vacuum evaporation apparatus can be readily diverted to an apparatus for forming the conductive carbide layer, which provides a downsized equipment investment and a reduced equipment cost.
  • An EB (Electron Beam) vacuum evaporation method is one of appropriate vacuum evaporation methods to be used, because conductive carbide has a high melting point.
  • the reactive sputtering method using a target consisting of metal (pure metal) and gas (reactive gas) including carbon can facilitate the control of carbon concentration in the conductive carbide layer. That is, in the reactive sputtering method, a type of the reactive gas or a mixing ratio of inert gas such as Ar to the reactive gas including carbon atoms can be appropriately selected to control a carbon concentration in the conductive carbide layer so as to provide the conductive carbide layer having a desired carbon concentration.
  • the reactive sputtering method can provide the conductive carbide layer including a less amount of metal impurities as compared to the sputtering method using conductive carbide as a target, and thereby performance decrement due to impurities can be suppressed.
  • the film forming method for the conductive carbide layer may further include a method of annealing a metal film (e.g. titanium film, zirconium film or hafnium film) under gas atmosphere including carbon. This method is advantageously to improve the purity and film quality of the conductive carbide layer.
  • the film forming method for the metal film may include a CVD method, vacuum evaporation method and sputtering method. In view of productivity and film quality, it is preferable to use a DC magnetron sputtering method using Ar gas. For example, when CH 4 gas is used as the gas including carbon, the conductive carbide layer can be formed by annealing the metal film at a temperature of 1000 °C .
  • the method of annealing a metal film under gas atmosphere including carbon can provide the conductive carbide layer with excellent reproducibility and stability. This makes it possible to achieve a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • an existing apparatus DC magnetron sputtering apparatus or appealing apparatus
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the above annealing method is suitable for forming the lower electrode 2, particularly, in a ceramic substrate used as the substrate 1.
  • the conductive carbide layer may be formed through a CVD method.
  • the CVD method can provide the conductive carbide layer with excellent reproducibility and stability as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the CVD method is excellent in a step-coverage performance.
  • an organic metal compound such as (C 5 H 5 ) 2 Ti Cl 2 (Dichlorotitanocene) may be used as a deposition source.
  • chloride such as titanium chloride, zirconium chloride or hafnium chloride
  • a mixed gas of hydrogen and gas including carbon atom such as CH 4 (methane), C 3 H 8 (propane), C 6 H 5 CH 3 (toluene), CCl 4 (carbon tetrachloride) or CH 3 OH (methanol) may be used as the reactive gas.
  • a thermal CVD method involves a process temperature of 600 °C or more, it is preferable to use the plasma CVD method capable of lowering the process temperature.
  • the conductive carbide layer may be formed by annealing a multilayer consisting of a metal film (e.g. titanium film) and a carbon film.
  • the conductive carbide layer may be formed by annealing a film made of a mixture of metal (e.g. titanium) and carbon.
  • the electron transit layer 6 is composed of the oxidized porous polycrystalline silicon layer.
  • the electron transit layer 6 may be composed of a nitrided porous polycrystalline silicon layer or an oxynitrided porous polycrystalline silicon layer.
  • the electron transit layer 6 may be composed of any other suitable oxidized, nitrided or oxynitrided porous semiconductor layer.
  • a nitriding process of nitriding the porous polycrystalline silicon layer 4 through a rapid heating method using NH 3 gas may be employed, as a substitute for the oxidation process of oxidizing the layer 4 through the rapid heating method using O 2 gas.
  • an oxynitriding process of oxynitriding the porous polycrystalline silicon layer 4 through a rapid heating method using a mixed gas of O 2 gas and NH 3 gas may be employed, as a substitute for the oxidation process of oxidizing the layer 4 through the rapid heating method using O 2 gas.
  • a silicon oxynitride film will be formed instead of the silicon oxide films 52, 64 in Fig. 3.
  • an electron source 10 comprises a substrate 1 composed of an insulative substrate (e.g. insulative glass substrate or insulative ceramic substrate), and an electron source device 10a formed on one of the principal surfaces of the substrate 1.
  • the electron source device 10a comprises a lower electrode 2 formed on the selected principal surface of the substrate 1, a semiconductor layer or a non-doped polycrystalline silicon layer 3 formed on the lower electrode 2, an after-mentioned electron transit layer 6 formed on the polycrystalline silicon layer 3, and a surface electrode 7 formed on the electron transit layer 6.
  • the surface electrode 7 and the lower electrode 2 are disposed opposed to one another, and the electron transit layer 6 is interposed between the surface and lower electrodes.
  • the thickness of the lower electrode 2 is set at about 300 nm, and the thickness of the surface electrode 7 is set such that it does not exceed 10 nm.
  • the second embodiment employs the insulative substrate as the substrate 1
  • any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate 1
  • the lower electrode 2 may be comprised of the semiconductor substrate and a conductive layer (e.g. ohmic electrode) deposited on the semiconductor substrate.
  • the polycrystalline silicon layer 3 is interposed between the electron transit layer 6 and the lower electrode 2 in the first embodiment, the electron transit layer 6 may be formed directly on the lower electrode 2 without interposing the polycrystalline silicon layer 3.
  • the lower electrode 2 is composed of a single layer thin-film made of a metal (e.g. Mo, Cr, W, Ti, Ta, Ni, Al, Cu, Au or Pt; alloy containing such metal; or intermetallic compound such as silicide).
  • a metal e.g. Mo, Cr, W, Ti, Ta, Ni, Al, Cu, Au or Pt; alloy containing such metal; or intermetallic compound such as silicide.
  • the lower electrode 2 may be composed of a multilayer thin-film made of such a metal.
  • the lower electrode 2 may be made of a semiconductor material such as impurity-doped polycrystalline silicon.
  • the electron transit layer 6 is formed by subjecting the polycrystalline silicon layer to a anodizing process and an oxidation process as described later.
  • the electron transit layer 6 in the second embodiment includes grains 51, silicon oxide films 52, silicon nanocrystals 63, and silicon oxide films 64 (see Fig. 3).
  • the remaining region other than the grains 51, silicon nanocrystals 63 and silicon oxide films 52, 64 is formed as an amorphous region made of amorphous silicon or partially oxidized amorphous silicon.
  • the polycrystalline silicon and the number of silicon nanocrystals 63 residing adjacent to the grain boundary of the polycrystalline silicon are mixed together within the electron transit layer 6.
  • the surface electrode 7 is composed of a multilayer film having a conductive carbide or conductive nitride layer 7a deposited on the electron transit layer 6 and a noble metal layer 7b deposited on the conductive carbide or conductive nitride layer 7a.
  • the surface of the multilayer film is formed with a number of concave portions 8 allowing the multilayer film to have a locally reduced thickness.
  • the noble metal layer 7b is made of platinum as a noble metal. While the noble metal is not limited to platinum and the noble metal layer 7b may be made, for example, of gold or iridium, it is preferable to use platinum in view of reproducibility in a film forming process.
  • the thickness of the conductive carbide or conductive nitride layer 7a is set such that it does not exceed 4 nm
  • the total thickness of the conductive carbide or conductive nitride layer 7a and the noble metal layer 7b is set such that it does not exceed 10 nm.
  • the surface of the surface electrode 7 is formed with the number of concave portions 8. In the region having the concave portions 8, the surface of the conductive carbide or conductive nitride layer 7a is exposed to outside. That is, the depth of the concave portion 8 is approximately equal to the thickness of the noble metal layer 7b. However, the depth of the concave portion 8 may be less than, for example about one-half of, the thickness of the noble metal layer 7b.
  • the electron source 10 or the electron source device 10a as a ballistic electron surface-emitting type electron source according to the second embodiment steps of emitting electrons or an electron emission model is the same as that of the electron source 10 according to the first embodiment (see Figs. 2 and 3).
  • the electron source 10 according to the second embodiment exhibits enhanced electron emission characteristics having a low dependence on vacuum degree and free from the popping phenomenon, and thereby can emit electrons stably.
  • the surface electrode 7 is composed of the conductive carbide or conductive nitride layer 7a and the noble metal layer 7b, and the surface of the multilayer film is formed with the number of concave portions 8 allowing the multilayer film to have a locally reduced thickness.
  • an energy loss due to electron scattering caused in the surface electrode 7 will be reduced in the region of the surface electrode 7 formed with the concave portions 8 as comparted to other region.
  • electron emission characteristics can be enhanced while suppressing the increase of electrical resistance in the surface electrode 7, because the electrical resistance of the surface electrode 7 is substantially determined by the film thickness of the multilayer film composed of the conductive carbide or conductive nitride layer 7a and the noble metal layer 7b.
  • a lower electrode 2 composed of a metal film (e.g. molybdenum film) having a given film thickness (e.g. about 300 nm) is first formed on one of the principal surfaces of a substrate 1 composed of a silica glass substrate. Then, a non-doped polycrystalline silicon layer 3 having a given film thickness (e.g. 1.5 ⁇ m) is formed on the lower electrode 2 to provide the structure as shown in Fig. 6A.
  • the lower electrode 2 may be formed, for example, through a sputtering method or a CVD method.
  • the lower electrode 2 may be formed through a method of forming a non-doped polycrystalline silicon layer and then doping an n-type impurity into the polycrystalline silicon layer by means of a thermal diffusion method, or another method of forming a non-doped polycrystalline silicon layer and simultaneously doping an n-type impurity into the polycrystalline silicon layer (i.e. forming an conductive polycrystalline silicon layer directly on the substrate 1 without using an ion-implantation method or thermal diffusion method) .
  • the lower electrode 2 and the non-doped polycrystalline silicon layer 3 can be continuously formed by the same film forming apparatus without any carry-in-and-out operation.
  • the lower electrode 2 is not limited to the n-type polycrystalline silicon layer, and it may be composed of a p-type polycrystalline silicon layer. In this case, a p-type impurity may be doped in the non-doped polycrystalline silicon layer 3.
  • the non-doped polycrystalline silicon layer 3 may be formed through various film forming methods such as a CVD method (e.g. LPCVD method, plasma CVD method or catalytic-CVD method), a sputtering method, a CGS method, or a method of depositing amorphous silicon and then laser-annealing the amorphous silicon.
  • an anodizing process is performed to form a porous polycrystalline silicon layer 4 in which polycrystalline silicon grains 51 (see Fig. 3), silicon nanocrystals 63 (see Fig. 3) and amorphous silicons are mixed together.
  • the structure as shown in Fig. 6B is obtained.
  • the procedure for performing the anodizing process is as same as that of the first embodiment.
  • an oxidation process is performed to form an electron transit layer 6 composed of the composite nanocrystal layer having the structure as shown in Fig. 3. Through this step, the structure as shown in Fig. 6C is obtained.
  • the porous polycrystalline silicon layer 4 is oxidized, for example, through a rapid heating method to form the electron transit layer 6 (see Fig. 3) including the grains 51, the silicon nanocrystals 63, and the silicon oxide films 52, 64.
  • the procedure for performing the oxidation process is as same as that of the first embodiment.
  • a conductive carbide or conductive nitride layer 7a having a given film thickness (appropriately selected in the range of 1 nm to 4 nm) and a noble metal layer 7b having a given film thickness (e.g. 3 nm) are sequentially formed on the electron transit layer 6, for example, through a sputtering method.
  • a multi layer composed of the conductive carbide or conductive nitride layer 7a and the noble metal layer 7b is formed, and the structure as shown in Fig. 6D is obtained.
  • a method for forming the conductive carbide or conductive nitride layer 7a may be selected from various thin-film forming methods such as a sputtering method (e.g. RF sputtering method, RF magnetron sputtering method, DC sputtering method, DC magnetron sputtering method, or reactive sputtering method), a vacuum evaporation method, and a CVD method.
  • a sputtering method e.g. RF sputtering method, RF magnetron sputtering method, DC sputtering method, DC magnetron sputtering method, or reactive sputtering method
  • a vacuum evaporation method e.g. a sputtering method
  • a vacuum evaporation method e.g. a vacuum evaporation method, and a CVD method.
  • the conductive carbide or conductive nitride layer 7a may be formed through a method of depositing a metal film on the electron transit layer 6 by means of the sputtering method or vacuum evaporation method and then annealing the metal film under gas atmosphere including carbon or nitrogen, or through another method of depositing a metal film on the electron transit layer 6 by means of the sputtering method or vacuum evaporation method and then implanting carbon ion or nitrogen ion into the metal film.
  • a method for forming the noble metal layer 7b may be selected from various thin-film forming methods such as a sputtering method (e.g. RF sputtering method, RF magnetron sputtering method, DC sputtering method or DC magnetron sputtering method), a vacuum evaporation method, and a CVD method.
  • a sputtering method e.g. RF sputtering method, RF magnetron sputtering method, DC
  • a number of concave portions are formed on the multilayer composed of the conductive carbide or conductive nitride layer 7a and the noble metal layer 7b, and the electron source 10 having the structure as shown in Fig. 6E is obtained.
  • the multilayer is subjected to a heat treatment at a temperature in the range of 300 °C to 450 °C for a given time-period (e.g. 15 minutes to 120 minutes) under nitrogen atmosphere.
  • the concave portion can be formed at a relatively low process temperature.
  • the heat treatment is performed under nitrogen atmosphere in this heat treatment process, it may be performed under any other suitable inert gas atmosphere or in vacuum.
  • a usable heat treatment may include an annealing using an electric furnace, an annealing based on light irradiation (e.g. lamp annealing), and a laser annealing.
  • the manufacturing process of the electron source 10 according to the second embodiment can facilitate manufacturing the electron source 10 having enhanced electron emitting efficiency with suppressing the increase of electrical resistance in the surface electrode 7.
  • the oxidation process may be substituted with a nitriding process or an oxynitriding process as same as the case of the first embodiment.
  • the electron transit layer 6 is composed of the composite nanocrystal layer as shown in Fig. 3.
  • the electron transit layer 6 may be composed of an insulative layer made, for example, of Al 2 O 3 , SiO 2 or the like.
  • the electron source provided with a semiconductor layer can operate as with an electron source having the MIS structure.
  • the electron source provided with no semiconductor layer can operate as with an electron source having the MIM structure.
  • electron emission characteristics can be improved by appropriately setting the thickness of the electron transit layer.
  • the forming process of the electron transit layer can be simplified.
  • an electron source 10 comprises a substrate 1 composed of an insulative substrate (e.g. insulative glass substrate or insulative ceramic substrate), and an electron source device 10a formed on one of the principal surfaces of the substrate 1.
  • the electron source device 10b comprises a lower electrode 2 formed on the selected principal surface of the substrate 1, a semiconductor layer or a non-doped polycrystalline silicon layer 3 formed on the lower electrode 2, an after-mentioned electron transit layer 6 formed on the polycrystalline silicon layer 3, and a surface electrode 7 formed on the electron transit layer 6.
  • the surface electrode 7 and the lower electrode 2 are disposed opposed to one another, and the electron transit layer 6 is interposed between the surface and lower electrodes.
  • the thickness of the lower electrode 2 is set at about 300 nm, and the thickness of the surface electrode 7 is set such that it does not exceed 10 nm.
  • the third embodiment employs the insulative substrate as the substrate 1
  • any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate 1
  • the lower electrode 2 may be comprised of the semiconductor substrate and a conductive layer (e.g. ohmic electrode) deposited on the semiconductor substrate.
  • the polycrystalline silicon layer 3 is interposed between the electron transit layer 6 and the lower electrode 2, the electron transit layer 6 may be formed directly on the lower electrode 2 without interposing the polycrystalline silicon layer 3.
  • the lower electrode 2 is composed of a thin film made of the same metal as that of the lower electrode 2 of the electron source according to the second embodiment.
  • the electron transit layer 6 is formed by subjecting the polycrystalline silicon layer to a anodizing process and an oxidation process as described later.
  • the electron transit layer 6 in the third embodiment includes grains 51, silicon oxide films 52, silicon nanocrystals 63, and silicon oxide films 64 as with the electron transit layer 6 in the first embodiment (see Fig. 3), and the remaining region other than the grains 51, silicon nanocrystals 63 and silicon oxide films 52, 64 is formed as an amorphous region made of amorphous silicon or partially oxidized amorphous silicon as with the electron transit layer 6 in the second embodiment.
  • the surface electrode 7 is composed of a conductive nitride layer 7c deposited on the electron transit layer 6 and a metal layer 7d deposited on the conductive nitride layer 7c.
  • the conductive nitride layer 7c is made of conductive nitride consisting of titanium nitride.
  • the conductive nitride has a relatively high conductivity, a melting point higher than that of noble metal such as gold, and an excellent diffusion barrier performance. In addtion, the conductive nitride has an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the conductive nitride having these properties usable in the conductive nitride layer 7c is not limited to titanium nitride, and it may be chromium nitride, molybdenum nitride, tungsten nitride, vanadium nitride, niobium nitride, tantalum nitride, zirconium nitride, or hafnium nitride. In view of thermal stability, work function and reproducibility, it is preferable to use either one of titanium nitride, zirconium nitride, hafnium nitride, niobium nitride and tantalum nitride.
  • the metal layer 7d is made of platinum which is one of noble metals.
  • the material of the metal layer 7d is not limited to platinum, and the metal layer 7d may be made of any other suitable noble metal such as gold or iridium. However, platinum is particularly effective to assure thermal stability.
  • the thickness of the conductive nitride layer 7c is set such that it does not exceed 4 nm, and the total thickness of the conductive nitride layer 7c and the metal layer 7d is set such that it does not exceed 10 nm, in order to suppress the deterioration of electron emitting efficiency or provide other advantages.
  • the electron source 10 or the electron source device 10b as a ballistic electron surface-emitting type electron source according to the third embodiment steps of emitting electrons or an electron emission model is the same as that of the electron source 10 according to the first embodiment (see Figs. 2 and 3).
  • the electron source 10 according to the third embodiment exhibits enhanced electron emission characteristics having a low dependence on vacuum degree and free from the popping phenomenon, and thereby can emit electrons stably.
  • the surface electrode 7 is composed of the conductive nitride layer 7c made of conductive nitride and deposited on the electron transit layer 6, and the metal layer 7d deposited on the conductive nitride layer 7c.
  • the conductive nitride has a relatively high conductivity, a melting point higher than that of noble metal such as gold, an excellent diffusion barrier performance, and an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the conductive nitride layer 7c has an excellent adhesiveness to the metal layer 7d.
  • the electron source 10 according to the third embodiment can provide enhanced thermal resistance of the surface electrode 7 while suppressing the deterioration of electron emission characteristics. That is, the electron source 10 according to the third embodiment can suppress undesirable agglomeration otherwise caused in the material of the surface electrode 7 to prevent the deterioration of electron emission characteristics due to a thermal process such as the vacuum-sealing process. Further, the surface electrode 7 composed of the conductive nitride layer 7c and the metal layer 7d can prevent respective atoms constituting the surface electrode 7 and the electron transit layer 6 from being diffused therebetween. Thus, the materials of the surface electrode 7 and the electron transit layer 6 can be selected from various alternatives.
  • the surface electrode 7 may be formed of only the conductive nitride layer.
  • the glass substrate may be substituted with any other suitable substrate in the same manner as that in the second embodiment.
  • the electron source 10 according to the third embodiment may also be used as an electron source for display devices in the same manner as that in the second embodiment.
  • a lower electrode 2 composed of a metal film (e.g. molybdenum film) having a given film thickness (e.g. about 300 nm) is first formed on one of the principal surfaces of a substrate 1 composed of a silica glass substrate. Then, a non-doped polycrystalline silicon layer 3 having a given film thickness (e.g. 1.5 ⁇ m) is formed on the lower electrode 2 to provide the structure as shown in Fig. 8A.
  • the procedure for forming the lower electrode 2 and the procedure for forming the non-doped polycrystalline silicon layer 3 are as same as those of the second embodiment.
  • an anodizing process is performed to form a porous polycrystalline silicon layer 4 in which polycrystalline silicon grains 51 (see Fig. 3), silicon nanocrystals 63 (see Fig. 3) and amorphous silicons are mixed together.
  • polycrystalline silicon grains 51 see Fig. 3
  • silicon nanocrystals 63 see Fig. 3
  • amorphous silicons are mixed together.
  • an oxidation process is performed to form an electron transit layer 6 composed of the composite nanocrystal layer having the structure as shown in Fig. 3. Through this step, the structure as shown in Fig. 8C is obtained.
  • the composite nanocrystal layer 4 is oxidized, for example, through a rapid heating method to form the electron transit layer 6 (see Fig. 3) including the grains 51, the silicon nanocrystals 63, and the silicon oxide films 52, 64.
  • the procedure for performing the oxidation process is as same as that of the first embodiment.
  • a conductive nitride layer 7c having a given film thickness (e.g. 1 nm) and a metal layer 7d having a given film thickness (e.g. 3 nm) are sequentially formed on the electron transit layer 6, for example, through a sputtering method.
  • a surface electrode 7 composed of the conductive nitride layer 7c and the metal layer 7d is formed, and the electron source 10 having the structure as shown in Fig. 8D is obtained.
  • the manufacturing process of the electron source 10 according to the third embodiment can provide the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics.
  • the conductive nitride layer 7c of the surface electrode 7 is formed through a sputtering method.
  • a usable sputtering method may be selected from various types such as an RF sputtering method, RF magnetron sputtering method, DC sputtering method and DC magnetron sputtering method.
  • the conductive nitride layer 7c is formed through a sputtering method using a target consisting of conductive nitride. This method can provide the conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • an existing sputtering apparatus can be readily diverted to an apparatus for forming the conductive nitride layer 7c, which provides a downsized equipment investment and a reduced equipment cost.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the conductive nitride 7c layer can be formed at a relatively low process temperature.
  • the method for forming the conductive nitride layer 7c is not limited to the aforementioned sputtering methods.
  • the conductive nitride layer may be formed through a vacuum evaporation method using a deposition source consisting of conductive nitride, or a reactive sputtering method using a target consisting of metal (pure metal) and gas (reactive gas) including nitrogen.
  • the vacuum evaporation method or the reactive sputtering method can also provide the conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the conductive nitride layer can be formed at a relatively low process temperature.
  • an existing vacuum evaporation apparatus can be readily diverted to an apparatus for forming the conductive nitride layer 7c, which provides a downsized equipment investment and a reduced equipment cost.
  • the reactive sputtering method using a target consisting of metal (pure metal) and gas (reactive gas) including nitrogen can facilitate the control of nitrogen concentration in the conductive nitride layer 7c. That is, in the reactive sputtering method, a type of the reaction gas and a mixing ratio of inert gas such as Ar to the reactive gas including nitrogen atoms can be selected to control the composition of nitrogen in the conductive nitride layer 7c. Thus, the reactive sputtering method can provide the conductive nitride layer 7c having a nitrogen composition controlled at a desired value.
  • the reactive sputtering method can provide the conductive nitride layer 7c including a less amount of metal impurities as compared to the sputtering method using conductive nitride as a target, and thereby performance decrement due to impurities can be suppressed.
  • the conductive nitride layer 7c may be formed through a CVD method.
  • the CVD method can also provide the conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the CVD method is excellent in a step-coverage performance. Since a thermal CVD method typically involves a process temperature of 600 °C or more, it is preferable to use the plasma CVD method capable of lowering the process temperature.
  • the conductive nitride layer 7c may be formed by depositing a metal film (e.g. titanium film) on the electron transit layer 6 through a vacuum evaporation method or a sputtering method and then implanting nitrogen ions into the metal film.
  • a metal film e.g. titanium film
  • This method can also form the conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability.
  • this method can reduce the roughness of the interface between the conductive nitride layer 7c and the metal layer 7b, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost. Further, this method can form the conductive nitride layer 7c at a relatively low process temperature, and facilitate the control of conductivity in the conductive nitride layer 7c.
  • the conductive nitride layer 7c may be formed by depositing a metal film (e.g. titanium film) on the electron transit layer 6 through a vacuum evaporation method or a sputtering method and then subjecting the metal film to a heat treatment under gas atmosphere including nitrogen.
  • a metal film e.g. titanium film
  • This method can also form the conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability.
  • this method can reduce the roughness of the interface between the conductive nitride layer 7c and the metal layer 7b, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the oxidation process may be substituted with a nitriding process or an oxynitriding process as same as the case of the first embodiment.
  • the lower electrode 2 may be formed to have a multilayer structure, and at least one of the layers may be formed as a conductive nitride layer.
  • the conductive nitride has a relatively high conductivity, a melting point higher than that of noble metal such as gold, an excellent diffusion barrier performance, and an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the lower electrode 2 having the conductive nitride layer can have enhanced thermal resistance with suppressing the deterioration of electron emission characteristics to prevent the deterioration of electron emission characteristics due to a thermal process such as the vacuum-sealing process.
  • the conductive nitride layer can provide enhanced thermal resistance of the lower electrode 2.
  • another layer deposited on the conductive nitride layer can be arranged to provide reduced electric resistance of the lower electrode 2, and enhanced adhesiveness between the lower electrode 2 and a layer forming an interface together with the lower electrode 2. It is to be understood that the entire lower electrode 2 may be composed of a conductive nitride layer.
  • the conductive nitride layer used in the lower electrode 2 may be made of the same conductive nitride as the material used in the conductive nitride layer 7c of the surface electrode 7. Further, the conductive nitride layer of the lower electrode 2 may be formed through the same method as that for forming the conductive nitride layer 7c of the surface electrode 7.
  • an electron source 10 comprises a substrate 1 composed of an insulative substrate (e.g. insulative glass substrate or insulative ceramic substrate), and a lower electrode 2 formed on one of the principal surfaces of the substrate 1.
  • a semiconductor layer or a non-doped polycrystalline silicon layer 3 is formed on the lower electrode 2.
  • An electron transit layer 6 strong-field drift layer
  • a surface electrode 7 is formed on the electron transit layer 6. Specifically, in the electron source 10, the surface electrode 7 and the lower electrode 2 are disposed opposed to one another, and the electron transit layer 6 is interposed between the surface and lower electrodes.
  • the thickness of the surface electrode 7 is set at 12 nm or less.
  • the fourth embodiment employs the insulative substrate as the substrate 1
  • any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate 1.
  • the polycrystalline silicon layer 3 is interposed between the electron transit layer 6 and the lower electrode 2, the electron transit layer 6 may be formed directly on the lower electrode 2 without interposing the polycrystalline silicon layer 3.
  • the electron source 10 as a ballistic electron surface-emitting type electron source steps of emitting electrons or an electron emission model is the same as that of the electron source 10 according to the first embodiment (see Figs. 2 and 3).
  • the electron source 10 according to the fourth embodiment exhibits enhanced electron emission characteristics having a low dependence on vacuum degree and free from the popping phenomenon, and thereby can emit electrons stably.
  • the glass substrate may be substituted with any other suitable substrate in the same manner as that in the second embodiment.
  • the electron source 10 according to the fourth embodiment may also be used as an electron source for display devices in the same manner as that in the second embodiment.
  • the lower electrode 2 is made of highly doped n-type polycrystalline silicon.
  • the material of the lower electrode 2 is not limited to the n-type polycrystalline silicon, and the lower electrode 2 may be made of metal such as Cr, W, Ti, Al, Cu, Au, Pt or Mo; alloy containing such metal; or impurity-doped semiconductor other than polycrystalline silicon.
  • the surface electrode 7 is composed of a conductive carbide layer 7e deposited on the electron transit layer 6 and a noble metal layer 7f deposited on the conductive carbide layer 7e.
  • the conductive carbide layer 7e is made of conductive carbide consisting of zirconium carbide.
  • the conductive carbide has a relatively high conductivity, a relatively low work function, a melting point higher than that of noble metal such as gold, and an excellent diffusion barrier performance.
  • the conductive carbide has an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the conductive carbide having these properties usable in the conductive carbide layer 7e is not limited to zirconium carbide, and it may be chromium carbide, molybdenum carbide, tungsten carbide, vanadium carbide, niobium carbide, tantalum carbide, titanium carbide, or hafnium carbide. In view of thermal stability, work function and reproducibility, it is preferable to use either one of zirconium carbide, titanium carbide and hafnium carbide.
  • the noble metal layer 7f is made of platinum which is one of noble metals (That is, the noble metal layer 7f is composed of a layer-structured platinum layer).
  • the noble metal to be used is not limited to platinum, and the noble metal layer 7f may be made of any other suitable noble metal such as gold or iridium.
  • a portion of the noble metal layer 7f may be composed of a layer-structured platinum layer, and the remaining portion may be made of different noble metal other than platinum.
  • the thickness of the conductive carbide layer 7e is preferably set at 4 nm or less, and the thickness of the noble metal layer 7f is preferably set at 8 nm or less. More preferably, the thickness of the conductive carbide layer 7e is set at 2 nm or less, and the thickness of the noble metal layer 7f is set at 4 nm or less to provide enhanced electron emitting efficiency.
  • the surface electrode 7 is composed of the conductive carbide layer 7e made of conductive carbide and the noble metal layer 7f made of noble metal.
  • the conductive carbide has a relatively high conductivity, a relatively low work function, a melting point higher than that of noble metal, an excellent diffusion barrier performance, and an oxidation resistance superior to that of metal such as tungsten or aluminum.
  • the conductive carbide layer 7e has an excellent adhesiveness to the noble metal layer 7f.
  • the electron source 10 according to the fourth embodiment can provide enhanced thermal resistance of the surface electrode 7 while suppressing the deterioration of electron emission characteristics. That is, the electron source 10 according to the fourth embodiment can suppress undesirable agglomeration otherwise caused in the material of the surface electrode 7 to prevent the deterioration of electron emission characteristics due to a thermal process such as the vacuum-sealing process.
  • the surface electrode 7 composed of the conductive carbide layer 7e and the noble metal layer 7f can prevent respective atoms constituting the surface electrode 7 and the electron transit layer 6 from being diffused therebetween.
  • the materials of the surface electrode 7 and the electron transit layer 6 can be selected from various alternatives.
  • a non-doped polycrystalline silicon layer having a given film thickness (e.g. 1 ⁇ m) is first formed on one of the principal surfaces of the substrate 1, and an n-type impurity is doped into the polycrystalline silicon layer through an ion-implantation method or heat treatment to form a lower electrode 2 composed of a conductive polycrystalline silicon layer (n-type polycrystalline silicon layer). Then, an additional non-doped polycrystalline silicon layer 3 having a given film thickness (e.g. 1.5 ⁇ m) is formed on the side of the selected principal surface of the substrate 1 (on the lower electrode 2) to provide the structure as shown in Fig. 10A. The procedure for forming the non-doped polycrystalline silicon layer 3 is as same as that of the second embodiment.
  • the lower electrode 2 is made of metal such as Cr, W, Ti, Al, Cu, Au, Pt or Mo, or alloy containing such meta, the lower electrode 2 may be formed, for example, through a sputtering method or vacuum evaporation method.
  • a porous region is provided up to a given depth of the polycrystalline silicon layer 3 by means of an anodizing process.
  • a porous semiconductor layer or a porous polycrystalline silicon layer 4 is formed, and thus the structure as shown in Fig. 10B is obtained.
  • the procedure for performing the anodizing process is as same as that of the first embodiment.
  • the porous polycrystalline silicon layer 4 is oxidized through an oxidation process. Through this step, an electron transit layer 6 composed of the oxidized porous polycrystalline silicon layer is formed, and thus the structure as shown in Fig. 10C is obtained.
  • the porous polycrystalline silicon layer 4 is oxidized, for example, through a rapid heating method to form the electron transit layer 6 including the grains 51, the silicon nanocrystals 63, and the silicon oxide films 52, 64 (see Fig. 3).
  • the procedure for performing the oxidation process is as same as that of the first embodiment.
  • a conductive carbide layer 7e and a noble metal layer 7f are sequentially formed, for example, through a sputtering method. Through this step, a surface electrode 7 composed of the conductive carbide layer 7e and the noble metal layer 7f is formed on the electron transit layer 6, and thus the electron source 10 having the structure as shown in Fig. 10D is obtained.
  • the manufacturing process of the electron source 10 according to the fourth embodiment can provide the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics.
  • the conductive carbide layer 7e of the surface electrode 7 is formed through a sputtering method.
  • a usable sputtering method may be selected from various types such as an RF sputtering method, RF magnetron sputtering method, DC sputtering method and DC magnetron sputtering method.
  • the conductive carbide layer 7e is formed through a sputtering method using a target consisting of conductive carbide. These methods can provide the conductive carbide layer 7e having a low surface roughness with excellent reproducibility and stability as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • an existing sputtering apparatus can be readily diverted to an apparatus for forming the conductive carbide layer 7e, which provides a downsized equipment investment and a reduced cost.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the conductive carbide layer 7e can be formed at a relatively low process temperature.
  • the film forming method for the conductive carbide layer 7e is not limited to the aforementioned sputtering methods.
  • the conductive carbide layer 7e may be formed through a vacuum evaporation method using a deposition source consisting of conductive carbide, or a reactive sputtering method using a target consisting of metal (pure metal) and gas (reactive gas) including carbon.
  • the vacuum evaporation method or the reactive sputtering method can also provide the conductive carbide layer 7e having a low surface roughness with excellent reproducibility and stability as well as a high throughput, which achieves a reduced manufacturing cost and an increased electron emitting area of the electron source 10.
  • the electron source 10 having enhanced thermal resistance with suppressing the deterioration of electron emission characteristics can be provided at a lower cost.
  • the conductive carbide layer 7e can be formed at a relatively low process temperature. In addtion, when the conductive carbide layer 7e is formed through the vacuum evaporation method, an existing vacuum evaporation apparatus can be readily diverted to an apparatus for forming the conductive carbide layer 7e, which provides a downsized equipment investment and a reduced equipment cost.
  • An EB (Electron Beam) vacuum evaporation method is one of appropriate vacuum evaporation methods to be used, because conductive carbide has a high melting point.
  • the reactive sputtering method using a target consisting of metal (pure metal) and gas (reactive gas) including carbon can facilitate the control of carbon concentration in the conductive carbide layer 7e. That is, in the reactive sputtering method, a type of the reactive gas or a mixing ratio of inert gas such as Ar to the reactive gas including carbon atoms can be appropriately selected to control a carbon concentration in the conductive carbide layer 7e so as to provide the conductive carbide layer 7e having a desired carbon concentration. Further, when using the reactive sputtering method, a desired film of titanium carbide, zirconium carbide or hafnium carbide can be formed at a relatively low substrate temperature of 150 to 500 °C.
  • the reactive sputtering method can provide the conductive carbide layer 7e including a less amount of metal impurities as compared to the sputtering method using conductive carbide as a target, and thereby performance decrement due to impurities can be suppressed.
  • the sputtering method, vacuum evaporation method or reactive sputtering method is more advantageous than other film forming methods to form such a conductive carbide layer.
  • the electron transit layer 6 is composed of the oxidized porous polycrystalline silicon layer.
  • the electron transit layer 6 may be composed of a nitrided porous polycrystalline silicon layer or an oxynitrided porous polycrystalline silicon layer.
  • the electron transit layer 6 may be composed of any other suitable oxidized, nitrided or oxynitrided porous semiconductor layer. The oxidation, nitriding or oxynitriding method and the characteristics or advantages in these cases are as described in the first embodiment. (Example)
  • a silicon substrate was used as the substrate 1, an n-type polycrystalline silicon layer being used as the lower electrode 2, an oxidized porous polycrystalline silicon layer being used as the electron transit layer 6 (strong field drift layer), a zirconium carbide layer being used as the conductive carbide layer 7e of the surface electrode 7, and a platinum layer being used as the noble metal layer 7f of the surface electrode 7.
  • the thickness of the conductive carbide layer 7e was 2 nm, and the thickness of the noble metal layer 7f was 4 nm.
  • the conductive carbide layer 7e was formed through an RF magnetron sputtering method using a target consisting of zirconium carbide under Ar gas atmosphere.
  • the electron source 10 was introduced into a vacuum chamber (not shown) to measure the electron emission characteristics of the electron source 10 in the state as shown in Fig. 2. That is, the collector 21 was positioned opposed to the surface electrode 7. Then, a DC voltage Vps was applied between the surface and lower electrodes such that the surface electrode 7 had a higher potential than that of the lower electrode 7, while another DC voltage Vc was applied between the collector and surface and electrodes such that the collector 21 had a higher potential than that of the surface electrode 7.
  • Fig. 11 shows the measurement result of electron emission characteristics in the state when vacuum degree in the vacuum chamber was set at 5 x 10 -5 Pa, and the DC voltage Vc was set at a constant value of 1000 V.
  • the horizontal axis indicates the DC voltage Vps
  • the vertical axis indicates the current density.
  • the marks "A” indicate the current density of diode current Ips in the state before the heat treatment.
  • the marks “B” indicate the current density of emission current Ie in the state before the heat treatment.
  • the marks “C” indicate the current density of diode current Ips in the state after the heat treatment.
  • the marks “D” indicate the current density of emission current Ie in the state after the heat treatment.
  • the heat treatment was performed under N 2 gas atmosphere at 400 °C for 1 hour.

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Citations (4)

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JP2987140B2 (ja) 1997-10-29 1999-12-06 松下電工株式会社 電界放射型電子源およびその製造方法および平面発光装置およびディスプレイ装置および固体真空デバイス
WO2000074098A1 (en) 1999-05-28 2000-12-07 Hitachi, Ltd. Thin-film electron source, display and device
JP2001126610A (ja) 1999-10-27 2001-05-11 Pioneer Electronic Corp 電子放出素子
EP1117118A1 (de) 2000-01-13 2001-07-18 Pioneer Corporation Elektronen emittierende Vorrichtung, Verfahren zu deren Herstellung und diese Vorrichtung verwendendes Anzeigegerät

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EP0367195A3 (de) * 1988-10-31 1991-10-02 Matsushita Electric Industrial Co., Ltd. Elektronen-Emissionselemente mit MIM-Kaltkathode und dessen Herstellungsverfahren
US6635979B1 (en) * 1998-02-09 2003-10-21 Matsushita Electric Industrial Co., Ltd. Electron emitting device, method of producing the same, and method of driving the same; and image display comprising the electron emitting device and method of producing the same
EP1094484A2 (de) * 1999-10-18 2001-04-25 Matsushita Electric Works, Ltd. Feldemissions-Elektronenquelle und Verfahren zu deren Herstellung
JP3688970B2 (ja) * 2000-02-29 2005-08-31 株式会社日立製作所 薄膜型電子源を用いた表示装置及びその製造方法

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Publication number Priority date Publication date Assignee Title
JP2987140B2 (ja) 1997-10-29 1999-12-06 松下電工株式会社 電界放射型電子源およびその製造方法および平面発光装置およびディスプレイ装置および固体真空デバイス
WO2000074098A1 (en) 1999-05-28 2000-12-07 Hitachi, Ltd. Thin-film electron source, display and device
JP2001126610A (ja) 1999-10-27 2001-05-11 Pioneer Electronic Corp 電子放出素子
EP1117118A1 (de) 2000-01-13 2001-07-18 Pioneer Corporation Elektronen emittierende Vorrichtung, Verfahren zu deren Herstellung und diese Vorrichtung verwendendes Anzeigegerät

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