EP1536663A1 - Schnittstellenschaltung für Kopfhörer - Google Patents
Schnittstellenschaltung für Kopfhörer Download PDFInfo
- Publication number
- EP1536663A1 EP1536663A1 EP03292966A EP03292966A EP1536663A1 EP 1536663 A1 EP1536663 A1 EP 1536663A1 EP 03292966 A EP03292966 A EP 03292966A EP 03292966 A EP03292966 A EP 03292966A EP 1536663 A1 EP1536663 A1 EP 1536663A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- microphone
- interface circuit
- headset
- biasing
- potential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS
- H04R5/00—Stereophonic arrangements
- H04R5/04—Circuit arrangements, e.g. for selective connection of amplifier inputs/outputs to loudspeakers, for loudspeaker detection, or for adaptation of settings to personal preferences or hearing impairments
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS
- H04R2201/00—Details of transducers, loudspeakers or microphones covered by H04R1/00 but not provided for in any of its subgroups
- H04R2201/10—Details of earpieces, attachments therefor, earphones or monophonic headphones covered by H04R1/10 but not provided for in any of its subgroups
- H04R2201/107—Monophonic and stereophonic headphones with microphone for two-way hands free communication
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS
- H04R5/00—Stereophonic arrangements
- H04R5/033—Headphones for stereophonic communication
Definitions
- the present invention relates to an interface circuit for a module, typically a headset, which comprises one or more loudspeakers (earphones) and a microphone.
- a module typically a headset, which comprises one or more loudspeakers (earphones) and a microphone.
- the module comprising one or more loudspeakers and a microphone
- the interface circuit of the present invention will generally, but not exclusively, be an amplifier and interface circuit. It is to be understood that amplifier and interface circuits are intended to be covered by the references in this document to interface circuits.
- headsets and headset interface circuits being interconnected using "three wires" or "four wires", these wires will generally be bundled in a single cable.
- the headset comprising one or more loudspeakers and a microphone is typically an accessory that is detachable from the interface circuit. Headsets of this kind are often used with mobile telephones (radiotelephones) to enable hands-free operation, or with a range of other devices, for example, portable MP3 players having a voice-control feature.
- the headset interface circuit receives audio signals from the microphone in the headset, supplies audio signals to the loudspeaker(s) in the headset, and supplies voltage references to the headset.
- the headset interface circuit supplies stereo audio signals to the headset and conventional accessories of this type use four wires to interconnect the stereo headset and the interface circuit (usually via a cable terminated in a four-contact jack plug).
- the headset interface circuit supplies mono signals to the headset, and accessories of this type will generally use three wires to interconnect the mono headset and the headset interface circuit (usually via a cable terminated in a three-contact jack plug).
- Fig.1 of the accompanying drawings shows the main components of a typical conventional stereo headset and of a typical conventional stereo headset amplifier and interface circuit.
- the stereo headset 10 includes left and right loudspeakers (or earphones), SP L and SP R , and a microphone, M.
- the left loudspeaker, SP L is supplied with a first audio signal, A L , via a first wire, W 1 , and is supplied with a ground reference voltage V G via a second wire, W 2 .
- the right loudspeaker, SP R is also connected to the second wire, W 2 , so as to have a ground reference, as well as to a third wire, W 3 , via which it receives a second audio signal A R .
- the first and second audio signals, A L and A R constitute stereo audio signals.
- Large-value capacitors C 1 and C 2 are connected in series with the first and third wires, W1 and W3, respectively, so as to avoid large DC currents (e.g. 40-50mA, for loudspeakers having 32 ⁇ impedance) flowing from the output of the amplifier and the ground connection of the headset.
- large DC currents e.g. 40-50mA, for loudspeakers having 32 ⁇ impedance
- the microphone, M requires a biasing voltage of 2.1 volts to be applied across it.
- one terminal of the microphone, M is connected to the ground reference voltage, V G , via the second wire, W 2 .
- the microphone, M, and both loudspeakers, SP L and SP R are connected to the second wire, W 2 , via a common connection point, N.
- a 2.1V biasing voltage, V MBias required by the microphone, M, is supplied to its other terminal via a fourth wire, W 4 .
- the headset amplifier and interface circuit 20 connected to the stereo headset 10 includes an audio processing section 30 (typically implemented using an integrated circuit), a ground reference, G , circuitry 40 to produce the 2.1 volt bias voltage, V MBias , required by the microphone, M, as well as two large-value capacitors C 1 and C 2 .
- the circuitry 40 used to produce the microphone biasing voltage is conventional and so will not be described in detail at this point.
- the two large-value capacitors, C 1 and C 2 are in the 100 ⁇ F to 220 ⁇ F range. Such capacitors are expensive and occupy a relatively large area on the circuit board on which the interface circuit 20 is mounted.
- Fig.2 illustrates how a phantom ground approach has been used when interconnecting a stereo headset 10' to a stereo headset amplifier and interface circuit 20'.
- parts which have substantially the same structure and function as in the arrangement of Fig.1 are indicated using the same reference numerals as in Fig.1.
- the two stereo loudspeakers, SP L and SP R are connected via the second wire, W 2 , not to a separate ground reference potential, G, but with the 1.4 volt audio reference (or "signal ground"), VAG , that already exists in the audio processing IC 30' of the headset amplifier and interface circuit 20'.
- This VAG or signal ground, typically is at 1.4 volts for headsets used with radiotelephones. In other applications there will be other signal ground voltages used within the apparatus to which the headset is to be connected. Generally the signal ground level will be half the supply voltage to the apparatus in question.
- the signal ground level will be 1.2 volts (or even lower).
- the signal ground level may be adaptive, based on a varying supply voltage (typically when batteries powering the device become depleted). These other signal ground levels can be used as the phantom ground potential supplied to the second wire, W 2 .
- the VAG voltage is supplied to the non-inverting input of an operational amplifier, 50, which is connected in a voltage follower configuration (unity gain buffer) and so has an output having low output impedance and taking a stable value of 1.4 volts.
- the present invention provides an interface circuit for a module comprising one or more loudspeakers and a microphone, the interface circuit comprising means for outputting audio signals at one or more audio output terminals, means for establishing a phantom ground potential at a ground output terminal, and means for providing a reference potential to a further terminal, said reference potential taking a value substantially equal to the sum of the phantom ground potential and the biasing voltage required across the microphone.
- the present inventors have realised that it is not essential for the microphone to have one terminal at ground potential and the other at the normal microphone biasing voltage.
- the microphone has a potential difference across it that is substantially equal to the normal microphone biasing voltage, that potential difference can be established by connecting one microphone terminal to a phantom ground potential and the other to a reference potential which is substantially equal to the sum of the phantom ground potential and the normal microphone biasing voltage.
- the microphone is biased relative to the phantom ground potential. This can be considered to be a stacked biasing approach.
- the present invention involves the combination of use of a phantom ground technique with use of stacked microphone biasing in order to enable a loudspeaker/microphone module to be connected to an interface circuit using a small number of wires yet avoiding use of large-value capacitors. Moreover, using this approach good noise performance is maintained on the audio microphone biasing.
- the reference potential used for microphone biasing is created using components that are already present in the interface circuit, or present in the overall apparatus in which the interface circuit is provided.
- the reference potential used for microphone biasing can be generated using a DC/DC converter that is already present in the telephone system.
- the reference potential can be generated using a charge pump that is already present in the apparatus that incorporates the interface circuit.
- the present invention further provides a system comprising a module including one or more loudspeakers and a microphone, and an interface circuit, as defined above, for connection to said module.
- the present invention still further provides apparatus comprising an audio signal supply section, and an interface circuit as defined above.
- This apparatus can be, for example, a radiotelephone or portable audio player (e.g. an MP3 player, CD player, etc.).
- the present invention yet further provides a package including a module including one or more loudspeakers and a microphone, as well as apparatus as defined above comprising an interface circuit for connection to said module.
- Figs. 3 and 4 relate to an embodiment in which stereo audio signals are used, whereas Fig.5 relates to a mono embodiment.
- the first preferred embodiment relates to a headset amplifier and interface circuit 200 which is provided within a radiotelephone, for use with a stereo headset.
- the present invention is more widely applicable to headset interface circuits in general, regardless of whether or not they are incorporated into another device of whatever sort it may be.
- the headset amplifier and interface circuit 200 is adapted to be compatible with a conventional stereo headset 100.
- the headset amplifier and interface circuit 100 is connectible to the stereo headset 200 via a four-wire connection, in the usual way.
- the two loudspeakers, SP L and SP R , and the microphone, M are all connected to a common point, N, which is provided with a voltage from the second wire, W 2 .
- the common connection point, N would be connected to a ground reference potential, G, via the second connecting wire, W 2 .
- the second wire, W 2 is connected to a phantom ground.
- the phantom ground potential is VAG, that is, the audio reference (signal ground) used within the radiotelephone.
- VAG the audio reference
- the phantom ground voltage it is convenient for the phantom ground voltage to be constituted by the signal ground applicable in the application in question.
- the phantom ground potential is supplied to the second wire, W 2 , from an operational amplifier, 500, which is connected in a voltage follower configuration.
- the non-inverting input of the operational amplifier 500 is connected to the signal ground potential which, in this example, is VAG at, for example, 1.4 directorss.
- VAG signal ground potential
- a 1.4 volt potential is supplied to the second wire, W 2 .
- the microphone, M, present in the conventional stereo headset 100 requires a specific potential difference across it for proper functioning (typically, 2.1 volts, as mentioned above).
- the headset amplifier and interface circuit 200 of the present invention is adapted to provide the other terminal of the microphone, M, via wire W 4 , with a biasing potential which is "stacked" on the phantom ground level.
- the headset amplifier and interface circuit 200 of the present invention outputs on the fourth wire, W 4 , a voltage which is substantially equal to the sum of the phantom ground voltage and the normal microphone biasing voltage.
- the stacked microphone biasing potential, V MBiasSt will be at 3.5 volts.
- the present invention is not limited with respect to the way in which the stacked microphone biasing potential, V MBiasSt , can be generated: numerous different approaches can be used. However, it is advantageous if the stacked microphone biasing potential is generated without adding a significant number of components to the headset amplifier and interface circuit 200.
- Fig.3 one very simple method for providing the required stacked microphone biasing potential, V MBiasSt , is illustrated in Fig.3 and consists in making a small modification to the microphone biasing circuit 40 known from the prior art and shown in Figs.1 and 2.
- the known microphone biasing circuit includes two operational amplifiers, O 1 and O 2 , resistors, R 1 to R 5 , and capacitors, C A and C B , interconnected so as to output a steady microphone biasing potential to the wire W 4 .
- the modification consists in applying a boost voltage, V B , to the operational amplifier O 1 , resulting in the output of an increased potential on the wire W 4 .
- the operational amplifier O 1 amplifies VAG with a view to producing a microphone biasing voltage.
- the operational amplifier O 2 serves to amplify the low-level audio signals picked up by the microphone in the connected headset (typically having an amplitude of 1 mV r.m.s.) to an acceptable voltage level for the audio processing circuits (typically 100 mV r.m.s.).
- the amplified microphone output that is supplied to the audio processing circuits is labelled Mic o/p in Fig.3. Because O 2 , as well as the capacitor C B and the resistors R 3 and R 4 , are involved in processing the microphone signals, rather than in generating the stacked microphone biasing voltage of the present invention, they will not be described here in further detail.
- the boost voltage V B that is supplied to operational amplifier O 1 serves as +Vcc for O 1 (-Vcc being ground).
- Operational amplifier O 1 is capable of rejecting noise that is present on the V B supply.
- the inverting input of O 1 is supplied with the same voltage as the phantom ground that is being used, in this case VAG (at 1.4 volts).
- the non-inverting input of O 1 is connected to ground via the resistor R 1 .
- the output of O 1 is connected to the inverting input thereof via the resistor R 2 .
- a suitable boost voltage, V B to apply to operational amplifier O 1 could be, for instance, 5 volts.
- the appropriate stacked microphone biasing voltage could be produced by altering the ratio R 2 /R 1 .
- the audio processing unit 300 is an integrated circuit, it is simplest to change the vaiue of the resistor R 1 that is connected to ground.
- the phantom ground voltage took a value different from 1.4 volts then this could also be accommodated by suitable setting of the ratio R 2 /R 1 .
- the phantom ground is provided using a signal ground level that is adaptive, it would be necessary to use additional circuitry in order to ensure that the stacked microphone biasing voltage correctly followed changes in the signal ground level.
- the first preferred embodiment, illustrated in Fig.3, is not limited with regard to the origin of the boost voltage, V B .
- V B the origin of the boost voltage
- Special circuitry can be added specifically in view of generation of the boost voltage.
- the number of components in the headset interface circuit (or in the apparatus in which that circuit is incorporated) can be kept to a minimum, thus reducing costs, if the boost voltage is derived from circuit components that are already present in the headset interface circuit (or present in the apparatus in which that circuit is incorporated).
- Fig.4 illustrates one embodiment of headset amplifier and interface circuit 200' adapted for use within a radiotelephone and in which existing circuit components are used to generate the boost voltage required in the embodiment of Fig.3.
- the audio processing IC 300' incorporates a boost DC to DC converter 600 which is adapted to generate a 5 volt potential from the battery voltage powering the radiotelephone.
- This DC/DC converter 600 is required in a radiotelephone for purposes such as supplying a white backlight for the display, supplying the USB "on the go” bus, etc.
- the 5 volt potential produced by the boost DC/DC converter is fed additionally to operational amplifier O 1 to serve as the boost voltage, V B .
- the load on the DC/DC converter 600 is not thereby unduly increased because the load thereon is typically already 200 mA, whereas the added load is typically approximately 200 ⁇ A
- Fig.4 illustrates just one example where existing circuit components in a headset interface circuit, or in a device incorporating such a circuit, are re-used in order to produce a boost voltage employed in generating the stacked microphone biasing voltage used in the present invention.
- the example of Fig.4 concerns the case where a headset amplifier and interface circuit 200' is used in a radiotelephone and the "re-used" component is a DC/DC converter.
- the "re-used" component is a DC/DC converter.
- a headset interface circuit in which a comparable DC/DC converter will be present (for example, highly featured MP3 players with colour display and USB on the go), and these DC/DC converters can be "re-used" to produce the boost voltage, V B , in a comparable manner to Fig.4.
- Fig.5 illustrates a second preferred embodiment of the present invention, in which the stacked microphone biasing technique of the present invention is applied in a mono context.
- Fig.5 illustrates a headset amplifier and interface circuit 200 M adapted for supplying mono audio signals, A M , and a voltage reference to a mono headset 100 M as well as to receive microphone signals therefrom, via three wires, W 1 to W 3 .
- the mono headset 100 M includes one loudspeaker, SP, and a microphone, M.
- the headset amplifier and interface circuit 200 M supplies mono audio signals, A M , to the loudspeaker, SP, of the mono headset, 100 M , via a first wire, W 1 .
- the headset amplifier and interface circuit 200 M also supplies a phantom ground potential to the mono headset, 100 M , via the second wire, W 2 .
- the phantom ground it is convenient for the phantom ground to be constituted by the signal ground, SG, of an apparatus in which the headset amplifier and interface circuit 200 M is incorporated (or with which it is associated).
- the headset amplifier and interface circuit 200 M also supplies the mono headset, 100 M , with a stacked microphone biasing potential V MBiasSt , which is substantially equal to the sum of the phantom ground potential (here SG) and the potential difference required across the microphone, M.
- This stacked microphone biasing voltage can be produced using circuitry 400 M which is substantially the same as that used in the first preferred embodiment (circuit 400 of Fig.3).
- the boost voltage can be produced in a variety of ways, including by the approach illustrated in Fig.4.
- references to “first wire”, “second wire”, etc. do not imply any particular order of preference or hierarchy among the wires interconnecting the headset and the headset interface circuit according to the present invention.
- the numbering is arbitrary and used solely to render the explanation more intelligible.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Acoustics & Sound (AREA)
- Signal Processing (AREA)
- Circuit For Audible Band Transducer (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP03292966A EP1536663A1 (de) | 2003-11-28 | 2003-11-28 | Schnittstellenschaltung für Kopfhörer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP03292966A EP1536663A1 (de) | 2003-11-28 | 2003-11-28 | Schnittstellenschaltung für Kopfhörer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP1536663A1 true EP1536663A1 (de) | 2005-06-01 |
Family
ID=34443098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP03292966A Withdrawn EP1536663A1 (de) | 2003-11-28 | 2003-11-28 | Schnittstellenschaltung für Kopfhörer |
Country Status (1)
| Country | Link |
|---|---|
| EP (1) | EP1536663A1 (de) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009022196A1 (en) * | 2007-08-13 | 2009-02-19 | Freescale Semiconductor, Inc. | Voltage supply circuitry and integrated corcuit therefor |
| WO2010022801A1 (en) | 2008-08-29 | 2010-03-04 | Sony Ericsson Mobile Communications Ab | Method for driving a ground reference on a signal path, control circuit for driving a ground reference on a signal path, and mobile device |
| WO2010034524A1 (en) | 2008-09-24 | 2010-04-01 | Sony Ericsson Mobile Communications Ab | Biasing arrangement, electronic apparatus, biasing method, and computer program |
| CN106034273A (zh) * | 2015-03-19 | 2016-10-19 | 联想(北京)有限公司 | 控制方法、装置及电子设备 |
| CN107257517A (zh) * | 2017-08-14 | 2017-10-17 | 深圳市中芯微电子有限公司 | 一款集成dac和音效处理电路的耳机及音频放大器 |
| CN114189797A (zh) * | 2021-12-30 | 2022-03-15 | 深圳市中科蓝讯科技股份有限公司 | 一种耳机检测电路、芯片及音频设备 |
| JP7801839B1 (ja) * | 2025-08-17 | 2026-01-19 | 勝紀 沙魚川 | コネクタ接触抵抗補償を備えた増幅装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020186834A1 (en) * | 2001-06-08 | 2002-12-12 | Takenori Kato | Jack circuit and portable type electronic apparatus and telephone set using the same |
| GB2387979A (en) * | 2002-04-23 | 2003-10-29 | Nec Technologies | A connector interface for a mobile phone |
-
2003
- 2003-11-28 EP EP03292966A patent/EP1536663A1/de not_active Withdrawn
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020186834A1 (en) * | 2001-06-08 | 2002-12-12 | Takenori Kato | Jack circuit and portable type electronic apparatus and telephone set using the same |
| GB2387979A (en) * | 2002-04-23 | 2003-10-29 | Nec Technologies | A connector interface for a mobile phone |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8750533B2 (en) | 2007-08-13 | 2014-06-10 | Freescale Semiconductor, Inc. | Voltage supply circuitry and integrated circuit therefor |
| WO2009022196A1 (en) * | 2007-08-13 | 2009-02-19 | Freescale Semiconductor, Inc. | Voltage supply circuitry and integrated corcuit therefor |
| JP2012501128A (ja) * | 2008-08-29 | 2012-01-12 | ソニー エリクソン モバイル コミュニケーションズ, エービー | 信号経路上の接地基準の駆動方法、信号経路上の接地基準を駆動する制御回路、及び携帯機器 |
| WO2010022801A1 (en) | 2008-08-29 | 2010-03-04 | Sony Ericsson Mobile Communications Ab | Method for driving a ground reference on a signal path, control circuit for driving a ground reference on a signal path, and mobile device |
| CN102138320A (zh) * | 2008-08-29 | 2011-07-27 | 索尼爱立信移动通讯有限公司 | 对信号路径上的接地参考进行驱动的方法、对信号路径上的接地参考进行驱动的控制电路,以及移动设备 |
| US8326255B2 (en) | 2008-09-24 | 2012-12-04 | Sony Ericsson Mobile Communications Ab | Biasing arrangement, electronic apparatus, biasing method, and computer program |
| US7800443B2 (en) | 2008-09-24 | 2010-09-21 | Sony Ericsson Mobile Communications Ab | Circuit arrangement for providing an analog signal, and electronic apparatus |
| WO2010034524A1 (en) | 2008-09-24 | 2010-04-01 | Sony Ericsson Mobile Communications Ab | Biasing arrangement, electronic apparatus, biasing method, and computer program |
| CN106034273A (zh) * | 2015-03-19 | 2016-10-19 | 联想(北京)有限公司 | 控制方法、装置及电子设备 |
| CN106034273B (zh) * | 2015-03-19 | 2019-06-25 | 联想(北京)有限公司 | 控制方法、装置及电子设备 |
| CN107257517A (zh) * | 2017-08-14 | 2017-10-17 | 深圳市中芯微电子有限公司 | 一款集成dac和音效处理电路的耳机及音频放大器 |
| WO2019033490A1 (zh) * | 2017-08-14 | 2019-02-21 | 深圳市中芯微电子有限公司 | 一款集成dac和音效处理电路的耳机及音频放大器 |
| CN114189797A (zh) * | 2021-12-30 | 2022-03-15 | 深圳市中科蓝讯科技股份有限公司 | 一种耳机检测电路、芯片及音频设备 |
| CN114189797B (zh) * | 2021-12-30 | 2024-03-22 | 深圳市中科蓝讯科技股份有限公司 | 一种耳机检测电路、芯片及音频设备 |
| JP7801839B1 (ja) * | 2025-08-17 | 2026-01-19 | 勝紀 沙魚川 | コネクタ接触抵抗補償を備えた増幅装置 |
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