EP1700253B1 - Procede et circuit de generation d'informations concernant la duree d'une interruption de l'alimentation dans un support de donnees sans contact - Google Patents

Procede et circuit de generation d'informations concernant la duree d'une interruption de l'alimentation dans un support de donnees sans contact Download PDF

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Publication number
EP1700253B1
EP1700253B1 EP04801515A EP04801515A EP1700253B1 EP 1700253 B1 EP1700253 B1 EP 1700253B1 EP 04801515 A EP04801515 A EP 04801515A EP 04801515 A EP04801515 A EP 04801515A EP 1700253 B1 EP1700253 B1 EP 1700253B1
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EP
European Patent Office
Prior art keywords
storage capacitor
disconnection
integrated circuit
starting time
dti
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EP04801515A
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German (de)
English (en)
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EP1700253A1 (fr
Inventor
Franz Amtmann
Hubert Watzinger
Roland Brandl
Ewald Bergler
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NXP BV
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NXP BV
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Definitions

  • the field of invention relates to a method for the determination of disconnection time information which is significant for a disconnection period, in which disconnection period an integrated circuit of a data carrier designed for contactless communication with a communication partner device has not been adequately supplied with power by means of a power supply field, wherein at least one first storage capacitor of the integrated circuit is charged while the integrated circuit is being adequately supplied, and wherein the at least one first storage capacitor is discharged from a first starting time when the integrated circuit is subsequently no longer adequately supplied.
  • the field of invention further relates to an integrated circuit of a data carrier designed for contactless communication with a communication partner device, comprising a first charging circuit for charging at least one first storage capacitor of the integrated circuit while the integrated circuit is being adequately supplied with power by means of a power supply field, and comprising a first discharge circuit for discharging the storage capacitor from a first starting time when the integrated circuit is no longer adequately supplied.
  • the field of invention further relates to a data carrier for contactless communication with a communication partner device, which data carrier is provided with an integrated circuit as described in the previous paragraph.
  • a method, an integrated circuit and a data carrier of this type are, for instance, is known from the document US 2003/0112128 (Littlechild et al. ).
  • the known data carrier often referred to as transponder or tag, is designed as a passive data carrier for contactless communication with a reader station, which reader station is here designed as a so-called "tunnel reader programmer" (TRP) and provides a power supply field used to supply the data carrier or the integrated circuit respectively.
  • TRP tunnel reader programmer
  • the data carrier is further designed to store a time stamp number or an identification number or configuration information or other temporary data for a defined period, which period should last at least as long as any temporary disconnection of the power or voltage supply of the data carrier. Such a temporary disconnection can, for instance, occur when the data carrier switches from a first TRP to a second TRP.
  • the TRP can switch data carriers which have already been inventoried into a so-called mute state, whereby a mute command is transmitted to the already inventoried data carrier and a mute bit is then set and stored in the already inventoried data carrier. If a mute bit has been set, the already inventoried data carrier no longer reacts to renewed inventory attempts by the TRP.
  • the method used here for the determination of disconnection time information which is significant for an disconnection period, in which disconnection period the data carrier has not been adequately supplied with power is based on a discharge process of a storage capacitor incorporated in the data carrier or in the integrated circuit of the data carrier.
  • the storage capacitor In normal operation, that is with uninterrupted power or voltage supply of the passive data carrier, the storage capacitor is continuously charged via a charging transistor, and the storage capacitor is therefore continuously connected to the power or voltage source of the passive data carrier via the charging transistor. If the voltage of the voltage source is reduced owing to a temporary disconnection of the power supply field, the supply of the storage capacitor by the charging transistor is interrupted, and the discharge of the storage capacitor is initiated with a defined discharge current via a discharge circuit.
  • the disconnection information can easily be obtained by monitoring whether the voltage at the storage capacitor corresponds to a logic state "1" or to a logic state "0" when the energy supply field and thus the voltage supply is restored.
  • the data temporarily stored in a RAM that is data such as identification numbers, status bits etc., are valid or invalid, with the provision that the status information is stored in the RAM for a longer time than the voltage at the storage capacitor requires to reach the boundary between the logic state "1" and the logic state "0".
  • a data carrier In some significant applications, it is necessary for a data carrier to "remember" a set mute bit or the mute state at short temporary disconnections of the power supply field, but the mute bit should no longer be stored or remembered after a changeover from one reader station to another reader station, which changeover involves a comparatively longer disconnection of the power supply field, so that the data carrier can reply to an inventory prompt of the other reader station.
  • the known data carriers cannot be used efficiently in this application, which is a major drawback.
  • a further disadvantage of the known data carrier lies in the fact that the capacitance of the storage capacitor has to be relatively high to monitor longer periods of a temporary disconnection of the power supply field and that the storage capacitor therefore has to be larger, which has a particularly disadvantageous effect on the space requirement of the storage capacitor in the data carrier or the integrated circuit of the data carrier.
  • an RFID tag which comprises a timing module to measure elapsed time and an environment module to detect certain environmental conditions.
  • the RFID tag includes a transmitter/receiver, memory module, antenna module, converter, and the timing and environment modules.
  • the data carrier stores, for instance, a set mute bit or the mute state during short temporary disconnections of the power supply field of a communication partner device set up as a reader station, while the mute bit is no longer stored after a changeover from one reader station to another reader station, which changeover involves comparatively longer disconnections of the power supply field, so that the data carrier can, for instance, react and reply to an inventory prompt of the other reader station.
  • This is achieved by the determination of disconnection time information which is significant for a disconnection period, in which disconnection period the data carrier has not been adequately supplied with power.
  • a further particular advantage of the measures according to the invention lies in the fact that the at least one first storage capacitor is discharged via a comparatively low discharge current and therefore only requires a relatively low capacitance and thus only little space when implemented in an integrated circuit, and in the fact that the disconnection period can be determined very precisely.
  • Such disconnection time information can be determined by digitally measuring the discharge voltage of the at least one first storage capacitor by means of an analog-to-digital converter at a determination time after which the data carrier is once again adequately supplied with power and then calculating the disconnection period according to known physical laws governing the discharge behavior of the storage capacitor, while the effects of the IC material are taken into account in the form of IC process parameters stored on the data carrier and, in addition, the current IC temperature may be measured and taken into account if required.
  • the communication behavior of the data carrier is improved, for instance in an inventory process through a communication station or a reader station.
  • the measures according to claim 6 offer the advantage that the disconnection time information can be determined relatively soon after the adequate supply of the integrated circuit is restored.
  • Figure 1 shows in a simplified way a data carrier 1, which data carrier 1 is designed as a passive data carrier for contactless communication with a communication partner device or reader station not illustrated here. It should be pointed out in this context that it is largely known among experts that such a data carrier 1 incorporates a number of further functional blocks, which further functional blocks are not shown for clarity and simplicity, but are nevertheless required for the operation of the data carrier 1.
  • the data carrier 1 comprises an integrated circuit 2 and transfer means 3.
  • the integrated circuit 2 comprises receiving/transmitting means 4, which receiving/transmitting means 4 are connected to the transfer means 3 and include all elements essential for communication with the reader station, i.e. for transmitting and receiving data.
  • receiving/transmitting means 4 together with the mode of communication with the reader station can be found in the document WO 02/11054 A .
  • the integrated circuit 2 further comprises rectifier means 5 connected to the receiving/transmitting means 4 and designed to generate and output a supply voltage V in a way likewise known from the document WO 02/11054 A .
  • the integrated circuit 2 further comprises process control means 6 and storage means 7, which process control means 6 are represented by a microcomputer (not shown) in the known way and cooperate with the storage means 7 in the known way, whereby the contents of the storage means 7 include control commands, which control commands can be processed with the aid of the microcomputer. It may be mentioned here that the process control means 6 can be represented by a hard-wired logic circuit.
  • the process control means 6 are further connected to the receiving/transmitting means 4 and are designed for processing received data and for outputting generate or processed data thereto.
  • the integrated circuit 2 further comprises a first charging circuit 8 and a first storage capacitor C1 and a first discharge circuit 9 and a second charging circuit 10 and a second storage capacitor C2 and a second discharge circuit 11 as well as comparator means 12 and a power-on-reset stage 13; these elements will be explained in greater detail at a later stage.
  • the data carrier 1 is designed as a passive data carrier and therefore generates its supply voltage from the power supply field of the reader station, as has been explained above in the context of the rectifier means 5.
  • the data carrier 1 is located in the power supply field of the reader station and involved in an inventory process such as described, for instance, in the document WO 02/11054 . It is further assumed that the data carrier 1 has already transmitted the data stored in the storage means 7 to the reader station. The reader station has then transmitted a mute command or quiet command to the data carrier 1, whereupon the data carrier 1 has set a mute bit 14 in the storage means 7. As a result of the setting of the mute bit 14, the data carrier 1 no longer replies to the inventory prompts of the reader station, which inventory prompts are transmitted by the reader station in order to prompt any other data carriers to answer and then complete an inventory.
  • the process control means 6 cause the first charging circuit 8 to charge the first storage capacitor C1 while the mute bit 14 is being set, the first charging circuit 8 being represented in the present case by a bipolar transistor circuit and charging the first storage capacitor C1 from the supply voltage V to a voltage U0.
  • the first charging circuit 8 can alternatively be represented by a CMOS circuit or a FET circuit.
  • the supply voltage V is held constant by the rectifier means 5.
  • a first disconnection period DT1 in which the integrated circuit 2 is no longer adequately supplied with power, lasts from a first starting time t1 to a second starting time t2.
  • a disconnection period may, for instance, last for one (1) second, may, however, be shorter, for instance 100 milliseconds, or longer, for instance up to ten (10) seconds.
  • the second charging circuit 10 is here represented by a bipolar transistor circuit and can, on activation by the process control means 6, charge the second storage capacitor C2 from the supply voltage V to a voltage U0.
  • the second storage capacitor C2 is charged up to a third starting time t3, as shown in the second time diagram in Figure 3 . It should further be mentioned that the charging process of the second storage capacitor C2 can be relatively quick, so that the third starting time t3 follows the second starting time t2 virtually immediately.
  • the first storage capacitor C1 is discharged by means of the first discharge circuit 9, which first discharge circuit 9 is here represented by a leakage current circuit or a leakage current drain.
  • the first storage capacitor C1 is therefore discharged with the aid of a leakage current.
  • the leakage current drain is represented by the gate of a FET.
  • the process control means 6 are likewise adapted such that the first storage capacitor C1 is not again charged by means of the first charging circuit 8 following the occurrence of the reset signal POR at the second starting time t2, which means that the first storage capacitor C1 continues to be discharged steadily.
  • the second storage capacitor C2 is also discharged by means of the second discharge circuit 11, which second discharge circuit 11 is here likewise represented by a leakage current circuit or a leakage current drain.
  • the second storage capacitor C2 is therefore discharged with the aid of a leakage current.
  • the leakage current drain for the second storage capacitor C2 is also represented by the gate of a FET.
  • the process control means 6 initiate a determination of disconnection time information DTI at a determination time t4 separated from the third starting time t3 by a period TPR, which disconnection time information DTI is significant for the disconnection period DT 1.
  • the comparator means 12 are activated at the determination time t4, which comparator means 12 compare the discharge voltage of the first storage capacitor C1 present at the determination time t4 to the discharge voltage of the second storage capacitor C2 and determine the disconnection time information DTI in dependence on a result of the comparison and output it to decision means 15 incorporated in the process control means 6.
  • the discharge voltage of the first storage capacitor C1 is higher than the discharge voltage of the second storage capacitor C2 at the determination time t4.
  • the disconnection time information DTI delivered to the decision means 15 therefore includes the information that there has been a "short" disconnection period DT1, with the result that the decision means 15 prevent the data carrier 1 from replying or reacting to inventory requests of the reader station.
  • Another application is based on the assumption that a faultless power supply for the data carrier 1 is unavailable for a comparatively longer period, for instance owing to a local transfer of the data carrier 1 from one reader station to another reader station, and that there is therefore no longer an adequate power supply, as shown in the third time diagram in Figure 4 , where a second disconnection period DT2, in which the integrated circuit 2 is no longer adequately supplied with power, lasts from a first starting time t1 to a second starting time t2.
  • a disconnection period may, for instance, last ten (10) seconds, may, however, last much longer, for instance some minutes or hours.
  • the disconnection time information DTI is determined by analogy with the process described immediately above for the identification of the disconnection period DT1.
  • the discharge voltage of the first storage capacitor C1 is lower at the determination time t4 than the discharge voltage of the second storage capacitor C2.
  • the disconnection time information DTI output to the decision means 15 includes the information that there has been a "long" disconnection period DT2, with the result that the decision means 15 enable the data carrier 1 to reply or react to inventory prompts of the other reader station.
  • the first storage capacitor C1 has a capacitance of approximately ten (10) picofarads (pF) and the second storage capacitor C2 only a tenth of the capacitance of the first storage capacitor C1, i.e. one (1) picofarad (pF).
  • the leakage current drains are in both cases designed for discharging both the first storage capacitor C1 and the second storage capacitor C2 at the same leakage current level.
  • the first storage capacitor C1 and the second storage capacitor C2 can have the same capacitance, in which case the leakage current drains have to be designed for discharging the first storage capacitor C1 and the second storage capacitor C2 at different leakage current levels.
  • Different leakage current drains can, for instance, be implemented by different sizing of the above-mentioned gates of one FET each.
  • Figure 2 shows a data carrier 16 similar to the data carrier 1, which data carrier 16 comprises an integrated circuit 17 incorporating for the major part the same elements identified by the same reference numbers as the integrated circuit 2.
  • the comparator means 12 are here designed or adapted to determine the intersection time t5 shown in the fourth time diagram in Figure 4 , at which intersection time t5 the discharge voltage of the first storage capacitor C1 is equal to the discharge voltage of the second storage capacitor C2.
  • the process control means 6 are additionally provided with measuring means 18 and calculating means 19.
  • the comparator means 12 When the intersection time t5 is reached, the comparator means 12 output a trigger signal TS to the measuring means 18, which trigger signal TS ends or stops a time measurement started by the measuring means 18 from the third starting time t3 and causes the measuring means 18 to determine a measuring period TB, which measuring period TB starts at the third starting time t3 and ends at the intersection time t5.
  • the measuring period TB is output to the calculating means 19 by the measuring means 18.
  • the calculating means 19 are adapted for calculating, as a product of the measuring time TB and the ratio - reduced by unity (1) - of the capacitance of the first storage capacitor C1 to the capacitance of the second storage capacitor C2, the disconnection period DT1 or DT2 respectively from known physical laws and from the contexts of the discharge processes of the first storage capacitor C1 and the second storage capacitor C2.
  • the decision means 15 are designed for comparing the calculated value of the disconnection period DT1 or DT2 respectively to a comparison value stored in the storage means 7, and for deciding in dependence thereon, whether there is a "long" period or a "short" period.
  • Figure 6 and Figure 7 respectively show a dependence, or the effect of different leakage currents, on the voltage curves for the leakage currents I1, I2 and I3. While Figure 6 shows a "short" disconnection period DT1, Figure 7 shows a "long” disconnection period DT2. It should, in particular, be pointed out that the intersection times t5 of the voltage curves always deliver the same point in time at each leakage current.
  • the integrated circuit 2 of the data carrier 1 and the integrated circuit 17 of the data carrier 16 can contain different capacitor pairs, each with a first storage capacitor C1 and a second storage capacitor C2 of different capacitances, so that the different capacitor pairs can be used to establish or determine different disconnection periods DT. This can further improve the accuracy of establishing or determining such disconnection periods DT and cover a larger time range.
  • the process control means 6 are designed for selecting a suitable capacitor pair for each disconnection period DT to be determined; with this capacitor pair, a disconnection period DT is then determined as described above with reference to Figure 1 .
  • Figure 3 shows a data carrier 20 similar to the data carrier 1 but not forming part of the claimed invention, which data carrier 20 comprises an integrated circuit 21 incorporating for the major part the same elements identified by the same reference numbers as the integrated circuit 2.
  • an A/D converter 22 and a temperature sensor 23 are provided.
  • the process control means 6 additionally incorporate determination means 24 and correction means 25.
  • the A/D converter 22 is connected to the first storage capacitor C1 and designed for measuring the voltages of the first storage capacitor C1 and for outputting digitized voltage level signals to the determination means 24.
  • the discharge voltage of the at least one first storage capacitor C1 is measured digitally by means of the A/D converter 22 at a determination time t2, after which determination time t2 the data carrier 20 is once again adequately supplied with power, following which the disconnection period is calculated with the aid of the determination means 24 in accordance with known physical laws governing the discharge behavior of the storage capacitors.
  • the disconnection time information DTI determined in this way is then corrected in the correction means 25, using correction values stored in a correction value memory area 26 of the storage means 7, which correction values take account of the effects of the IC material and thus of the discharge behavior of the first storage capacitor C1.
  • the current IC temperature can additionally be measured by means of the temperature sensor 23, and the measured temperature value can be output to the correction means 25, whereby the correction means 25 then take this temperature value into account when correcting the disconnection time information DTI.
  • the disconnection time information DTI output to the decision means 15 corresponds to the value of the disconnection period DT in which the data carrier 20 was not adequately supplied with power.
  • the decision means 15 are in this case designed for comparing this disconnection time information DTI to a comparison value stored in the storage means 7 and, in dependence thereon, for making further decisions or setting actions affecting the communication behavior of the data carrier 20.
  • Comparatively simpler disconnection time information DTI with only one information item on a "short” or “long” disconnection period is also possible in a modified form in the data carrier 20, which is now illustrated with reference to Figure 5 .
  • the time diagrams shown in Figure 5 feature the same times or starting times as those in Figure 4 .
  • the first storage capacitor C1 is discharged from the starting time t1.
  • the process control means 6 are designed for recharging the first storage capacitor C1 at the second starting time t2, i.e. immediately following the re-establishment of the adequate supply of the data carrier 20.
  • the charged first storage capacitor C1 is once again discharged, a process which runs up to the determination time t4.
  • the determination means 24 are here designed for determining and comparing the discharge voltage of the first storage capacitor C1 at the second starting time t2 and at the determination time t4 with the aid of the A/D converter 22.
  • the discharge voltage determined at the second starting time t2 is identified as Ux
  • the discharge voltage determined at the determination time t4 is identified as Uy.
  • a comparison between Ux and Uy shows that Ux is greater than Uy.
  • the determination means 24 output as disconnection time information DTI to the decision means 15 the information that the disconnection period DT1 was "short”.
  • a comparison between Ux and Uy shows that Ux is less than Uy.
  • the determination means 24 output as disconnection time information DTI to the decision means 15 the information that the disconnection period DT2 was "long".
  • radiation includes different types of radiation, such as thermal radiation, light radiation, ionic radiation, radioactive radiation etc.
  • Radiation can affect a data carrier according to the invention and its integrated circuit externally. Radiation can also be generated internally, such as thermal radiation caused by internal losses.

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Claims (8)

  1. Procédé de détermination d'une information de durée de déconnexion (DTI) qui est significative d'une période de déconnexion (DT), au cours de laquelle période de déconnexion (DT) un circuit intégré (2) d'un support de données (1) conçu pour des communications sans contact avec un dispositif de communication partenaire n'a pas reçu une alimentation adéquate en énergie grâce à un champ d'alimentation en énergie, dans lequel au moins un premier condensateur de stockage (C1) du circuit intégré (2) est chargé pendant que le circuit intégré (2) reçoit une alimentation correcte, et dans lequel au moins un premier condensateur de stockage (C1) est déchargé à partir d'un premier instant initial (t1) lorsque le circuit intégré (2) n'est plus correctement alimenté par la suite, et dans lequel l'information de durée de déconnexion (DTI) est déterminée à partir du comportement de décharge, d'au moins un premier condensateur de stockage (C1), qui est influencé par le matériau du CI et par le rayonnement, et dans lequel l'information de durée de déconnexion déterminée (DTI) est corrigée des effets du matériau du CI et/ou d'au moins un effet de rayonnement, dans lequel l'information de durée de déconnexion (DTI) est déterminée et corrigée à partir du comportement de décharge d'au moins un premier condensateur de stockage (C1) et du comportement de décharge d'un deuxième condensateur de stockage (C2) du circuit intégré (2), dans lequel une nouvelle charge d'au moins un premier condensateur de stockage (C1) est empêchée à partir d'un deuxième instant initial (t2) suivant le premier instant initial (t1), à partir duquel deuxième instant initial (t2) une alimentation correcte est rétablie, et ce, jusqu'à un instant de détermination (t4), et dans lequel le deuxième condensateur de stockage (C2) est chargé à partir du deuxième instant initial (t2) et dans lequel le deuxième condensateur de stockage (C2) est déchargé à partir d'un troisième instant initial (t3) suivant le deuxième instant initial (t2), et dans lequel la tension de décharge d'au moins un premier condensateur de stockage (C1) est comparée à la tension de décharge du deuxième condensateur de stockage (C2) à l'instant de détermination (t4) suivant le troisième instant initial (t3), et dans lequel l'information de durée de déconnexion (DTI) est déterminée en fonction d'un résultat de la comparaison.
  2. Procédé de détermination d'une information de durée de déconnexion (DTI) qui est significative d'une période de déconnexion (DT), au cours de laquelle période de déconnexion (DT) un circuit intégré (2) d'un support de données (1) conçu pour des communications sans contact avec un dispositif de communication partenaire n'a pas reçu une alimentation adéquate en énergie grâce à un champ d'alimentation en énergie, dans lequel au moins un premier condensateur de stockage (C1) du circuit intégré (2) est chargé pendant que le circuit intégré (2) reçoit une alimentation correcte, et dans lequel au moins un premier condensateur de stockage (C1) est déchargé à partir d'un premier instant initial (t1) lorsque le circuit intégré (2) n'est plus correctement alimenté par la suite, et dans lequel l'information de durée de déconnexion (DTI) est déterminée à partir du comportement de décharge d'au moins un premier condensateur de stockage (C1), qui est influencé par le matériau du CI et par le rayonnement, et dans lequel l'information de durée de déconnexion déterminée (DTI) est corrigée des effets du matériau du CI et/ou d'au moins un effet de rayonnement, dans lequel l'information de durée de déconnexion (DTI) est déterminée et corrigée à partir du comportement de décharge d'au moins un premier condensateur de stockage (C1), dans lequel le premier condensateur de stockage (C1) est chargé à partir d'un deuxième instant initial (t2) suivant le premier instant initial (t1), à partir duquel deuxième instant initial (t2) une alimentation correcte est rétablie, et dans lequel le premier condensateur de stockage (C1) est déchargé à partir d'un troisième instant initial (t3) suivant le deuxième instant initial (t2), et dans lequel la tension de décharge du premier condensateur de stockage (C1) est comparée à la tension de décharge du premier condensateur de stockage (C1) présente au deuxième instant initial (t2), et ce, à un instant de détermination (t4) suivant le troisième instant initial (t3), et dans lequel l'information de durée de déconnexion (DTI) est déterminée en fonction du résultat de la comparaison.
  3. Procédé selon l'une des revendications 1 ou 2, dans lequel l'information de durée de déconnexion (DTI) est utilisée pour décider si le support de données (1) doit répondre à certaines commandes immédiates du dispositif de communication partenaire.
  4. Circuit intégré (2) d'un support de données (1) conçu pour des communications sans contact avec un dispositif de communication partenaire, comprenant un premier circuit de charge (8) pour charger au moins un premier condensateur de stockage (C1) du circuit intégré (2) pendant que le circuit intégré (2) reçoit une alimentation correcte grâce à un champ d'alimentation en énergie, et comprenant un premier circuit de décharge (9) pour décharger le premier condensateur de stockage (C1) lorsque le circuit intégré (2) n'est plus correctement alimenté à partir d'un premier instant initial (t1), dans lequel le comportement de décharge d'au moins un condensateur de stockage (C1) est influencé par le matériau du CI et par au moins un effet de rayonnement, et comprenant des moyens de détermination (12, 18, 19 ; 22, 24) pour déterminer une information de durée de déconnexion (DTI) qui est significative d'une période de déconnexion (DT), au cours de laquelle période de déconnexion (DT) un circuit intégré (2) n'a pas reçu une alimentation adéquate en énergie, l'information de durée de déconnexion (DTI) étant déterminée à partir du comportement de décharge d'au moins un premier condensateur de stockage (C1), qui est influencé par le matériau du CI et par au moins un effet de rayonnement, de telle sorte que l'information de durée de déconnexion (DTI) est disponible à partir d'un instant de détermination (t4), et comprenant des moyens de correction pour la correction de l'information de durée de déconnexion (DTI) déterminée en fonction des effets du matériau du CI et/ou d'au moins un effet de rayonnement, dans lequel on empêche une nouvelle charge d'au moins un premier condensateur de stockage (C1) à l'aide de moyens de détermination à partir d'un deuxième instant initial (t2) suivant le premier instant initial (t1), à partir duquel deuxième instant initial (t2) une alimentation correcte est rétablie, et ce, jusqu'à l'instant de détermination (t4),et dans lequel est prévu un deuxième condensateur de stockage (C2), et dans lequel est prévu un deuxième circuit de charge (10) pour charger le deuxième condensateur de stockage (C2) à partir du deuxième instant initial (t2), et dans lequel un deuxième circuit de décharge (11) est prévu pour décharger le deuxième condensateur de stockage (C2) à partir d'un troisième instant initial (t3) suivant le deuxième instant initial (t2), dans lequel le comportement de décharge du deuxième condensateur de stockage (C2) est influencé par le matériau du CI et par au moins un effet de rayonnement, et dans lequel les moyens de détermination (12) sont prévus pour comparer la tension de décharge d'au moins un premier condensateur de stockage (C1) à la tension de décharge du deuxième condensateur de stockage (C2) à l'instant de détermination (t4) suivant le troisième instant initial (t3), et pour déterminer l'information de durée de déconnexion (DTI) en fonction d'un résultat de la comparaison.
  5. Circuit intégré (2) d'un support de données (1) conçu pour des communications sans contact avec un dispositif de communication partenaire, comprenant un premier circuit de charge (8) pour charger au moins un premier condensateur de stockage (C1) du circuit intégré (2) pendant que le circuit intégré (2) reçoit une alimentation correcte grâce à un champ d'alimentation en énergie, et comprenant un premier circuit de décharge (9) pour décharger le premier condensateur de stockage (C1) lorsque le circuit intégré (2) n'est plus correctement alimenté à partir d'un premier instant initial (t1), dans lequel le comportement de décharge d'au moins un condensateur de stockage (C1) est influencé par le matériau du CI et par au moins un effet de rayonnement, et comprenant des moyens de détermination (12, 18, 19 ; 22, 24) pour déterminer une information de durée de déconnexion (DTI) qui est significative d'une période de déconnexion (DT), au cours de laquelle période de déconnexion (DT) un circuit intégré (2) n'a pas reçu une alimentation adéquate en énergie, l'information de durée de déconnexion (DTI) étant déterminée à partir du comportement de décharge d'au moins un premier condensateur de stockage (C1), qui est influencé par le matériau du CI et par au moins un effet de rayonnement, de telle sorte que l'information de durée de déconnexion (DTI) est disponible à partir d'un instant de détermination (t4), et comprenant des moyens de correction pour la correction de l'information de durée de déconnexion (DTI) déterminée en fonction des effets du matériau du CI et/ou d'au moins un effet de rayonnement, dans lequel les moyens de détermination (6, 22, 24) sont agencés pour initialiser une nouvelle charge d'au moins un premier condensateur de stockage (C1) à partir d'un deuxième instant initial (t2) suivant le premier instant initial (t1), à partir duquel deuxième instant initial (t2) une alimentation correcte est rétablie, et dans lequel le premier circuit de décharge (9) est prévu pour décharger le premier condensateur de stockage (C1) à partir d'un troisième instant initial (t3) suivant le deuxième instant initial (t2), dans lequel les moyens de détermination (12) sont prévus pour comparer la tension de décharge du premier condensateur de stockage (C1) à la tension de décharge du premier condensateur de stockage (C1) présente au deuxième instant initial (t2), et ce, à l'instant de détermination (t4) suivant le troisième instant initial (t3), et pour déterminer l'information de durée de déconnexion (DTI) en fonction d'un résultat de la comparaison.
  6. Circuit intégré (2) selon la revendication 4, dans lequel la capacité du premier condensateur de stockage (C1) au moins correspond à un multiple de la capacité du deuxième condensateur de stockage (C2).
  7. Circuit intégré (2) selon l'une des revendications 4 ou 6, dans lequel au moins un premier condensateur de stockage (C1) et le deuxième condensateur de stockage (C2) sont disposés immédiatement l'un à côté de l'autre dans le circuit intégré (2).
  8. Support de données pour des communications sans contact avec un dispositif de communication partenaire, dans lequel le support de données est muni d'un circuit intégré (2) selon l'une des revendications 4 à 7.
EP04801515A 2003-12-23 2004-12-09 Procede et circuit de generation d'informations concernant la duree d'une interruption de l'alimentation dans un support de donnees sans contact Expired - Lifetime EP1700253B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP04801515A EP1700253B1 (fr) 2003-12-23 2004-12-09 Procede et circuit de generation d'informations concernant la duree d'une interruption de l'alimentation dans un support de donnees sans contact

Applications Claiming Priority (3)

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EP03104969 2003-12-23
EP04801515A EP1700253B1 (fr) 2003-12-23 2004-12-09 Procede et circuit de generation d'informations concernant la duree d'une interruption de l'alimentation dans un support de donnees sans contact
PCT/IB2004/052727 WO2005064532A1 (fr) 2003-12-23 2004-12-09 Procede de generation d'informations concernant la duree d'une interruption de l'alimentation dans un support de donnees sans contact

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EP1700253A1 EP1700253A1 (fr) 2006-09-13
EP1700253B1 true EP1700253B1 (fr) 2008-11-19

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AT (1) ATE414956T1 (fr)
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US20080129268A1 (en) * 2006-11-30 2008-06-05 Devilbiss Alan D Dual Voltage Power Supply
CN100458841C (zh) * 2006-12-28 2009-02-04 复旦大学 一种支持无线充电的半有源射频识别标签
JP5919958B2 (ja) * 2012-03-30 2016-05-18 セイコーエプソン株式会社 回路装置及び電子機器
FR3028073B1 (fr) * 2014-11-02 2018-01-12 Marc Nader-Burck Badge electronique, systeme de gestion de badges electroniques, procede et programme d'ordinateur correspondants
US10412565B2 (en) * 2016-12-19 2019-09-10 Qualcomm Incorporated Systems and methods for muting a wireless communication device
CN109766980B (zh) * 2019-01-17 2022-05-06 卓捷创芯科技（深圳）有限公司 一种改进温度传感器无源射频识别标签能量收集的电路及方法

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US6404325B1 (en) * 1998-01-08 2002-06-11 Intermec Ip Corp. Method and system for storage and recovery of vital information on radio frequency transponders
US6294997B1 (en) * 1999-10-04 2001-09-25 Intermec Ip Corp. RFID tag having timing and environment modules
JP2001136100A (ja) * 1999-11-04 2001-05-18 Matsushita Electronics Industry Corp 情報通信処理方式
US7248145B2 (en) 2000-02-28 2007-07-24 Magellan Technology Oty Limited Radio frequency identification transponder
ATE293268T1 (de) 2000-07-31 2005-04-15 Koninkl Philips Electronics Nv Kommunikationsstation und datenträger mit verbessertem quittierungsprotokoll
US6812841B2 (en) * 2002-01-23 2004-11-02 Intermec Ip Corp. Passive RFID tag that retains state after temporary loss of power
US7224273B2 (en) * 2002-05-23 2007-05-29 Forster Ian J Device and method for identifying a container

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JP2007516532A (ja) 2007-06-21
CN100481118C (zh) 2009-04-22
WO2005064532A1 (fr) 2005-07-14
US20070176753A1 (en) 2007-08-02
KR20060121230A (ko) 2006-11-28
US7599661B2 (en) 2009-10-06
EP1700253A1 (fr) 2006-09-13
CN1898684A (zh) 2007-01-17
DE602004017904D1 (de) 2009-01-02
ATE414956T1 (de) 2008-12-15

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