EP1862905A3 - Speichersystem mit Flash-Speicher - Google Patents
Speichersystem mit Flash-Speicher Download PDFInfo
- Publication number
- EP1862905A3 EP1862905A3 EP06256191A EP06256191A EP1862905A3 EP 1862905 A3 EP1862905 A3 EP 1862905A3 EP 06256191 A EP06256191 A EP 06256191A EP 06256191 A EP06256191 A EP 06256191A EP 1862905 A3 EP1862905 A3 EP 1862905A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- flash memory
- storage system
- memory storage
- memory devices
- flash
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
- G06F11/108—Parity data distribution in semiconductor storages, e.g. in SSD
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006150912A JP4818812B2 (ja) | 2006-05-31 | 2006-05-31 | フラッシュメモリストレージシステム |
| US11/503,217 US7640390B2 (en) | 2006-05-31 | 2006-08-14 | Flash memory storage system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP1862905A2 EP1862905A2 (de) | 2007-12-05 |
| EP1862905A3 true EP1862905A3 (de) | 2010-07-14 |
Family
ID=38519936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP06256191A Withdrawn EP1862905A3 (de) | 2006-05-31 | 2006-12-05 | Speichersystem mit Flash-Speicher |
Country Status (1)
| Country | Link |
|---|---|
| EP (1) | EP1862905A3 (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011021237A1 (en) | 2009-08-20 | 2011-02-24 | Hitachi,Ltd. | Storage subsystem and its data processing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5680579A (en) * | 1994-11-10 | 1997-10-21 | Kaman Aerospace Corporation | Redundant array of solid state memory devices |
| US5696934A (en) * | 1994-06-22 | 1997-12-09 | Hewlett-Packard Company | Method of utilizing storage disks of differing capacity in a single storage volume in a hierarchial disk array |
| US5956743A (en) * | 1997-08-25 | 1999-09-21 | Bit Microsystems, Inc. | Transparent management at host interface of flash-memory overhead-bytes using flash-specific DMA having programmable processor-interrupt of high-level operations |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3507132B2 (ja) | 1994-06-29 | 2004-03-15 | 株式会社日立製作所 | フラッシュメモリを用いた記憶装置およびその記憶制御方法 |
| JP2006150912A (ja) | 2004-12-01 | 2006-06-15 | Seiko Epson Corp | 画像出力システム、および情報報知方法 |
-
2006
- 2006-12-05 EP EP06256191A patent/EP1862905A3/de not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5696934A (en) * | 1994-06-22 | 1997-12-09 | Hewlett-Packard Company | Method of utilizing storage disks of differing capacity in a single storage volume in a hierarchial disk array |
| US5680579A (en) * | 1994-11-10 | 1997-10-21 | Kaman Aerospace Corporation | Redundant array of solid state memory devices |
| US5956743A (en) * | 1997-08-25 | 1999-09-21 | Bit Microsystems, Inc. | Transparent management at host interface of flash-memory overhead-bytes using flash-specific DMA having programmable processor-interrupt of high-level operations |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1862905A2 (de) | 2007-12-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| 17P | Request for examination filed |
Effective date: 20061227 |
|
| AK | Designated contracting states |
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|
| AX | Request for extension of the european patent |
Extension state: AL BA HR MK YU |
|
| PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
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| AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR |
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| AX | Request for extension of the european patent |
Extension state: AL BA HR MK RS |
|
| AKX | Designation fees paid |
Designated state(s): DE FR GB IE |
|
| 17Q | First examination report despatched |
Effective date: 20141114 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20150527 |