EP1873671B2 - Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken - Google Patents

Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken Download PDF

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Publication number
EP1873671B2
EP1873671B2 EP06013441.8A EP06013441A EP1873671B2 EP 1873671 B2 EP1873671 B2 EP 1873671B2 EP 06013441 A EP06013441 A EP 06013441A EP 1873671 B2 EP1873671 B2 EP 1873671B2
Authority
EP
European Patent Office
Prior art keywords
additional
data
cryptographic
phase
aop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP06013441.8A
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English (en)
French (fr)
Other versions
EP1873671B1 (de
EP1873671A1 (de
Inventor
Giovanni Fontana
Saverio Donatiello
Giovanni Di Sirio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics International NV
Original Assignee
STMicroelectronics International NV Switzerland
STMicroelectronics International NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=37895965&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=EP1873671(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by STMicroelectronics International NV Switzerland, STMicroelectronics International NV filed Critical STMicroelectronics International NV Switzerland
Priority to AT06013441T priority Critical patent/ATE440336T1/de
Priority to EP06013441.8A priority patent/EP1873671B2/de
Priority to DE602006008599T priority patent/DE602006008599D1/de
Priority to US11/770,997 priority patent/US8804949B2/en
Publication of EP1873671A1 publication Critical patent/EP1873671A1/de
Publication of EP1873671B1 publication Critical patent/EP1873671B1/de
Application granted granted Critical
Publication of EP1873671B2 publication Critical patent/EP1873671B2/de
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/04—Protocols for data compression, e.g. ROHC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2123—Dummy operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08—Randomization, e.g. dummy operations or using noise

Definitions

  • the cryptographic algorithm comprises a sequence of cryptographic operations OP intended to cipher one or more plain texts M1,.., MN in corresponding enciphered texts C1,.., CN.
  • the sequence of cryptographic operations OP ciphers the plain texts M1,.., MN through a secret key ESK.
  • a cryptographic operation OP intended to encipher a plain text M1, .., MN with the secret key ESK, is interleaved by an additional cryptographic operation AOP intended to encipher a random plain text RB with a random secret key ERK.
  • a plurality of iteration follow the initialization step.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
  • Credit Cards Or The Like (AREA)

Claims (7)

  1. Verfahren zum Schutz von Daten vor Leistungsanalyse-Attacken, umfassend mindestens eine erste Phase des Ausführens einer kryptographischen Operation (OP) zum Verschlüsseln der Daten in entsprechende Verschlüsselungsdaten durch einen geheimen Schlüssel (ESK), umfassend mindestens eine zweite Phase des Ausführens einer zusätzlichen kryptographischen Operation (AOP) zum Verschlüsseln zusätzlicher Daten in entsprechende zusätzliche Verschlüsselungsdaten durch einen zusätzlichen geheimen Schlüssel (ERK), wobei die zusätzlichen Daten und der zusätzliche geheime Schlüssel (ERK) zufällig erzeugt werden, so dass eine Ausführung der ersten Phase und der zweiten Phase für die Leistungsanalyse-Attacke nicht unterscheidbar ist, dadurch gekennzeichnet, dass
    eine Sequenz der kryptographischen Operationen (OP) durch die zusätzlichen kryptographischen Operationen verschachtelt wird;
    die Anzahl und die Anordnung der mindestens zweiten Phase des Ausführens der zusätzlichen kryptographischen Operationen (AOP) zwischen einem Paar der mindestens ersten Phase des Ausführens der kryptografischen Operationen (OP) zufallsbedingt verwaltet werden;
    die Anzahl und die Anordnung in dem gesamten Verschlüsselungsalgorithmus der zusätzlichen kryptographischen Operationen (AOP), die die Sequenz der kryptographischen Operationen (OP) verschachteln, nicht vorbestimmt sind sondern zufallsbedingt verwaltet werden.
  2. Verfahren zum Schutz von Daten nach Anspruch 1, gekennzeichnet durch die Gegebenheit, dass die zusätzlichen Daten einen oder mehrere Zufallstexte (RB) umfassen.
  3. Verfahren zum Schutz von Daten nach Anspruch 1, dadurch gekennzeichnet, dass die zusätzliche kryptographische Operation (AOP) den einen oder die mehreren zufälligen Klartexte (RB) durch die zusätzlichen geheimen Schlüssel (ERK) in die entsprechenden zusätzlichen Verschlüsselungsdaten verschlüsselt.
  4. Verfahren zum Schutz von Daten nach Anspruch 1, gekennzeichnet durch die Gegebenheit, dass die mindestens zweite Phase des Ausführens der zusätzlichen kryptographischen Operation (AOP) eine Ausschussdaten-Ausgabe (GO) erzeugt, die durch die erste Phase des Ausführens der kryptografischen Operation (OP) ignoriert wird.
  5. Verfahren zum Schutz von Daten nach Anspruch 1, gekennzeichnet durch die Gegebenheit des Festlegens einer maximalen Anzahl der Ausführung der mindestens zweiten Phase.
  6. Verfahren zum Schutz von Daten nach Anspruch 1, gekennzeichnet durch die Gegebenheit des Speicherns der Daten in einer Speichereinheit einer IC-Karte.
  7. IC-Karte, umfassend einen geheimen Schlüssel (ESK) zum Schutz von Daten vor Leistungsanalyse-Attacken durch Ausführen mindestens einer kryptografischen Operation (OP), die die Daten in entsprechenden Verschlüsselungsdaten verschlüsselt, umfassend Mittel zum Erzeugen zusätzlicher Daten und zusätzlicher geheimer Schlüssel (ERK), um eine zusätzliche kryptographische Operation (AOP) auszuführen, die die zusätzlichen Daten in entsprechende zusätzliche Verschlüsselungsdaten verschlüsselt, wobei die kryptographische Operation (OP) und die zusätzliche kryptographische Operation (AOP) für die Leistungsanalyse-Attacke nicht unterscheidbar sind, dadurch gekennzeichnet, dass die Mittel vorsehen, dass eine Sequenz der kryptographischen Operationen (OP) durch die zusätzlichen kryptographischen Operationen verschachtelt wird;
    die Anzahl und die Anordnung der mindestens zweiten Phase des Ausführens der zusätzlichen kryptographischen Operationen (AOP) zwischen einem Paar der mindestens ersten Phase des Ausführens der kryptografischen Operationen (OP) zufallsbedingt verwaltet werden;
    die Anzahl und die Anordnung in dem gesamten Verschlüsselungsalgorithmus der zusätzlichen kryptographischen Operationen (AOP), die die Sequenz der kryptographischen Operationen (OP) verschachteln, nicht vorbestimmt sind sondern zufallsbedingt verwaltet werden.
EP06013441.8A 2006-06-29 2006-06-29 Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken Not-in-force EP1873671B2 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AT06013441T ATE440336T1 (de) 2006-06-29 2006-06-29 Verfahren zum schutz von ic-karten vor leistungsanalyse-attacken
EP06013441.8A EP1873671B2 (de) 2006-06-29 2006-06-29 Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken
DE602006008599T DE602006008599D1 (de) 2006-06-29 2006-06-29 Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken
US11/770,997 US8804949B2 (en) 2006-06-29 2007-06-29 Method for protecting IC cards against power analysis attacks

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP06013441.8A EP1873671B2 (de) 2006-06-29 2006-06-29 Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken

Publications (3)

Publication Number Publication Date
EP1873671A1 EP1873671A1 (de) 2008-01-02
EP1873671B1 EP1873671B1 (de) 2009-08-19
EP1873671B2 true EP1873671B2 (de) 2018-08-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP06013441.8A Not-in-force EP1873671B2 (de) 2006-06-29 2006-06-29 Verfahren zum Schutz von IC-Karten vor Leistungsanalyse-Attacken

Country Status (4)

Country Link
US (1) US8804949B2 (de)
EP (1) EP1873671B2 (de)
AT (1) ATE440336T1 (de)
DE (1) DE602006008599D1 (de)

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US8804949B2 (en) 2014-08-12
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EP1873671A1 (de) 2008-01-02
DE602006008599D1 (de) 2009-10-01
ATE440336T1 (de) 2009-09-15

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