EP2009143B1 - Bipolares, stromloses Beschichtungsverfahren - Google Patents

Bipolares, stromloses Beschichtungsverfahren Download PDF

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EP2009143B1
EP2009143B1 EP07119756.0A EP07119756A EP2009143B1 EP 2009143 B1 EP2009143 B1 EP 2009143B1 EP 07119756 A EP07119756 A EP 07119756A EP 2009143 B1 EP2009143 B1 EP 2009143B1
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Prior art keywords
substrate
deposition
pattern
ocd
photo
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French (fr)
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EP2009143A1 (de
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Philippe M. Vereecken
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Interuniversitair Microelektronica Centrum vzw IMEC
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Interuniversitair Microelektronica Centrum vzw IMEC
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Priority to JP2008122447A priority patent/JP2009001897A/ja
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1655—Process features
    • C23C18/1664—Process features with additional means during the plating process
    • C23C18/1671—Electric field
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1603—Process or apparatus coating on selected surface areas
    • C23C18/1605—Process or apparatus coating on selected surface areas by masking
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1635—Composition of the substrate
    • C23C18/1639—Substrates other than metallic, e.g. inorganic or organic or non-conductive
    • C23C18/1642—Substrates other than metallic, e.g. inorganic or organic or non-conductive semiconductor
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1655—Process features
    • C23C18/1664—Process features with additional means during the plating process
    • C23C18/1667—Radiant energy, e.g. laser

Definitions

  • the present disclosure is related to the field of bipolar electrochemical processing (Bi-ECP).
  • the present invention is related to bipolar electroless processing.
  • the invention is particularly related to a method for selective electrochemical deposition of metallic particles onto a substrate.
  • the present invention further relates to specific uses of a method for selective deposition of metallic nanoparticles.
  • Electrochemical deposition (or plating) methods are widely used to deposit metallic compounds onto a surface of a substrate. Both electroplating and electroless plating processes are attractive methods to deposit pure metals or alloys from metal ions in solution. Besides (metal) deposition, also electrochemical metal-removal processes are widely used and applied for electro polishing, chemical etching and electro etching.
  • electrochemical metal deposition is explored as one of the methods for "selective" particles placement.
  • the placement of metal nanoparticles on e.g. silicon (Si) substrates can be done by conventional electrochemical deposition (i.e. using an external power supply) directly on the substrate.
  • Electrodeposition In conventional electrochemical processing (such as electrodeposition or electro etching) an external voltage and current is applied between at least two electrodes in an electrolyte bath.
  • One half reaction e.g. metal deposition through metal ion reduction
  • a second half reaction or counter reaction proceeds at a second electrode (current collector).
  • the control of said half reactions is a difficulty while working with conventional electrochemical processes using external voltage and current.
  • the back side of the substrate (wafer). This can be done for example by pressing the back side of the substrate to a metal plate to obtain intimate contact and thus keep the contact resistance at a minimum.
  • the back side of the substrate should be highly doped (e.g. by implantation) and additionally a suitable metal (that forms an ohmic contact with the Si substrate), metal silicide or metal germanide is coated on the substrate back side to minimize the contact resistance.
  • contamination of the substrate back side is a possible issue.
  • Electroless deposition can avoid the use of such a contact to the substrate.
  • the surface needs to be first activated with a catalyst cluster such as Pd catalyst cluster particles for the out-plating of the metal on the catalyst.
  • a catalyst cluster such as Pd catalyst cluster particles for the out-plating of the metal on the catalyst.
  • this method is not suitable for the deposition of nanoparticles which need to be as small or even smaller in size as the catalyst cluster particles themselves.
  • Electroless deposition by galvanic displacement is characterized by a process with two half reactions: a cathodic half reaction or reduction of metal ions to form the metal clusters on the substrate surface (e.g. Si) and the anodic half reaction or the oxidation of the substrate (e.g. Si).
  • the partial currents of both half reactions have to be equal so that no effective external current flows, i.e. the reaction occurs electroless.
  • the total reaction for electroless deposition by galvanic displacement is spontaneous (free enthalpy ⁇ G ⁇ O), which means that the substrate has to be less noble than the metal which is deposited (also metal ion concentration and complexation determine ⁇ G).
  • Electroless deposition by galvanic displacement means that both reduction (e.g. deposition) and oxidation occur at the same surface. This has many implications for the quality of the deposited metal and metal substrate interface. For example when metal particles or films are deposited on a blanket Si surface, the silicon surface itself will be oxidized (i.e. forming insulating SiO 2 ) unless HF is added to remove the oxide which is, however, not always practically possible.
  • a potential drawback (or advantage, depending on the application), of electroless deposition by galvanic displacement (on the same surface) is that the deposition can be self-limiting when one of the half reactions is shutdown.
  • Self-limitation happens when the substrate surface is completely covered and thus the underlying substrate (which is also the reducing species) is not longer available to sustain the reaction. This typically happens when either an insoluble surface oxide is formed (e.g. SiO 2 on Si substrate) during the oxidation reaction or when the surface becomes fully covered by a dense metal layer as a result of the reduction (deposition) reaction.
  • the self-limitation can be beneficial when only small particles or dense thin films are desired, but are a drawback when oxide-free surfaces and thick (dense) films are required.
  • Galvanic displacement reactions are used for thick metal deposits (e.g. Ni on Si as described by Niwa et al. Electrochimica Acta 48 (2003) 1295-1300 ), but these films are porous so that contact between substrate and solution is maintained.
  • Electroless deposition by galvanic displacement can also be used for selective deposition in patterns.
  • the issue is that the anodic and cathodic half reactions may randomly occur separately into different pattern features, such as holes: deposition may occur in one series of holes whereas the anodic counter reaction occurs in another set of holes.
  • a galvanic cell is created where the half reactions are uncontrollably separated (in analogy with galvanic corrosion). This affects the yield of deposition and limits the use of electroless deposition for electrodeposition on patterned substrates.
  • both half reactions also (as for electroless deposition) occur at one and the same substrate but the cathodic and anodic reactions are space separated by placing the substrate in an electric field applied between two feed electrodes. In this case no physical connection is made between the substrate and the power source. However, to drive the electrochemical reactions an external voltage and current need to be applied.
  • Bipolar electrochemistry like conventional electrochemistry, requires a solution that can support the separate oxidation and reduction reactions i.e. an electrolyte.
  • the electrolyte composition affects the electrolyte's conductivity and the electrochemistry on the isolated substrate.
  • Bipolar electrochemistry can be categorized into one of two arbitrary designations. First there is “open” bipolar electrochemistry and second there is “closed” bipolar electrochemistry.
  • Open bipolar electrochemistry occurs on an electrically and physically isolated substrate that is completely immersed in one suitable electrolyte.
  • the substrate forms a barrier between the electrodes and separates the electrolyte into separate areas.
  • the end result is that the electrolyte acts as an electrolytic wire between the feeder electrodes and the substrate.
  • a well-known example of closed bipolar electrochemistry can be found in fuel.
  • the chemical energy difference between the two electrolytes physically separated by an electrode provides the voltage difference and current supplied by the batteries.
  • the present invention aims to provide bipolar electroless processing methods, which do not present the drawbacks of the prior art techniques.
  • the present invention aims to deal with further optimalization towards a non-limiting and high-yield electrochemical deposition technique.
  • a preferred aim of the present invention is to provide a high-yield selective deposition of metallic compounds onto the front side of a substrate.
  • Another aim of the present invention is to provide further control of the anodic and cathodic half reaction of the electrochemical deposition techniques.
  • the present invention relates to a bipolar "electroless" electrochemical process that solves the problems (low yield and self-limiting reactions) of existing electroless processes by galvanic displacement. It is different from the above “electrolytic" bipolar electrochemical processing as it does not need external feeder electrodes to separate the oxidation (anodic) and reduction (cathodic) half reactions.
  • Said bipolar electroless electrochemical processes according to the present invention refer to processes such as deposition, electro etching and surface modification reactions in general wherein galvanic displacement reactions (oxidation-reduction half reactions) are involved to achieve the desired electrochemical process.
  • bipolar open-circuit deposition Bi-OCD
  • the invention is applicable to all bipolar open-circuit processes (Bi-OCP) in general, except the fact that the polarity of the used processes may change (e.g. anodic at the front side of the substrate for electro-etching or anodic at the back side of the substrate for deposition).
  • the present invention provides a method, referred to as photo Bi-OCD, for electroless deposition of metallic compounds onto the top surface of a semiconducting substrate comprising the following consecutive steps of:
  • Said metallic compound comprises at least one metal or one metal alloy.
  • the metal compound can also comprise an alloy comprising more than one metal element.
  • Alloys can be classified by the number of their metal constituents.
  • An alloy with two metal components is called a binary alloy; one with three metal components is a ternary alloy.
  • Two or more metal elements can be "co-deposited” in a method of the invention.
  • co-deposition means that two or more metal elements are deposited at a same time, from a same bath leading to an alloy.
  • the alloy composition can be controlled by adjusting the bath composition (e.g. by changing the metal ion concentration), by adding complexing agents to bring the standard potentials closer together and/or using different deposition parameters (potential or current).
  • said first side of the substrate is the processing front side, i.e. the side where the deposition occurs.
  • Said conductive electrolyte is a state of the art chemical solution comprising dissolved metal ions to produce an electrically conductive medium ( Modern Electroplating (4th edition), M. Schlesinger and M. Paunovic (editors), Wiley, New York, 2000 ).
  • said first and said second electrolytes are the same.
  • the present invention is based on the surprising observation that carrying out a method of the invention, comprising the differential illumination of the firstt side of said substrate versus the second side of said substrate, results in providing a driving force separating the cathodic and anodic partial reactions, starting a bipolar photo-electroless deposition and leading to high yield deposition of the metallic compound.
  • Said differential illumination is characterized by the fact that one side of the substrate (being the front side or the back side of the substrate) is more illuminated than the other side of the substrate (being the back side or the front side, respectively).
  • the intensity of the illumination of the higher illuminated side of said substrate is at least 50% higher than the intensity of the illumination of the lower illuminated side of said substrate, more preferably the intensity of the illumination of the higher illuminated side of said substrate is 100% higher than the intensity of the illumination of the lower illuminated side of said substrate.
  • a factor higher than 10 4 and more preferably higher than 10 5 between the intensity of illumination of the higher and lower illuminated sides is required.
  • a differential illumination of the front side of the substrate versus the back side of the substrate is applied such that a driving force is created to separate the anodic (oxidation) and cathodic (reduction) partial reactions.
  • the illuminance of said higher illuminated side of said substrate is higher than 10 5 lux (lumen per square meter) and more preferably ranges between 10 5 to 10 9 lux.
  • the illuminance of said lower illuminated side of said substrate is lower than 0.5 lux (lumen per square meter) and more preferably ranges between 10 -5 to 0.1 lux.
  • said illumination is carried out by natural, visible light up to UV light depending on the type of substrate, and his corresponding bandgap, used.
  • the wavelengths of said illumination preferably range between 100 nm and 700 nm, more preferably between 300 nm and 700 nm.
  • Said illumination can comprise a spectrum of wavelengths.
  • Monochromatic light can also be used in a method of the invention.
  • the oxidation-reduction half reactions are space separated on the front side of the substrate versus the back side of the substrate, such that the reduction half reaction or deposition occurs at the front side of the substrate and the oxidation half reaction occurs at the back side of the substrate.
  • the photo Bi-OCD process of the present invention can be used to deposit metallic nanoparticles onto a substrate.
  • said metallic nanoparticles can be selectively deposited onto the substrate.
  • Said pattern can be a permanent pattern or a sacrificial pattern which can be removed in further processing steps.
  • the photo Bi-OCD process of the present invention can be used for the selective catalyst placement on semiconducting substrates to be used for growth and integration of nanowires (NW) or carbon nanotubes (CNT).
  • NW nanowires
  • CNT carbon nanotubes
  • the back side of said semiconducting substrate is more illuminated than its front side (the front side being at the same time possibly exposed to natural light of the ambient), in case said substrate is an n-type semiconducting substrate.
  • the front side of said semiconduting substrate is more illuminated than its back side (the back side being at the same time possibly exposed to natural light of the ambient), in case said substrate is a p-type semiconducting substrate.
  • the substrate is a p-type semiconducting substrate
  • higher illumination is performed on the front side of the substrate to perform cathodic processing on the front side of the substrate (e.g. electrodeposition) and higher illumination is performed on the back side of the substrate to perform anodic processing on the front side of the substrate (e.g. electro etching).
  • the higher illumination is performed on the back side of the substrate to perform cathodic processing on the front side of the substrate (e.g. electrodeposition) and higher illumination is performed on the front side of the substrate to perform anodic processing on the front side of the substrate (e.g. electro etching).
  • the present invention is related to a bipolar photo-electrochemical process for selective electroless processing such as the deposition of a metallic compound onto the top surface of a substrate, electro etching, electro polishing or substrate modification.
  • a selective photo Bi-OCD is performed where, prior to the steps of contacting the substrate to an electrically conductive electrolyte, a layer is provided defining a pattern on said substrate wherein e.g. openings (pores) are created to form said pattern.
  • Said pores or openings are not covered by the layer defining said pattern. As such, a direct contact between the metal deposited ions and the top surface of the substrate can occur.
  • said pattern is made of an insulating material to avoid electroless processing.
  • the front side (top surface) of said substrate is at least partly covered with an insulating pattern whereby the deposition of the metallic compound takes place selectively into the openings not covered by said pattern.
  • a metallic pattern can be first deposited onto the substrate such that the reduction half reaction or deposition occurs on the substrate inside the openings of the pattern and the oxidation half reaction occurs on the metal pattern itself (acting as anode) or vice versa.
  • Said metallic pattern can be a permanent or sacrificial pattern which can be removed or covered up in further processing.
  • the top surface of the substrate is at least partly covered with a metal comprising pattern such that the deposition of the metallic compound takes place selectively onto the surface of the pattern in case the substrate is an n-type semiconducting substrate.
  • the top surface of the substrate is at least partly covered with a metal comprising pattern such that the deposition of the metallic compound takes place selectively into the openings of the pattern in case the substrate is a p-type semiconducting substrate.
  • said substrate is an n-type semiconducting substrate said substrate is selected from at least one of Si, Ge, GaAs doped with a group III element.
  • said group III element is B, Al, Ga, In or Tl.
  • said substrate is a p-type semiconducting substrate said substrate is selected from at least one of Si, Ge, GaAs doped with a group V element.
  • said group V element is N, P, As, Sb or Bi.
  • said substrate is a light sensitive metal oxide such as In 2 O 3 , TiO 2 or SnO 2 .
  • a bipolar photo-electrochemical (photo Bi-OCD) process for selective electroless deposition whereby the substrate is made of a semiconducting material (e.g. Si) and the pattern used to cover at least partly the front side of the substrate is made of a metallic compound.
  • both oxidation and reduction (deposition) reactions take place at the front side of the substrate but separated by metal/semiconductor regions. Differential illumination is used to create a potential difference and the electrolyte solution makes contact with the front side of said substrate only (the back side of said substrate remains dry).
  • metal (alloy) deposition by the photo Bi-OCD process on the semiconductor substrate regions i.e.
  • the semiconductor substrate needs to be p-type and preferably the front side of the substrate is higher illuminated.
  • the front side of the substrate is higher illuminated and the substrate is an n-type semiconducting substrate.
  • the metallic regions are preferably inert to the dissolution (e.g. Ta, TaN, Ti, TiN, Pt).
  • a bipolar photo-electrochemical (photo Bi-OCD) process whereby the semiconducting substrate is partly covered by metallic regions and the semiconducting regions are covered with an insulating pattern with openings exposing the semiconductor to the electrolyte.
  • the exposed metallic regions will act as the anode and the exposed semiconductor as cathode upon illumination (preferably higher front illumination) leading to metal deposition by photo Bi-OCD on the semiconducting substrate.
  • the exposed metallic regions will act as the cathode anode and the exposed semiconductor as anode upon illumination leading to electro-etching.
  • Examples of preferred semiconducting materials are group IV semiconductors, such as silicon (Si) and germanium (Ge), III-V semiconductors, such as GaAs, GaP, GaSb, InP, InSb, InAs and II-VI semiconductors such as ZnO, ZnS, CdS and CdSe.
  • group IV semiconductors such as silicon (Si) and germanium (Ge)
  • III-V semiconductors such as GaAs, GaP, GaSb, InP, InSb, InAs and II-VI semiconductors such as ZnO, ZnS, CdS and CdSe.
  • group IV semiconductors such as silicon (Si) and germanium (Ge)
  • III-V semiconductors such as GaAs, GaP, GaSb, InP, InSb, InAs and II-VI semiconductors such as ZnO, ZnS, CdS and CdSe.
  • group III elements B, Al, Ga, In, Tl
  • silicon is doped with group V elements (N, P, As, Sb, Bi) causing the substrate silicon to act as an electron donor or in other words as an n-type substrate. Therefore, a silicon substrate doped with boron creates a p-type semiconductor whereas one doped with phosphorus results in an n-type material.
  • group V elements N, P, As, Sb, Bi
  • a silicon substrate doped with boron creates a p-type semiconductor whereas one doped with phosphorus results in an n-type material.
  • Another preferred example of a substrate is a GaAs consisting/containing material.
  • light sensitive metal oxides can be used as substrate; preferred examples of these light sensitive metal oxides are In 2 O 3 , TiO 2 and SnO 2 .
  • a layer is deposited onto the front side of said substrate into which openings or pores are present and/or need to be created to form a pattern.
  • said deposited layer is made of an insulating material or dielectric to avoid electrochemical deposition onto the surface of said layer.
  • oxides such as SiO 2 and alumina (aluminium oxide), nitrides such as Si 3 N 5 , carbides such as SiC, organic polymeric materials such as PMMA (polymethyl methacrylate) resists, low-k dielectric materials, zeolites such as silicates and porous oxides such as Anodized Alumina Oxide (AAO).
  • oxides such as SiO 2 and alumina (aluminium oxide), nitrides such as Si 3 N 5 , carbides such as SiC, organic polymeric materials such as PMMA (polymethyl methacrylate) resists, low-k dielectric materials, zeolites such as silicates and porous oxides such as Anodized Alumina Oxide (AAO).
  • AAO Anodized Alumina Oxide
  • a SiO 2 layer can be deposited e.g. by Chemical Vapor Deposition (CVD) techniques.
  • CVD Chemical Vapor Deposition
  • said deposited layer is made of a metallic compound such as Ti, TiN, TaN, Ta, Al, Cr, Pb,...
  • oxidation and deposition reactions may take place at the front side of the substrate but separated by metal/semiconductor.
  • an insulating micro pattern may cover the macro patterned semiconductor and/or metallic regions.
  • a rectangular area or box e.g. 10 ⁇ m x 10 ⁇ m
  • a patterned SiO 2 with circular holes of 50 nm in diameter and a pitch of 100 nm exposing the p-site.
  • This box is surrounded by a metal line (e.g. 500 nm wide TiN) on the Si substrate, forming a square around the Si/SiO 2 box.
  • the cathodic half reaction is confined to certain areas or holes i.e. limiting the place of deposition (referred to as "selective deposition") inside the holes of the pattern.
  • the openings (pores) in said deposited layer have a diameter of 1 nm up to several ⁇ m depending on the application.
  • the openings are such that no insulating material is left at the bottom of the opening.
  • the depth of the opening can range from 10 nm up to 500 nm depending on the application.
  • said deposited layer is made of a porous material such as zeolites or anodized alumina oxide (AAO), no patterning step is needed (but may be still used) to form pores (a pattern).
  • the pores are instead formed by self-assembly.
  • Porous alumina can be formed on a substrate, such as silicon by iodization of an aluminum film deposited e.g. by means of Physical Vapor Deposition. This porous film can be from a few nanometers up to several microns thick.
  • the front side of the substrate (comprising the pattern) is contacted to a first electrically conductive electrolyte comprising dissolved metal ions of the metallic compound to be deposited.
  • the dissolved metal ions in the first electrically conductive electrolyte are capable of forming cathodic reactions on the front side of the substrate such that photo Bi-OCD of these metals onto the front side of the substrate is possible (inside openings in the dielectric or pores).
  • these metal ions are Ni 2+ , Co 2+ , Cu 2+ , In 3+ , Au + , Au 3+ , Fe 2+ , Fe 3+ , Pt 2+ , Pd 2+ , Pb 2+ , Sb 3+ , Bi 3+ , Zn 2+ , Ga 3+ , Ge 4+ , Ru 3+ , Rh 2+ and inorganic and organic complexes thereof, but the invention is not limited to these metals and can be applied to basically any material that can be electrodeposited, including alloys of these metals and in combination with W, Mo, V, Cr, Mn.
  • Preferred concentrations of the metals in the first electrically conductive electrolyte are in the range of 1mM up to 1M depending on the application.
  • ions added to the first electrically conductive electrolyte for complexation and improved conductivity are e.g. OH - , F - , Cl - , I - , Br - , NO 3 - , SO 4 2- , PO 4 3- , S 2 O 3 2- , SO 3 2- , sulfa mate-, flu borate-, borate-, cyanide-, fluoride- as anions and Na + , K + , Ca 2+ , Al 3+ , Mg 2+ , Li + , NH 4 + , H + as counter cations, with the total charge of anions and cations (including the metal ions) making a balance of zero.
  • Preferred concentrations of the salts in the first electrically conductive electrolyte are in the range of 1mM up to 6M depending on the application.
  • the electrolyte compositions are not limited to the above mentioned, and combinations are unlimited.
  • recipes for typical plating electrolyte compositions is referred to literature.
  • the method of the present invention can also be extended to electrochemical processing in general such as electro etching or surface modification.
  • the back side of the substrate is contacted to a second electrically conductive electrolyte.
  • the substrate is separating the first and second electrolytes and we refer to "closed" photo Bi-OCD. Said separation can be made by mounting the substrate in-between two cells which have an opening sealed by the substrate (front side of said substrate seals the cell with electrolyte 1 and the back side of said substrate seals the cell with electrolyte 2).
  • a quick load/unload substrate (wafer) mount can be used which can contain one electrolyte and gets submerged in the second electrolyte or vice versa.
  • said second electrically conductive electrolyte can contain HF or other fluoride containing compounds such as NH 4 F, HBF 4 and combinations thereof (e.g. buffered HF) to avoid deposition of SiO 2 onto the back side of the substrate.
  • Preferred concentrations of the salts in the second electrolyte are in the range of 1mM up to 6M depending on the application.
  • the substrate is fully immersed in said first electrically conductive electrolyte.
  • said first electrically conductive electrolyte it is referred to as "open" photo Bi-OCD or open photo Bi-OCP and the anodic and cathodic reactions occur in the same electrolyte.
  • only the front side of the substrate is immersed in said first electrically conductive electrolyte and the dry back side of the substrate is illuminated.
  • said first and second electrically conductive electrolytes are connected to each other by forming an electrical conductive path between the first and second electrolytes.
  • Said electrical conductive path can be created by means of a salt bridge or alternatively by means of external electrodes immersed in both electrolytes.
  • the closed photo Bi-OCD process starts as soon as the electrolytic contact is made between the two electrolytes.
  • light is used to create a potential difference between the front side of the substrate and the back side of the substrate and whereby the substrate is made of a semiconducting material (e.g. Si) and the pattern (if present) used to cover at least partly the front side of the substrate is made of an insulating material (to avoid deposition onto the pattern).
  • a semiconducting material e.g. Si
  • the back side of said substrate is more illuminated than the front side of said substrate.
  • a p-type semiconducting substrate the front side of said substrate is more illuminated than the back side of said substrate.
  • electrochemical processes refer to both deposition processes and metal-removal processes (such as for example electro polishing, chemical etching and electro etching).
  • deposit means the act of depositing particles onto a surface of a substrate.
  • ECP electrochemical processing
  • ECD electrochemical deposition
  • Open-circuit processing OCP
  • OCP open-circuit deposition
  • OCD open-circuit deposition
  • bipolar electrochemical processing Bi-ECP
  • bipolar electrochemical deposition Bi-ECD
  • bipolar open-circuit processing Bi-OCP
  • bipolar open-circuit deposition Bi-OCD
  • Electroless Bi-OCD is a "photo Bi-OCD” process whereby light is used as a driving force to create the potential difference (i.e. photo voltage) between the front side of the substrate and the back side of the substrate.
  • selective deposition onto a substrate refers to the deposition of a compound on a predetermined specific area of a substrate and not on the whole substrate area.
  • Electrodeating as used in the present invention is the process of using electrical current to coat an electrically conductive object with a relatively thin layer of metal.
  • electroless plating means a non-galvanic type of plating method that involves several simultaneous reactions in an aqueous solution, which occur without the use of external electrical power.
  • nanoparticle as used in the present invention is a particle having a diameter which is preferably less than 100 nm.
  • catalyst as used in the present invention is a substance that accelerates the chemical reaction.
  • Bi-OCD Bi-OCD
  • the invention is applicable to all Bi-OCP processes in general, except the fact that the polarity of the processes may change (e.g. anodic at the front side of the substrate for electro-etching).
  • the present invention discloses novel bipolar open-circuit processes (Bi-OCP) and bipolar open-circuit deposition (Bi-OCD) methods which makes use of light (illumination) to create a potential difference.
  • Said novel bipolar processes are referred to as “photo Bi-OCP” and respectively "photo Bi-OCD”.
  • Bi-OCD bipolar open-circuit deposition
  • the photo Bi-OCD process of the present invention can be used for the selective catalyst placement on semiconducting substrates to be used for growth and integration of nanowires (NW) or carbon nanotubes (CNT).
  • NW nanowires
  • CNT carbon nanotubes
  • the present invention solves the problem of selective deposition of metallic compounds (pure metals or metal alloys) onto the front side of a substrate with high yield using a photo Bi-OCD process.
  • the problem is solved first by covering the front side of the substrate with an insulating pattern such that the deposition of the metallic compound takes place selectively into the openings (pores) of said pattern and secondly by differential illumination of the front side of the substrate versus the back side of the substrate to provide a driving force to separate the cathodic and anodic partial reactions. More specifically, light is used to create a potential difference or photo voltage between the higher illuminated and lower illuminated areas.
  • the photo Bi-OCD of the invention is further characterized as a bottom up electrochemical deposition process with high yield capable of filling very narrow pores (openings).
  • Said openings can be in the nanometer range up to the micrometer range such that the method is suitable for use as catalyst placement for carbon nanotube (CNT) or nanowire (NW) growth as well as for through-hole plating processes where no physical contact can be made with the substrate.
  • CNT carbon nanotube
  • NW nanowire
  • the present invention further solves the problem of controlling the anodic and cathodic half reaction during electroless electrochemical processes such that the process becomes not self-limiting and a continuous process can be achieved with high yield.
  • the electroless electrochemical process is a deposition (plating) process a continuous deposition of the compound of interest is achieved leading to thick deposits.
  • the photo Bi-OCD of the invention makes it possible to deposit the metallic compound of interest inside the pattern with high yield, compared to a standard electroless electrochemical deposition (OCD) having poor control of the cathodic and anodic reactions and giving rise to low yield.
  • OCD electroless electrochemical deposition
  • the anodic and cathodic half reactions are separated using the back side of the substrate as a large inexhaustible anode surface.
  • the invention discloses further the use of more light or higher illumination of the back side (or alternatively of the front side) of the substrate to create a potential difference.
  • photo Bi-OCP photo bipolar open-circuit process
  • a photo bipolar open-circuit deposition (photo Bi-OCD) method for depositing a metallic layer (pure metal or alloy of metals) onto a substrate is illustrated in Figure 2 for an n-type substrate and in Figure 3 for a p-type substrate.
  • the method starts with the step of first providing a substrate 1.
  • Most preferred said substrate 1 is made of a p-type (or alternatively an n-type) semiconducting material and/or a light sensitive (metal) oxide and/or a semiconducting polymer.
  • Examples of preferred semiconducting materials are silicon (Si) and germanium (Ge).
  • a semiconductor material e.g. silicon
  • said (silicon) substrate is preferably doped e.g. with group III elements (B, Al, Ga, In, Tl) causing the substrate (silicon) to function as an electron acceptor or in other words as a p-type substrate.
  • the semiconductor material e.g. silicon
  • group V elements N, P, As, Sb, Bi
  • a silicon substrate doped with boron creates a p-type semiconductor whereas one doped with phosphorus results in an n-type material.
  • a substrate is a GaAs consisting/containing material.
  • light sensitive metal oxides can be used as substrate, preferred examples of these light sensitive metal oxides are In 2 O 3 , TiO 2 and SnO 2 .
  • the front side of the substrate is contacted to a first electrically conductive electrolyte comprising dissolved metal ions of the metallic compound to be deposited (indicated as solution 1).
  • the dissolved metal ions (Mn + ) in the first electrically conductive electrolyte are capable of forming cathodic reactions on the front side of the substrate such that photo Bi-OCP (deposition) of these metals onto the front side of the substrate is possible.
  • these metals are Ni 2+ , Co 2+ , Cu 2+ , In 3+ , Au + , Fe 2+ , Fe 3+ , Pt 2+ , Pd 2+ ,... but the invention is not limited to these metals and can be applied to basically anything that can be deposited.
  • Preferred concentrations of the metals in the first electrolyte are in the range of 1mM up to 1M depending on the application.
  • Preferred concentrations of the salts in the first electrolyte are in the range of 1mM up to 6M depending on the application.
  • the back side of the substrate is contacted to a second electrically conductive electrolyte (indicated as solution 2).
  • Said contact can be made by pressing the back side of the substrate to a porous path containing said second electrically conductive electrolyte or said contact can be clamped between two cells.
  • said second electrically conductive electrolyte can contain HF to avoid deposition of SiO 2 onto the back side of the substrate.
  • Preferred concentrations of the salts in the second electrolyte are in the range of 1mM up to 6M depending on the application.
  • Said first and second electrolyte can be identical such that only one electrolytic bath is required and the substrate can be immersed in the bath.
  • said first and second electrically conductive electrolytes are connected to each other by forming an electrical conductive path between the first and second electrolytes.
  • the electrical conductive path can be created by means of a salt bridge or alternatively by means of external electrodes immersed in both electrolytes.
  • light 9 is used to achieve the potential difference needed to achieve photo Bi-OCD or in other words light is used as a driving force to create the potential difference between the front side of the substrate and the back side of the substrate.
  • the light intensity of the incident light will determine the potential difference and the rate of reaction (more photo-electrons and photo holes available for reaction).
  • Natural, visible light up to UV light is used depending on the type of substrate, and his corresponding bandgap, used.
  • the wavelengths of said light range between 100 nm and 700 nm, preferably between 300 nm and 700 nm.
  • Said light can contain a spectrum of wavelengths.
  • Said light can be monochromatic light.
  • anodic and cathodic half reactions refer to displacement reactions with silicon (galvanic reaction) whereby silicon is oxidized and metal ions in solution are reduced and deposited onto the front side of the substrate.
  • Said cathodic half reaction is highly selective for silicon surface.
  • the metal is first deposited as small metal nanoparticles 5 as illustrated in Figure 2C (or Figure 3C ) and subsequently (longer OCD time) as a continuous metallic film 6 as illustrated in Figure 2D (or Figure 3D ).
  • a method for selective depositing a metallic compound (pure metal or alloy of metals) onto a substrate is disclosed and illustrated in Figure 4 for an n-type substrate.
  • Said substrate is preferably selected from at least one of the preferred examples described above (according to the first preferred embodiment).
  • the front side of the substrate 1 is partly covered with a pattern 3 to achieve selective electroless photo Bi-OCD.
  • said pattern is an insulating pattern such that no deposition of the metallic compound 5 results on the pattern 3 or in other words to avoid deposition onto the surface of said pattern 3.
  • Said insulating pattern 3 can be created by first depositing a layer 2 onto the front side of the substrate 1 and subsequently (if needed) creating openings or pores 4 in said deposited layer to create a pattern.
  • the openings (pores) 4 in said deposited layer have a diameter of 1 nm up to several ⁇ m depending on the application.
  • the openings 4 are such that no insulating material is left at the bottom of the opening.
  • the depth of the opening can range from 10 nm up to 500 nm depending on the application.
  • said deposited layer is made of an insulating material such as SiO 2 or organic polymeric materials.
  • a pattern (e.g. holes or pores but also lines or other shapes) can be created into said deposited layer by means of photolithographic patterning.
  • a SiO 2 layer can be deposited e.g. by Chemical Vapor Deposition techniques (CVD).
  • CVD Chemical Vapor Deposition techniques
  • said deposited layer is made of a porous material such as zeolites or anodized alumina oxide (AAO) and no patterning step is needed to form pores (a pattern).
  • AAO anodized alumina oxide
  • the pores are instead formed by self-assembly.
  • Porous alumina can be formed on a substrate, such as silicon by anodization of an aluminum film deposited e.g. by means of Physical Vapor Deposition. This porous film can be from a few nanometers up to several microns thick.
  • differential illumination of the front side of the substrate versus the back side of the substrate is done to create a potential difference which separates the cathodic and anodic partial reactions.
  • the substrate is a p-type semiconducting substrate
  • the front side of the substrate is more illuminated 9 than the back side of the substrate and, in case the substrate is an n-type semiconducting substrate, the back side of the substrate is more illuminated 9 than the front side of the substrate.
  • the metal is deposited into the pore openings as shown in Figure 4C .
  • the metal is first deposited as small metal nanoparticles 5 as illustrated in Figure 4C and if wanted the whole pattern (openings or holes) can be filled up with the metallic compound as illustrated in Figure 4D .
  • the metal deposition continues with time until light is switched off.
  • said deposited layer to create a pattern on the front side of the substrate is made of a metallic compound.
  • Said substrate is preferably selected from at least one of the preferred examples described above (according to the first preferred embodiment).
  • both oxidation and deposition reactions take place at the front side of the substrate but separated by metal/semiconductor regions having deposition on the metallic regions or alternatively onto the metallic pattern (using the metallic pattern as anode).
  • the anodic half reaction can be confined onto the metallic pattern i.e. limiting the place of deposition (referred to as "selective deposition") inside the holes 33 of the metallic pattern 32 as shown in Figure 6 .
  • the metallic pattern 32 is then acting as anode instead of the back side of the substrate 1 such that only the front side of the (p-type) substrate 1 needs to be in contact with the electrolyte (only one electrolyte is required) and deposition is taking place inside 32 the pattern onto the front side of the p-type substrate 1.
  • the cathodic half reaction is confined to selectively onto the metallic pattern 32 limiting the place of deposition (referred to as "selective deposition") onto the metallic pattern 32 as shown in Figure 5 .
  • the openings (holes) 33 in between the metallic pattern are then acting as anode instead of the back side of the substrate 1 such that only the front side of the substrate 1 needs to be in contact with the electrolyte (only one electrolyte is required) and deposition of the metallic compound 35 is taking place onto the metallic pattern 32 onto the front side of the substrate and the openings 34 are acting as anode.
  • the front side of said substrate is more illuminated 9 than the back side of the substrate and the deposition is taking place inside the metallic pattern onto the front side of the p-type substrate as shown in Figure 6 .
  • the front side of said substrate is more illuminated 9 than the back side of the substrate and deposition of the metallic compound 35 is taking place onto the metallic pattern as shown in figure 5 .
  • an extra structure is deposited onto the front side of the substrate, said extra structure is then acting as an anode and both oxidation and deposition reactions take place at the front side of the substrate such that only the front side of the substrate is in contact with the electrolytic solution.
  • an extra metal comprising structure 40 (e.g. comprising Ti (TiN), Ta (TaN), W, ...) is present on the front side of the substrate 1.
  • Said substrate 1 is selected from a p-type semiconducting material as described in the first preferred embodiment.
  • Said extra metal comprising structure 40 is then acting as an anode and both oxidation and deposition reactions take place at the front side of the substrate such that only the front side of the substrate is in contact with the electrolytic solution.
  • the front side of the substrate 1 is partly covered with an insulating pattern 32 to achieve a selective photo Bi-OCD process.
  • Said pattern is an insulating pattern 32 as described in the second preferred embodiment above such that no deposition of the metallic compound 35 is achieved on the pattern 32 or in other words to avoid deposition onto the surface of said pattern 32.
  • higher illumination 9 on the front side of the substrate is performed to provide a driving force to separate the cathodic and anodic partial reactions.
  • the illuminance of the higher illuminated side of the substrate is higher than 10 5 lux (lumen per square meter) and preferably ranges between 10 5 to 10 9 lux.
  • the illuminance of the lower illuminated side of the substrate is lower than 0.5 lux (lumen per square meter) and preferably ranges between 10 -5 to 0.1 lux.
  • More specifically light is used to create a potential difference.
  • Example 1 selective photo-electroless Bi-ECP of gold in patterned silicon via holes.
  • Figure 7 illustrates the selective photo-electroless Bi-ECP for gold deposition in patterned silicon via holes.
  • Gold (Au) was deposited on SiO 2 in patterned contact holes on a p-type Si (100) substrate.

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Claims (20)

  1. Verfahren, das als Photo-Bi-OCD bezeichnet wird, zum stromlosen Abscheiden einer metallischen Verbindung auf die obere Oberfläche eines Halbleitersubstrats, das die nachstehenden aufeinanderfolgenden Schritte umfasst:
    - Bereitstellen eines Halbleitersubstrats (1) mit einer ersten Seite (100) des Substrats und einer zweiten Seite (110) des Substrats, die der ersten Seite des Substrats vorzugsweise gegenüberliegt, wodurch eine Dicke eines Halbleitermaterials definiert wird,
    - Inkontaktbringen der ersten Seite des Substrats mit einem ersten (10) elektrisch leitenden Elektrolyten, umfassend aufgelöste Metallionen der metallischen Verbindung,
    - Inkontaktbringen der zweiten Seite des Substrats mit einem zweiten (11) elektrisch leitenden Elektrolyten,
    - Bereitstellen eines elektrisch leitenden Wegs zwischen dem ersten (10) und dem zweiten (11) Elektrolyten,
    dadurch gekennzeichnet, dass:
    - die erste Seite des Substrats im Vergleich zur zweiten Seite des Substrats unterschiedlich beleuchtet wird, um einen potenziellen Unterschied zwischen der ersten und der zweiten Seite des Substrats zu bilden.
  2. Verfahren nach Anspruch 1, wobei die Rückseite (14) des Substrats für ein n-Typ-Halbleitermaterial stärker als die Vorderseite des Substrats beleuchtet wird.
  3. Verfahren nach Anspruch 1, wobei die Vorderseite (15) des Substrats für ein p-Typ-Halbleitermaterial stärker als die Rückseite des Substrats beleuchtet wird.
  4. Verfahren nach einem der vorstehenden Ansprüche, wobei die Intensität der Beleuchtung der stärker beleuchteten Seite des Substrats zumindest um 50 % höher als die Intensität der Beleuchtung der schwächer beleuchteten Seite des Substrats ist, mehr bevorzugt die Intensität der Beleuchtung der stärker beleuchteten Seite des Substrats 100 % höher als die Intensität der Beleuchtung der schwächer beleuchteten Seite des Substrats ist.
  5. Verfahren nach einem der vorstehenden Ansprüche, um eine selektive Photo-Bi-OCD durchzuführen, wobei das Verfahren ferner vor den Schritten des Inkontaktbringens des Substrats mit einem elektrisch leitenden Elektrolyten den Schritt des Bereitstellens einer Schicht (2) auf dem Substrat (1) umfasst, in der Öffnungen gebildet werden, um ein Muster (3) zu bilden.
  6. Verfahren nach einem der vorstehenden Ansprüche, wobei die Photo-Bi-OCD eine selektive Photo-Bi-OCD ist, wobei die erste Seite des Substrats (1) zumindest teilweise mit einem Isoliermuster (3) bedeckt ist, so dass das Abscheiden der metallischen Verbindung selektiv in die Öffnungen des Musters (3) erfolgt.
  7. Verfahren nach Anspruch 6, wobei das Isoliermuster aus einem Material hergestellt ist, das Oxide wie z. B. Aluminiumoxid, organische polymere Materialien, Low-k dielektrische Materialien, Zeolithen und poröse Oxide (AAO) umfasst.
  8. Verfahren nach Anspruch 6 oder 7, wobei die Photo-Bi-OCD eine selektive Photo-Bi-OCD ist, wobei die erste Seitenfläche des Substrats (1) zumindest teilweise mit einem metallumfassenden Muster (32) bedeckt ist, so dass das Abscheiden der metallischen Verbindung erfolgt:
    - selektiv auf die Oberfläche des Musters (32), wenn das Substrat ein n-Typ-Halbleitersubstrat ist,
    - selektiv in die Öffnungen des Musters, wenn das Substrat ein p-Typ-Halbleitersubstrat ist.
  9. Verfahren nach Anspruch 8, wobei das metallumfassende Muster aus Metallen wie z. B. TiN, TaN, oder W ausgewählt ist.
  10. Verfahren nach einem der vorstehenden Ansprüche, wobei das Substrat ein n-Typ-Halbleitersubstrat ist, das aus zumindest einem von Si, Ge, GaAs, dotiert mit einem Gruppe-III-Element wie z. B. B, Al, Ga, In, oder Tl ausgewählt ist.
  11. Verfahren nach einem der vorstehenden Ansprüche, wobei das Substrat ein p-Typ-Halbleitersubstrat ist, das aus zumindest einem von Si, Ge, GaAs, dotiert mit einem Gruppe-V-Element wie z. B. N, P, As, Sb, oder Bi ausgewählt ist.
  12. Verfahren nach einem der vorstehenden Ansprüche, wobei das Substrat ein lichtempfindliches Metalloxid wie z. B. In2O3, TiO2, oder SnO2 ist.
  13. Verfahren nach einem der vorstehenden Ansprüche, wobei der erste elektrisch leitende Elektrolyt (10) aufgelöste Metallionen wie z. B. Ni2+, Co2+, Cu2+, In3+, Au+, Au3+, Fe2+, Fe3+, Pt2+, Pd2+, Pb2+, Sb3+, Bi3+, Zn2+, Ga3+, Ge4+, Ru3+, Rh2+, anorganische und organische Komplexe davon, Legierungen dieser Metalle und in Kombination mit W, Mo, V, Cr oder Mn umfasst.
  14. Verfahren nach Anspruch 13, wobei die Konzentrationen der Metallionen im ersten elektrisch leitenden Elektrolyten (10) im Bereich von 1 mM bis 1 M liegen.
  15. Verfahren nach einem der vorstehenden Ansprüche, wobei der zweite elektrisch leitende Elektrolyt (11) Anionen der Gruppe von OH-, Cl-, NO3-, SO4 2-, PO4 3-, S2O3 2-, SO3 2-, I-, I3 -, IO3 -, Br-, BrO3 -, Sulfamat, Fluoborat, Borat, fluoridbasierten Lösungen und Mischungen davon mit Gegenionen von Na+, K+, Ca2+, Al3+, Li+, NH4 +, H+ umfasst.
  16. Verfahren nach Anspruch 15, wobei die Konzentrationen der Anionen im zweiten elektrisch leitenden Elektrolyten (11) im Bereich von 1 mM bis 6 M liegen.
  17. Verfahren nach einem der vorstehenden Ansprüche, wobei der elektrisch leitende Weg zwischen dem ersten und dem zweiten leitenden Elektrolyten unter Verwendung einer Salzbrücke durchgeführt wird.
  18. Verfahren nach einem der vorstehenden Ansprüche 5 bis 17, wobei die erste Seite des Substrats stärker als die zweite Seite des Substrats beleuchtet wird und die erste Seite des Substrats (1) ferner eine zusätzliche metallumfassende Struktur (940) umfasst, die bei der Photo-Bi-OCD als Anode agiert, so dass nur die erste Seite des Substrats (1) mit dem ersten (10) elektrisch leitenden Elektrolyten in Kontakt gebracht wird, der aufgelöste Metallionen der metallischen Verbindung umfasst (wobei die Rückseite des Substrats trocken gehalten wird) und so dass das Abscheiden der metallischen Verbindung selektiv in die Öffnungen des Isoliermusters (32) erfolgt.
  19. Verfahren nach Anspruch 18, wobei das Substrat ein p-Typ-Halbleitersubstrat ist.
  20. Verwendung des Verfahren nach einem der vorstehenden Ansprüche 1 bis 19 zum selektiven Abscheiden von metallischen Nanopartikeln, die als Katalysator zum Züchten von Halbleiternanodrähten (NW) oder Kohlenstoffnanoröhrchen (CNT) verwendet werden.
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FR3057106B1 (fr) * 2016-10-05 2018-11-09 Electricite De France Contacts perfectionnes d'une cellule photovoltaique a deux faces actives
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Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3075892A (en) * 1959-09-15 1963-01-29 Westinghouse Electric Corp Process for making semiconductor devices
US4009297A (en) * 1974-02-25 1977-02-22 Amp Incorporated Gold deposition procedures and substrates upon which gold has been deposited
US4144139A (en) * 1977-11-30 1979-03-13 Solarex Corporation Method of plating by means of light
US4359485A (en) * 1981-05-01 1982-11-16 Bell Telephone Laboratories, Incorporated Radiation induced deposition of metal on semiconductor surfaces
JPS6050172A (ja) * 1983-08-26 1985-03-19 Toshiba Corp 金属イオンの還元方法
JPS60155678A (ja) * 1984-01-24 1985-08-15 Toshiba Corp 金属イオンの還元方法
JPS6150633A (ja) * 1984-08-20 1986-03-12 Mitsubishi Chem Ind Ltd 光デポジシヨン法
JPS62109393A (ja) * 1985-11-07 1987-05-20 カルソニックカンセイ株式会社 電気回路基板製造方法
JPH0693445B2 (ja) * 1987-06-22 1994-11-16 日本電気株式会社 半導体装置の製造方法
JPS6456875A (en) * 1987-08-28 1989-03-03 Hitachi Ltd Electroless plating method
JPH02205388A (ja) * 1989-02-03 1990-08-15 Hitachi Chem Co Ltd 半導体光触媒を用いた無電解めっきによるプリント回路の製造法
JPH05148657A (ja) * 1991-10-04 1993-06-15 Toyota Central Res & Dev Lab Inc 光利用めつき液およびめつき方法
JPH0620999A (ja) * 1992-07-01 1994-01-28 Sharp Corp 半導体装置の電極の製造方法
JPH06330332A (ja) * 1993-05-17 1994-11-29 Ibiden Co Ltd 無電解めっき方法
JP4521228B2 (ja) * 2003-07-28 2010-08-11 正也 市村 光析出による金メッキ法及び金メッキ膜形成装置
JP2005272271A (ja) * 2004-03-26 2005-10-06 Nippon Telegr & Teleph Corp <Ntt> カーボンナノチューブの製造方法及び半導体装置の製造方法
US7368045B2 (en) * 2005-01-27 2008-05-06 International Business Machines Corporation Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow
JP2006269913A (ja) * 2005-03-25 2006-10-05 Mitsubishi Heavy Ind Ltd カーボンナノチューブ配線の形成方法
JP5116961B2 (ja) * 2005-09-29 2013-01-09 国立大学法人名古屋大学 カーボンナノウォールを用いたダイオード

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

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